* [PATCH v2 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs
2022-01-03 11:12 [PATCH v2 0/3] Add soundcard support for sc7280 based platforms Srinivasa Rao Mandadapu
@ 2022-01-03 11:12 ` Srinivasa Rao Mandadapu
2022-01-04 22:04 ` Vincent Knecht
` (2 more replies)
2022-01-03 11:12 ` [PATCH v2 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node Srinivasa Rao Mandadapu
2022-01-03 11:13 ` [PATCH v2 3/3] arm64: dts: qcom: sc7280: add sound card support Srinivasa Rao Mandadapu
2 siblings, 3 replies; 14+ messages in thread
From: Srinivasa Rao Mandadapu @ 2022-01-03 11:12 UTC (permalink / raw)
To: agross, bjorn.andersson, robh+dt, linux-arm-msm, devicetree,
linux-kernel, rohitkr, srinivas.kandagatla, dianders, swboyd,
judyhsiao
Cc: Srinivasa Rao Mandadapu, Venkata Prasad Potturu
SC7280 has VA, TX and RX macros with SoundWire Controllers to attach with
codecs like WCD938x, max98360a using soundwire masters and i2s bus.
Add these nodes for sc7280 based platforms audio use case.
Add tlmm gpio property in wcd938x node for switching CTIA/OMTP Headset.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7280-crd.dts | 4 ++
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 52 ++++++++++++++
arch/arm64/boot/dts/qcom/sc7280.dtsi | 113 +++++++++++++++++++++++++++++++
3 files changed, 169 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
index cd2755c..035cca9 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
@@ -72,6 +72,10 @@ ap_ts_pen_1v8: &i2c13 {
pins = "gpio51";
};
+&wcd938x {
+ qcom,us-euro-gpios = <&tlmm 81 0>;
+};
+
&tlmm {
tp_int_odl: tp-int-odl {
pins = "gpio7";
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index ddeb508..94614c9 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -636,3 +636,55 @@
bias-pull-up;
};
};
+
+&swr0 {
+ wcd_rx: wcd938x-rx{
+ compatible = "sdw20217010d00";
+ reg = <0 4>;
+ #sound-dai-cells = <1>;
+ qcom,rx-port-mapping = <1 2 3 4 5>;
+ };
+};
+
+&swr1 {
+ wcd_tx: wcd938x-tx{
+ compatible = "sdw20217010d00";
+ reg = <0 3>;
+ #sound-dai-cells = <1>;
+ qcom,tx-port-mapping = <1 2 3 4>;
+ };
+};
+
+&soc {
+ max98360a: audio-codec-0 {
+ compatible = "maxim,max98360a";
+ pinctrl-names = "default";
+ pinctrl-0 = <&_en>;
+ sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
+ #sound-dai-cells = <0>;
+ };
+
+ wcd938x: codec {
+ compatible = "qcom,wcd9380-codec";
+ #sound-dai-cells = <1>;
+
+ reset-gpios = <&tlmm 83 0>;
+
+ qcom,rx-device = <&wcd_rx>;
+ qcom,tx-device = <&wcd_tx>;
+
+ vdd-rxtx-supply = <&vreg_l18b_1p8>;
+ vdd-io-supply = <&vreg_l18b_1p8>;
+ vdd-buck-supply = <&vreg_l17b_1p8>;
+ vdd-mic-bias-supply = <&vreg_bob>;
+
+ qcom,micbias1-microvolt = <1800000>;
+ qcom,micbias2-microvolt = <1800000>;
+ qcom,micbias3-microvolt = <1800000>;
+ qcom,micbias4-microvolt = <1800000>;
+
+ qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
+ qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
+ qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 6233f2c..c0d9de3 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -1744,6 +1744,119 @@
#clock-cells = <1>;
};
+ rxmacro: rxmacro@3200000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rx_swr_active>;
+ compatible = "qcom,sc7280-lpass-rx-macro";
+ reg = <0 0x3200000 0 0x1000>;
+
+ clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
+ <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
+ <&vamacro>;
+ clock-names = "mclk", "npl", "fsgen";
+ #clock-cells = <0>;
+ clock-frequency = <9600000>;
+ clock-output-names = "mclk";
+ #sound-dai-cells = <1>;
+ };
+
+ /* rx macro */
+ swr0: soundwire-controller@3210000 {
+ reg = <0 0x3210000 0 0x2000>;
+ compatible = "qcom,soundwire-v1.6.0";
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rxmacro>;
+ clock-names = "iface";
+ label = "RX";
+
+ qcom,din-ports = <0>;
+ qcom,dout-ports = <5>;
+ qcom,swrm-hctl-reg = <0x032a90a0>;
+
+ qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xFF 0xFF>;
+ qcom,ports-sinterval-low = /bits/ 8 <0x03 0x3F 0x1F 0x03 0x03>;
+ qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0B 0x01 0x01>;
+ qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0B 0x00 0x00>;
+ qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
+ qcom,ports-block-pack-mode = /bits/ 8 <0xFF 0x00 0x01 0xFF 0xFF>;
+ qcom,ports-hstart = /bits/ 8 <0xFF 0x03 0xFF 0xFF 0xFF>;
+ qcom,ports-hstop = /bits/ 8 <0xFF 0x06 0xFF 0xFF 0xFF>;
+ qcom,ports-block-group-count = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0x00>;
+
+ #sound-dai-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ };
+
+ txmacro: txmacro@3220000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&tx_swr_active>;
+ compatible = "qcom,sc7280-lpass-tx-macro";
+ reg = <0 0x3220000 0 0x1000>;
+
+ clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
+ <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
+ <&vamacro>;
+ clock-names = "mclk", "npl", "fsgen";
+
+ #clock-cells = <0>;
+ clock-frequency = <9600000>;
+ clock-output-names = "mclk";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ #sound-dai-cells = <1>;
+ };
+
+ /* tx macro */
+ swr1: soundwire-controller@3230000 {
+ reg = <0 0x3230000 0 0x2000>;
+ compatible = "qcom,soundwire-v1.6.0";
+
+ interrupts-extended =
+ <&intc GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
+ <&pdc 130 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "swr_master_irq", "swr_wake_irq";
+ clocks = <&txmacro>;
+ clock-names = "iface";
+ label = "TX";
+
+ qcom,din-ports = <3>;
+ qcom,dout-ports = <0>;
+ qcom,swrm-hctl-reg = <0x032a90a8>;
+
+ qcom,ports-sinterval-low = /bits/ 8 <0x01 0x03 0x03>;
+ qcom,ports-offset1 = /bits/ 8 <0x01 0x00 0x02>;
+ qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00>;
+ qcom,ports-hstart = /bits/ 8 <0xFF 0xFF 0xFF>;
+ qcom,ports-hstop = /bits/ 8 <0xFF 0xFF 0xFF>;
+ qcom,ports-word-length = /bits/ 8 <0xFF 0x0 0xFF>;
+ qcom,ports-block-pack-mode = /bits/ 8 <0xFF 0xFF 0xFF>;
+ qcom,ports-block-group-count = /bits/ 8 <0xFF 0xFF 0xFF>;
+ qcom,ports-lane-control = /bits/ 8 <0x00 0x01 0x00>;
+ qcom,port-offset = <1>;
+
+ #sound-dai-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ };
+
+ vamacro: codec@3370000 {
+ compatible = "qcom,sc7280-lpass-va-macro";
+ pinctrl-0 = <&dmic01_active>;
+ pinctrl-names = "default";
+
+ vdd-micb-supply = <&vreg_bob>;
+ reg = <0 0x3370000 0 0x1000>;
+ clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
+ <&lpass_audiocc LPASS_AUDIO_CC_RX_MCLK_CLK>;
+ clock-names = "mclk", "macro";
+
+ #clock-cells = <0>;
+ clock-frequency = <9600000>;
+ clock-output-names = "fsgen";
+ #sound-dai-cells = <1>;
+ };
+
lpass_tlmm: pinctrl@33c0000 {
compatible = "qcom,sc7280-lpass-lpi-pinctrl";
reg = <0 0x33c0000 0x0 0x20000>,
--
2.7.4
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v2 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs
2022-01-03 11:12 ` [PATCH v2 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs Srinivasa Rao Mandadapu
@ 2022-01-04 22:04 ` Vincent Knecht
2022-02-03 10:34 ` Srinivasa Rao Mandadapu
2022-01-04 22:23 ` Vincent Knecht
2022-01-05 20:15 ` Stephen Boyd
2 siblings, 1 reply; 14+ messages in thread
From: Vincent Knecht @ 2022-01-04 22:04 UTC (permalink / raw)
To: Srinivasa Rao Mandadapu, agross, bjorn.andersson, robh+dt,
linux-arm-msm, devicetree, linux-kernel, rohitkr,
srinivas.kandagatla, dianders, swboyd, judyhsiao
Cc: Venkata Prasad Potturu
Le lundi 03 janvier 2022 à 16:42 +0530, Srinivasa Rao Mandadapu a écrit :
> SC7280 has VA, TX and RX macros with SoundWire Controllers to attach with
> codecs like WCD938x, max98360a using soundwire masters and i2s bus.
> Add these nodes for sc7280 based platforms audio use case.
> Add tlmm gpio property in wcd938x node for switching CTIA/OMTP Headset.
>
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280-crd.dts | 4 ++
> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 52 ++++++++++++++
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 113 +++++++++++++++++++++++++++++++
> 3 files changed, 169 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
> index cd2755c..035cca9 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
> @@ -72,6 +72,10 @@ ap_ts_pen_1v8: &i2c13 {
> pins = "gpio51";
> };
>
> +&wcd938x {
> + qcom,us-euro-gpios = <&tlmm 81 0>;
> +};
> +
Maybe using a defined value is possible, rather than an obscure zero ?
GPIO_ACTIVE_HIGH ?
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v2 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs
2022-01-04 22:04 ` Vincent Knecht
@ 2022-02-03 10:34 ` Srinivasa Rao Mandadapu
0 siblings, 0 replies; 14+ messages in thread
From: Srinivasa Rao Mandadapu @ 2022-02-03 10:34 UTC (permalink / raw)
To: Vincent Knecht, agross, bjorn.andersson, robh+dt, linux-arm-msm,
devicetree, linux-kernel, rohitkr, srinivas.kandagatla, dianders,
swboyd, judyhsiao
Cc: Venkata Prasad Potturu
On 1/5/2022 3:34 AM, Vincent Knecht wrote:
Thanks for Your time Vincent!!!
> Le lundi 03 janvier 2022 à 16:42 +0530, Srinivasa Rao Mandadapu a écrit :
>> SC7280 has VA, TX and RX macros with SoundWire Controllers to attach with
>> codecs like WCD938x, max98360a using soundwire masters and i2s bus.
>> Add these nodes for sc7280 based platforms audio use case.
>> Add tlmm gpio property in wcd938x node for switching CTIA/OMTP Headset.
>>
>> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
>> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280-crd.dts | 4 ++
>> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 52 ++++++++++++++
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 113 +++++++++++++++++++++++++++++++
>> 3 files changed, 169 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
>> index cd2755c..035cca9 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
>> @@ -72,6 +72,10 @@ ap_ts_pen_1v8: &i2c13 {
>> pins = "gpio51";
>> };
>>
>> +&wcd938x {
>> + qcom,us-euro-gpios = <&tlmm 81 0>;
>> +};
>> +
> Maybe using a defined value is possible, rather than an obscure zero ?
> GPIO_ACTIVE_HIGH ?
Okay. Will change accordingly!!!
>
>
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs
2022-01-03 11:12 ` [PATCH v2 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs Srinivasa Rao Mandadapu
2022-01-04 22:04 ` Vincent Knecht
@ 2022-01-04 22:23 ` Vincent Knecht
2022-02-03 10:43 ` Srinivasa Rao Mandadapu
2022-01-05 20:15 ` Stephen Boyd
2 siblings, 1 reply; 14+ messages in thread
From: Vincent Knecht @ 2022-01-04 22:23 UTC (permalink / raw)
To: Srinivasa Rao Mandadapu, agross, bjorn.andersson, robh+dt,
linux-arm-msm, devicetree, linux-kernel, rohitkr,
srinivas.kandagatla, dianders, swboyd, judyhsiao
Cc: Venkata Prasad Potturu
Le lundi 03 janvier 2022 à 16:42 +0530, Srinivasa Rao Mandadapu a écrit :
> SC7280 has VA, TX and RX macros with SoundWire Controllers to attach with
> codecs like WCD938x, max98360a using soundwire masters and i2s bus.
> Add these nodes for sc7280 based platforms audio use case.
> Add tlmm gpio property in wcd938x node for switching CTIA/OMTP Headset.
>
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280-crd.dts | 4 ++
> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 52 ++++++++++++++
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 113 +++++++++++++++++++++++++++++++
> 3 files changed, 169 insertions(+)
[...]
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> index ddeb508..94614c9 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> @@ -636,3 +636,55 @@
> bias-pull-up;
> };
> };
> +
> +&swr0 {
> + wcd_rx: wcd938x-rx{
Space before brace...
> + compatible = "sdw20217010d00";
> + reg = <0 4>;
> + #sound-dai-cells = <1>;
> + qcom,rx-port-mapping = <1 2 3 4 5>;
> + };
> +};
> +
> +&swr1 {
> + wcd_tx: wcd938x-tx{
Ditto...
> + compatible = "sdw20217010d00";
> + reg = <0 3>;
> + #sound-dai-cells = <1>;
> + qcom,tx-port-mapping = <1 2 3 4>;
> + };
> +};
> +
> +&soc {
> + max98360a: audio-codec-0 {
> + compatible = "maxim,max98360a";
> + pinctrl-names = "default";
> + pinctrl-0 = <&_en>;
> + sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
> + #sound-dai-cells = <0>;
> + };
> +
> + wcd938x: codec {
> + compatible = "qcom,wcd9380-codec";
> + #sound-dai-cells = <1>;
> +
> + reset-gpios = <&tlmm 83 0>;
GPIO_ACTIVE_HIGH ?
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v2 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs
2022-01-04 22:23 ` Vincent Knecht
@ 2022-02-03 10:43 ` Srinivasa Rao Mandadapu
0 siblings, 0 replies; 14+ messages in thread
From: Srinivasa Rao Mandadapu @ 2022-02-03 10:43 UTC (permalink / raw)
To: Vincent Knecht, agross, bjorn.andersson, robh+dt, linux-arm-msm,
devicetree, linux-kernel, rohitkr, srinivas.kandagatla, dianders,
swboyd, judyhsiao
Cc: Venkata Prasad Potturu
On 1/5/2022 3:53 AM, Vincent Knecht wrote:
Thanks for Your team Vincent!!!
> Le lundi 03 janvier 2022 à 16:42 +0530, Srinivasa Rao Mandadapu a écrit :
>> SC7280 has VA, TX and RX macros with SoundWire Controllers to attach with
>> codecs like WCD938x, max98360a using soundwire masters and i2s bus.
>> Add these nodes for sc7280 based platforms audio use case.
>> Add tlmm gpio property in wcd938x node for switching CTIA/OMTP Headset.
>>
>> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
>> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280-crd.dts | 4 ++
>> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 52 ++++++++++++++
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 113 +++++++++++++++++++++++++++++++
>> 3 files changed, 169 insertions(+)
> [...]
>
>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> index ddeb508..94614c9 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> @@ -636,3 +636,55 @@
>> bias-pull-up;
>> };
>> };
>> +
>> +&swr0 {
>> + wcd_rx: wcd938x-rx{
> Space before brace...
Okay.
>
>> + compatible = "sdw20217010d00";
>> + reg = <0 4>;
>> + #sound-dai-cells = <1>;
>> + qcom,rx-port-mapping = <1 2 3 4 5>;
>> + };
>> +};
>> +
>> +&swr1 {
>> + wcd_tx: wcd938x-tx{
> Ditto...
Okay.
>
>> + compatible = "sdw20217010d00";
>> + reg = <0 3>;
>> + #sound-dai-cells = <1>;
>> + qcom,tx-port-mapping = <1 2 3 4>;
>> + };
>> +};
>> +
>> +&soc {
>> + max98360a: audio-codec-0 {
>> + compatible = "maxim,max98360a";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&_en>;
>> + sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
>> + #sound-dai-cells = <0>;
>> + };
>> +
>> + wcd938x: codec {
>> + compatible = "qcom,wcd9380-codec";
>> + #sound-dai-cells = <1>;
>> +
>> + reset-gpios = <&tlmm 83 0>;
> GPIO_ACTIVE_HIGH ?
Okay. Will change accordingly.
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs
2022-01-03 11:12 ` [PATCH v2 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs Srinivasa Rao Mandadapu
2022-01-04 22:04 ` Vincent Knecht
2022-01-04 22:23 ` Vincent Knecht
@ 2022-01-05 20:15 ` Stephen Boyd
2022-02-03 11:04 ` Srinivasa Rao Mandadapu
2 siblings, 1 reply; 14+ messages in thread
From: Stephen Boyd @ 2022-01-05 20:15 UTC (permalink / raw)
To: Srinivasa Rao Mandadapu, agross, bjorn.andersson, devicetree,
dianders, judyhsiao, linux-arm-msm, linux-kernel, robh+dt,
rohitkr, srinivas.kandagatla
Cc: Venkata Prasad Potturu
Quoting Srinivasa Rao Mandadapu (2022-01-03 03:12:58)
> SC7280 has VA, TX and RX macros with SoundWire Controllers to attach with
> codecs like WCD938x, max98360a using soundwire masters and i2s bus.
> Add these nodes for sc7280 based platforms audio use case.
> Add tlmm gpio property in wcd938x node for switching CTIA/OMTP Headset.
>
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280-crd.dts | 4 ++
> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 52 ++++++++++++++
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 113 +++++++++++++++++++++++++++++++
> 3 files changed, 169 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
> index cd2755c..035cca9 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
> @@ -72,6 +72,10 @@ ap_ts_pen_1v8: &i2c13 {
> pins = "gpio51";
> };
>
> +&wcd938x {
> + qcom,us-euro-gpios = <&tlmm 81 0>;
Why is this a qcom prefix vs. a standard foo-gpios property?
> +};
> +
> &tlmm {
> tp_int_odl: tp-int-odl {
> pins = "gpio7";
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> index ddeb508..94614c9 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> @@ -636,3 +636,55 @@
> bias-pull-up;
> };
> };
> +
> +&swr0 {
> + wcd_rx: wcd938x-rx{
space before { please
Also, are these speakers or amps or something like that? I'd expect the
node name to be more generic.
> + compatible = "sdw20217010d00";
> + reg = <0 4>;
> + #sound-dai-cells = <1>;
> + qcom,rx-port-mapping = <1 2 3 4 5>;
> + };
> +};
> +
> +&swr1 {
> + wcd_tx: wcd938x-tx{
> + compatible = "sdw20217010d00";
> + reg = <0 3>;
> + #sound-dai-cells = <1>;
> + qcom,tx-port-mapping = <1 2 3 4>;
> + };
> +};
> +
> +&soc {
> + max98360a: audio-codec-0 {
This shouldn't be a child of the soc node.
> + compatible = "maxim,max98360a";
> + pinctrl-names = "default";
> + pinctrl-0 = <&_en>;
> + sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
> + #sound-dai-cells = <0>;
> + };
> +
> + wcd938x: codec {
Same comment.
> + compatible = "qcom,wcd9380-codec";
> + #sound-dai-cells = <1>;
> +
> + reset-gpios = <&tlmm 83 0>;
> +
> + qcom,rx-device = <&wcd_rx>;
> + qcom,tx-device = <&wcd_tx>;
> +
> + vdd-rxtx-supply = <&vreg_l18b_1p8>;
> + vdd-io-supply = <&vreg_l18b_1p8>;
> + vdd-buck-supply = <&vreg_l17b_1p8>;
> + vdd-mic-bias-supply = <&vreg_bob>;
> +
> + qcom,micbias1-microvolt = <1800000>;
> + qcom,micbias2-microvolt = <1800000>;
> + qcom,micbias3-microvolt = <1800000>;
> + qcom,micbias4-microvolt = <1800000>;
> +
> + qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
> + qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
> + qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
> + };
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 6233f2c..c0d9de3 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -1744,6 +1744,119 @@
> #clock-cells = <1>;
> };
>
> + rxmacro: rxmacro@3200000 {
What is rxmacro? Maybe 'soundwire'?
> + pinctrl-names = "default";
> + pinctrl-0 = <&rx_swr_active>;
> + compatible = "qcom,sc7280-lpass-rx-macro";
> + reg = <0 0x3200000 0 0x1000>;
> +
> + clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
> + <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
> + <&vamacro>;
> + clock-names = "mclk", "npl", "fsgen";
> + #clock-cells = <0>;
> + clock-frequency = <9600000>;
> + clock-output-names = "mclk";
> + #sound-dai-cells = <1>;
> + };
> +
> + /* rx macro */
> + swr0: soundwire-controller@3210000 {
Is 'controller' redundant? i.e. soundwire is always a controller? Maybe
'soundwire' is better
> + reg = <0 0x3210000 0 0x2000>;
> + compatible = "qcom,soundwire-v1.6.0";
> + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&rxmacro>;
> + clock-names = "iface";
> + label = "RX";
> +
> + qcom,din-ports = <0>;
> + qcom,dout-ports = <5>;
> + qcom,swrm-hctl-reg = <0x032a90a0>;
> +
> + qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xFF 0xFF>;
> + qcom,ports-sinterval-low = /bits/ 8 <0x03 0x3F 0x1F 0x03 0x03>;
> + qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0B 0x01 0x01>;
> + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0B 0x00 0x00>;
> + qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
> + qcom,ports-block-pack-mode = /bits/ 8 <0xFF 0x00 0x01 0xFF 0xFF>;
> + qcom,ports-hstart = /bits/ 8 <0xFF 0x03 0xFF 0xFF 0xFF>;
> + qcom,ports-hstop = /bits/ 8 <0xFF 0x06 0xFF 0xFF 0xFF>;
> + qcom,ports-block-group-count = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0x00>;
Why is this bit stuff in DT vs. in the device driver?
> +
> + #sound-dai-cells = <1>;
> + #address-cells = <2>;
> + #size-cells = <0>;
> + };
> +
> + txmacro: txmacro@3220000 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&tx_swr_active>;
> + compatible = "qcom,sc7280-lpass-tx-macro";
> + reg = <0 0x3220000 0 0x1000>;
> +
> + clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
> + <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
> + <&vamacro>;
Please align the clocks here so the < starts on the same column.
> + clock-names = "mclk", "npl", "fsgen";
> +
> + #clock-cells = <0>;
> + clock-frequency = <9600000>;
> + clock-output-names = "mclk";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + #sound-dai-cells = <1>;
> + };
> +
> + /* tx macro */
Do we need these comments? Please remove them as they're practically
useless.
> + swr1: soundwire-controller@3230000 {
> + reg = <0 0x3230000 0 0x2000>;
> + compatible = "qcom,soundwire-v1.6.0";
> +
> + interrupts-extended =
> + <&intc GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
> + <&pdc 130 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "swr_master_irq", "swr_wake_irq";
> + clocks = <&txmacro>;
> + clock-names = "iface";
> + label = "TX";
> +
> + qcom,din-ports = <3>;
> + qcom,dout-ports = <0>;
> + qcom,swrm-hctl-reg = <0x032a90a8>;
This looks like some common register location for soundwire oops bits.
Is it another device? Or maybe it's a common register base that needs to
be a syscon?
> +
> + qcom,ports-sinterval-low = /bits/ 8 <0x01 0x03 0x03>;
> + qcom,ports-offset1 = /bits/ 8 <0x01 0x00 0x02>;
> + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00>;
> + qcom,ports-hstart = /bits/ 8 <0xFF 0xFF 0xFF>;
> + qcom,ports-hstop = /bits/ 8 <0xFF 0xFF 0xFF>;
> + qcom,ports-word-length = /bits/ 8 <0xFF 0x0 0xFF>;
> + qcom,ports-block-pack-mode = /bits/ 8 <0xFF 0xFF 0xFF>;
> + qcom,ports-block-group-count = /bits/ 8 <0xFF 0xFF 0xFF>;
> + qcom,ports-lane-control = /bits/ 8 <0x00 0x01 0x00>;
> + qcom,port-offset = <1>;
> +
> + #sound-dai-cells = <1>;
> + #address-cells = <2>;
> + #size-cells = <0>;
> + };
> +
> + vamacro: codec@3370000 {
> + compatible = "qcom,sc7280-lpass-va-macro";
> + pinctrl-0 = <&dmic01_active>;
> + pinctrl-names = "default";
> +
> + vdd-micb-supply = <&vreg_bob>;
The supplies need to be set in the board file, no the soc file as they
can be different depending on what the hardware engineer wires to the
pins on the SoC.
> + reg = <0 0x3370000 0 0x1000>;
> + clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
> + <&lpass_audiocc LPASS_AUDIO_CC_RX_MCLK_CLK>;
> + clock-names = "mclk", "macro";
> +
> + #clock-cells = <0>;
> + clock-frequency = <9600000>;
> + clock-output-names = "fsgen";
> + #sound-dai-cells = <1>;
> + };
> +
> lpass_tlmm: pinctrl@33c0000 {
> compatible = "qcom,sc7280-lpass-lpi-pinctrl";
> reg = <0 0x33c0000 0x0 0x20000>,
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v2 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs
2022-01-05 20:15 ` Stephen Boyd
@ 2022-02-03 11:04 ` Srinivasa Rao Mandadapu
0 siblings, 0 replies; 14+ messages in thread
From: Srinivasa Rao Mandadapu @ 2022-02-03 11:04 UTC (permalink / raw)
To: Stephen Boyd, agross, bjorn.andersson, devicetree, dianders,
judyhsiao, linux-arm-msm, linux-kernel, robh+dt, rohitkr,
srinivas.kandagatla
Cc: Venkata Prasad Potturu
On 1/6/2022 1:45 AM, Stephen Boyd wrote:
Thanks for Your time Stephen!!!
> Quoting Srinivasa Rao Mandadapu (2022-01-03 03:12:58)
>> SC7280 has VA, TX and RX macros with SoundWire Controllers to attach with
>> codecs like WCD938x, max98360a using soundwire masters and i2s bus.
>> Add these nodes for sc7280 based platforms audio use case.
>> Add tlmm gpio property in wcd938x node for switching CTIA/OMTP Headset.
>>
>> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
>> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280-crd.dts | 4 ++
>> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 52 ++++++++++++++
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 113 +++++++++++++++++++++++++++++++
>> 3 files changed, 169 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
>> index cd2755c..035cca9 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
>> @@ -72,6 +72,10 @@ ap_ts_pen_1v8: &i2c13 {
>> pins = "gpio51";
>> };
>>
>> +&wcd938x {
>> + qcom,us-euro-gpios = <&tlmm 81 0>;
> Why is this a qcom prefix vs. a standard foo-gpios property?
Okay. will remove qcom.
>
>> +};
>> +
>> &tlmm {
>> tp_int_odl: tp-int-odl {
>> pins = "gpio7";
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> index ddeb508..94614c9 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> @@ -636,3 +636,55 @@
>> bias-pull-up;
>> };
>> };
>> +
>> +&swr0 {
>> + wcd_rx: wcd938x-rx{
> space before { please
>
> Also, are these speakers or amps or something like that? I'd expect the
> node name to be more generic.
Okay. Will change accordingly.
>
>> + compatible = "sdw20217010d00";
>> + reg = <0 4>;
>> + #sound-dai-cells = <1>;
>> + qcom,rx-port-mapping = <1 2 3 4 5>;
>> + };
>> +};
>> +
>> +&swr1 {
>> + wcd_tx: wcd938x-tx{
>> + compatible = "sdw20217010d00";
>> + reg = <0 3>;
>> + #sound-dai-cells = <1>;
>> + qcom,tx-port-mapping = <1 2 3 4>;
>> + };
>> +};
>> +
>> +&soc {
>> + max98360a: audio-codec-0 {
> This shouldn't be a child of the soc node.
Okay. Will move it to root node.
>
>> + compatible = "maxim,max98360a";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&_en>;
>> + sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
>> + #sound-dai-cells = <0>;
>> + };
>> +
>> + wcd938x: codec {
> Same comment.
Okay.
>
>> + compatible = "qcom,wcd9380-codec";
>> + #sound-dai-cells = <1>;
>> +
>> + reset-gpios = <&tlmm 83 0>;
>> +
>> + qcom,rx-device = <&wcd_rx>;
>> + qcom,tx-device = <&wcd_tx>;
>> +
>> + vdd-rxtx-supply = <&vreg_l18b_1p8>;
>> + vdd-io-supply = <&vreg_l18b_1p8>;
>> + vdd-buck-supply = <&vreg_l17b_1p8>;
>> + vdd-mic-bias-supply = <&vreg_bob>;
>> +
>> + qcom,micbias1-microvolt = <1800000>;
>> + qcom,micbias2-microvolt = <1800000>;
>> + qcom,micbias3-microvolt = <1800000>;
>> + qcom,micbias4-microvolt = <1800000>;
>> +
>> + qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
>> + qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
>> + qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
>> + };
>> +};
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 6233f2c..c0d9de3 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -1744,6 +1744,119 @@
>> #clock-cells = <1>;
>> };
>>
>> + rxmacro: rxmacro@3200000 {
> What is rxmacro? Maybe 'soundwire'?
No. it's not soundwire. it's digital codec macro internal to LPASS.
>
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&rx_swr_active>;
>> + compatible = "qcom,sc7280-lpass-rx-macro";
>> + reg = <0 0x3200000 0 0x1000>;
>> +
>> + clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
>> + <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
>> + <&vamacro>;
>> + clock-names = "mclk", "npl", "fsgen";
>> + #clock-cells = <0>;
>> + clock-frequency = <9600000>;
>> + clock-output-names = "mclk";
>> + #sound-dai-cells = <1>;
>> + };
>> +
>> + /* rx macro */
>> + swr0: soundwire-controller@3210000 {
> Is 'controller' redundant? i.e. soundwire is always a controller? Maybe
> 'soundwire' is better
Okay. will remove controller.
>
>> + reg = <0 0x3210000 0 0x2000>;
>> + compatible = "qcom,soundwire-v1.6.0";
>> + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&rxmacro>;
>> + clock-names = "iface";
>> + label = "RX";
>> +
>> + qcom,din-ports = <0>;
>> + qcom,dout-ports = <5>;
>> + qcom,swrm-hctl-reg = <0x032a90a0>;
>> +
>> + qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xFF 0xFF>;
>> + qcom,ports-sinterval-low = /bits/ 8 <0x03 0x3F 0x1F 0x03 0x03>;
>> + qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0B 0x01 0x01>;
>> + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0B 0x00 0x00>;
>> + qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
>> + qcom,ports-block-pack-mode = /bits/ 8 <0xFF 0x00 0x01 0xFF 0xFF>;
>> + qcom,ports-hstart = /bits/ 8 <0xFF 0x03 0xFF 0xFF 0xFF>;
>> + qcom,ports-hstop = /bits/ 8 <0xFF 0x06 0xFF 0xFF 0xFF>;
>> + qcom,ports-block-group-count = /bits/ 8 <0xFF 0xFF 0xFF 0xFF 0x00>;
> Why is this bit stuff in DT vs. in the device driver?
This is soundwire ports configuration and is followed in
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/qcom/sm8250.dtsi?h=v5.17-rc2
>
>> +
>> + #sound-dai-cells = <1>;
>> + #address-cells = <2>;
>> + #size-cells = <0>;
>> + };
>> +
>> + txmacro: txmacro@3220000 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&tx_swr_active>;
>> + compatible = "qcom,sc7280-lpass-tx-macro";
>> + reg = <0 0x3220000 0 0x1000>;
>> +
>> + clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
>> + <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
>> + <&vamacro>;
> Please align the clocks here so the < starts on the same column.
Okay.
>
>> + clock-names = "mclk", "npl", "fsgen";
>> +
>> + #clock-cells = <0>;
>> + clock-frequency = <9600000>;
>> + clock-output-names = "mclk";
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + #sound-dai-cells = <1>;
>> + };
>> +
>> + /* tx macro */
> Do we need these comments? Please remove them as they're practically
> useless.
Okay. Will remove it.
>
>> + swr1: soundwire-controller@3230000 {
>> + reg = <0 0x3230000 0 0x2000>;
>> + compatible = "qcom,soundwire-v1.6.0";
>> +
>> + interrupts-extended =
>> + <&intc GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
>> + <&pdc 130 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "swr_master_irq", "swr_wake_irq";
>> + clocks = <&txmacro>;
>> + clock-names = "iface";
>> + label = "TX";
>> +
>> + qcom,din-ports = <3>;
>> + qcom,dout-ports = <0>;
>> + qcom,swrm-hctl-reg = <0x032a90a8>;
> This looks like some common register location for soundwire oops bits.
> Is it another device? Or maybe it's a common register base that needs to
> be a syscon?
We are in discussion on this, how to handle it appropriately. Will
change accordingly after design concluded.
>
>> +
>> + qcom,ports-sinterval-low = /bits/ 8 <0x01 0x03 0x03>;
>> + qcom,ports-offset1 = /bits/ 8 <0x01 0x00 0x02>;
>> + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00>;
>> + qcom,ports-hstart = /bits/ 8 <0xFF 0xFF 0xFF>;
>> + qcom,ports-hstop = /bits/ 8 <0xFF 0xFF 0xFF>;
>> + qcom,ports-word-length = /bits/ 8 <0xFF 0x0 0xFF>;
>> + qcom,ports-block-pack-mode = /bits/ 8 <0xFF 0xFF 0xFF>;
>> + qcom,ports-block-group-count = /bits/ 8 <0xFF 0xFF 0xFF>;
>> + qcom,ports-lane-control = /bits/ 8 <0x00 0x01 0x00>;
>> + qcom,port-offset = <1>;
>> +
>> + #sound-dai-cells = <1>;
>> + #address-cells = <2>;
>> + #size-cells = <0>;
>> + };
>> +
>> + vamacro: codec@3370000 {
>> + compatible = "qcom,sc7280-lpass-va-macro";
>> + pinctrl-0 = <&dmic01_active>;
>> + pinctrl-names = "default";
>> +
>> + vdd-micb-supply = <&vreg_bob>;
> The supplies need to be set in the board file, no the soc file as they
> can be different depending on what the hardware engineer wires to the
> pins on the SoC.
Okay. Will move it to board specific file.
>
>> + reg = <0 0x3370000 0 0x1000>;
>> + clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
>> + <&lpass_audiocc LPASS_AUDIO_CC_RX_MCLK_CLK>;
>> + clock-names = "mclk", "macro";
>> +
>> + #clock-cells = <0>;
>> + clock-frequency = <9600000>;
>> + clock-output-names = "fsgen";
>> + #sound-dai-cells = <1>;
>> + };
>> +
>> lpass_tlmm: pinctrl@33c0000 {
>> compatible = "qcom,sc7280-lpass-lpi-pinctrl";
>> reg = <0 0x33c0000 0x0 0x20000>,
>> --
>> 2.7.4
>>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node
2022-01-03 11:12 [PATCH v2 0/3] Add soundcard support for sc7280 based platforms Srinivasa Rao Mandadapu
2022-01-03 11:12 ` [PATCH v2 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs Srinivasa Rao Mandadapu
@ 2022-01-03 11:12 ` Srinivasa Rao Mandadapu
2022-01-05 21:07 ` Stephen Boyd
2022-01-03 11:13 ` [PATCH v2 3/3] arm64: dts: qcom: sc7280: add sound card support Srinivasa Rao Mandadapu
2 siblings, 1 reply; 14+ messages in thread
From: Srinivasa Rao Mandadapu @ 2022-01-03 11:12 UTC (permalink / raw)
To: agross, bjorn.andersson, robh+dt, linux-arm-msm, devicetree,
linux-kernel, rohitkr, srinivas.kandagatla, dianders, swboyd,
judyhsiao
Cc: Srinivasa Rao Mandadapu, Venkata Prasad Potturu
Add lpass cpu node for audio on sc7280 based platforms.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 28 ++++++++++++++++
arch/arm64/boot/dts/qcom/sc7280.dtsi | 57 ++++++++++++++++++++++++++++++++
2 files changed, 85 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index 94614c9..3449d56 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -688,3 +688,31 @@
qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
};
};
+
+&lpass_cpu {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&sec_mi2s_active>;
+
+ wcd-rx@6 {
+ reg = <LPASS_CDC_DMA_RX0>;
+ };
+
+ wcd-tx@19 {
+ reg = <LPASS_CDC_DMA_TX3>;
+ };
+
+ mi2s-secondary@1 {
+ reg = <MI2S_SECONDARY>;
+ qcom,playback-sd-lines = <0>;
+ };
+
+ hdmi-primary@5 {
+ reg = <LPASS_DP_RX>;
+ };
+
+ va-tx@25 {
+ reg = <LPASS_CDC_DMA_VA_TX0>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index c0d9de3..68c7755 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -17,6 +17,7 @@
#include <dt-bindings/reset/qcom,sdm845-aoss.h>
#include <dt-bindings/reset/qcom,sdm845-pdc.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
+#include <dt-bindings/sound/qcom,lpass.h>
#include <dt-bindings/thermal/thermal.h>
/ {
@@ -1840,6 +1841,62 @@
#size-cells = <0>;
};
+ lpass_cpu: qcom,lpass@3260000 {
+ compatible = "qcom,sc7280-lpass-cpu";
+ reg = <0 0x3260000 0 0xC000>,
+ <0 0x3280000 0 0x29000>,
+ <0 0x3340000 0 0x29000>,
+ <0 0x336C000 0 0x3000>,
+ <0 0x3987000 0 0x68000>,
+ <0 0x3B00000 0 0x29000>;
+ reg-names = "lpass-rxtx-cdc-dma-lpm",
+ "lpass-rxtx-lpaif",
+ "lpass-va-lpaif",
+ "lpass-va-cdc-dma-lpm",
+ "lpass-hdmiif",
+ "lpass-lpaif";
+
+ iommus = <&apps_smmu 0x1820 0>,
+ <&apps_smmu 0x1821 0>,
+ <&apps_smmu 0x1832 0>;
+ status = "disabled";
+
+ power-domains = <&rpmhpd SC7280_LCX>;
+ power-domain-names = "lcx";
+ required-opps = <&rpmhpd_opp_nom>;
+
+ clocks = <&lpass_aon LPASS_AON_CC_AUDIO_HM_H_CLK>,
+ <&lpasscc LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK>,
+ <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM0_CLK>,
+ <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM1_CLK>,
+ <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM2_CLK>,
+ <&lpasscc LPASS_CORE_CC_EXT_IF0_IBIT_CLK>,
+ <&lpasscc LPASS_CORE_CC_EXT_IF1_IBIT_CLK>,
+ <&lpass_aon LPASS_AON_CC_VA_MEM0_CLK>;
+ clock-names = "aon_cc_audio_hm_h",
+ "core_cc_sysnoc_mport_core",
+ "audio_cc_codec_mem0",
+ "audio_cc_codec_mem1",
+ "audio_cc_codec_mem2",
+ "core_cc_ext_if0_ibit",
+ "core_cc_ext_if1_ibit",
+ "aon_cc_va_mem0";
+
+ #sound-dai-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+
+ interrupt-names = "lpass-irq-lpaif",
+ "lpass-irq-vaif",
+ "lpass-irq-rxtxif",
+ "lpass-irq-hdmi";
+ };
+
vamacro: codec@3370000 {
compatible = "qcom,sc7280-lpass-va-macro";
pinctrl-0 = <&dmic01_active>;
--
2.7.4
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v2 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node
2022-01-03 11:12 ` [PATCH v2 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node Srinivasa Rao Mandadapu
@ 2022-01-05 21:07 ` Stephen Boyd
2022-02-03 11:07 ` Srinivasa Rao Mandadapu
0 siblings, 1 reply; 14+ messages in thread
From: Stephen Boyd @ 2022-01-05 21:07 UTC (permalink / raw)
To: Srinivasa Rao Mandadapu, agross, bjorn.andersson, devicetree,
dianders, judyhsiao, linux-arm-msm, linux-kernel, robh+dt,
rohitkr, srinivas.kandagatla
Cc: Venkata Prasad Potturu
Quoting Srinivasa Rao Mandadapu (2022-01-03 03:12:59)
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index c0d9de3..68c7755 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -17,6 +17,7 @@
> #include <dt-bindings/reset/qcom,sdm845-aoss.h>
> #include <dt-bindings/reset/qcom,sdm845-pdc.h>
> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
> +#include <dt-bindings/sound/qcom,lpass.h>
> #include <dt-bindings/thermal/thermal.h>
>
> / {
> @@ -1840,6 +1841,62 @@
> #size-cells = <0>;
> };
>
> + lpass_cpu: qcom,lpass@3260000 {
audio-subsystem@3260000?
> + compatible = "qcom,sc7280-lpass-cpu";
> + reg = <0 0x3260000 0 0xC000>,
> + <0 0x3280000 0 0x29000>,
> + <0 0x3340000 0 0x29000>,
> + <0 0x336C000 0 0x3000>,
> + <0 0x3987000 0 0x68000>,
> + <0 0x3B00000 0 0x29000>;
> + reg-names = "lpass-rxtx-cdc-dma-lpm",
> + "lpass-rxtx-lpaif",
> + "lpass-va-lpaif",
> + "lpass-va-cdc-dma-lpm",
> + "lpass-hdmiif",
> + "lpass-lpaif";
> +
> + iommus = <&apps_smmu 0x1820 0>,
> + <&apps_smmu 0x1821 0>,
> + <&apps_smmu 0x1832 0>;
> + status = "disabled";
> +
> + power-domains = <&rpmhpd SC7280_LCX>;
> + power-domain-names = "lcx";
> + required-opps = <&rpmhpd_opp_nom>;
> +
> + clocks = <&lpass_aon LPASS_AON_CC_AUDIO_HM_H_CLK>,
> + <&lpasscc LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK>,
> + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM0_CLK>,
> + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM1_CLK>,
> + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM2_CLK>,
> + <&lpasscc LPASS_CORE_CC_EXT_IF0_IBIT_CLK>,
> + <&lpasscc LPASS_CORE_CC_EXT_IF1_IBIT_CLK>,
> + <&lpass_aon LPASS_AON_CC_VA_MEM0_CLK>;
> + clock-names = "aon_cc_audio_hm_h",
> + "core_cc_sysnoc_mport_core",
> + "audio_cc_codec_mem0",
> + "audio_cc_codec_mem1",
> + "audio_cc_codec_mem2",
> + "core_cc_ext_if0_ibit",
> + "core_cc_ext_if1_ibit",
> + "aon_cc_va_mem0";
Please align these things on " and <.
> +
> + #sound-dai-cells = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> +
> + interrupt-names = "lpass-irq-lpaif",
> + "lpass-irq-vaif",
> + "lpass-irq-rxtxif",
> + "lpass-irq-hdmi";
Same.
> + };
> +
> vamacro: codec@3370000 {
> compatible = "qcom,sc7280-lpass-va-macro";
> pinctrl-0 = <&dmic01_active>;
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v2 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node
2022-01-05 21:07 ` Stephen Boyd
@ 2022-02-03 11:07 ` Srinivasa Rao Mandadapu
0 siblings, 0 replies; 14+ messages in thread
From: Srinivasa Rao Mandadapu @ 2022-02-03 11:07 UTC (permalink / raw)
To: Stephen Boyd, agross, bjorn.andersson, devicetree, dianders,
judyhsiao, linux-arm-msm, linux-kernel, robh+dt, rohitkr,
srinivas.kandagatla
Cc: Venkata Prasad Potturu
On 1/6/2022 2:37 AM, Stephen Boyd wrote:
Thanks for Your time Stephen!!!
> Quoting Srinivasa Rao Mandadapu (2022-01-03 03:12:59)
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index c0d9de3..68c7755 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -17,6 +17,7 @@
>> #include <dt-bindings/reset/qcom,sdm845-aoss.h>
>> #include <dt-bindings/reset/qcom,sdm845-pdc.h>
>> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>> +#include <dt-bindings/sound/qcom,lpass.h>
>> #include <dt-bindings/thermal/thermal.h>
>>
>> / {
>> @@ -1840,6 +1841,62 @@
>> #size-cells = <0>;
>> };
>>
>> + lpass_cpu: qcom,lpass@3260000 {
> audio-subsystem@3260000?
Okay. will change accordingly.
>
>> + compatible = "qcom,sc7280-lpass-cpu";
>> + reg = <0 0x3260000 0 0xC000>,
>> + <0 0x3280000 0 0x29000>,
>> + <0 0x3340000 0 0x29000>,
>> + <0 0x336C000 0 0x3000>,
>> + <0 0x3987000 0 0x68000>,
>> + <0 0x3B00000 0 0x29000>;
>> + reg-names = "lpass-rxtx-cdc-dma-lpm",
>> + "lpass-rxtx-lpaif",
>> + "lpass-va-lpaif",
>> + "lpass-va-cdc-dma-lpm",
>> + "lpass-hdmiif",
>> + "lpass-lpaif";
>> +
>> + iommus = <&apps_smmu 0x1820 0>,
>> + <&apps_smmu 0x1821 0>,
>> + <&apps_smmu 0x1832 0>;
>> + status = "disabled";
>> +
>> + power-domains = <&rpmhpd SC7280_LCX>;
>> + power-domain-names = "lcx";
>> + required-opps = <&rpmhpd_opp_nom>;
>> +
>> + clocks = <&lpass_aon LPASS_AON_CC_AUDIO_HM_H_CLK>,
>> + <&lpasscc LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK>,
>> + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM0_CLK>,
>> + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM1_CLK>,
>> + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM2_CLK>,
>> + <&lpasscc LPASS_CORE_CC_EXT_IF0_IBIT_CLK>,
>> + <&lpasscc LPASS_CORE_CC_EXT_IF1_IBIT_CLK>,
>> + <&lpass_aon LPASS_AON_CC_VA_MEM0_CLK>;
>> + clock-names = "aon_cc_audio_hm_h",
>> + "core_cc_sysnoc_mport_core",
>> + "audio_cc_codec_mem0",
>> + "audio_cc_codec_mem1",
>> + "audio_cc_codec_mem2",
>> + "core_cc_ext_if0_ibit",
>> + "core_cc_ext_if1_ibit",
>> + "aon_cc_va_mem0";
> Please align these things on " and <.
Okay.
>
>> +
>> + #sound-dai-cells = <1>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
>> +
>> + interrupt-names = "lpass-irq-lpaif",
>> + "lpass-irq-vaif",
>> + "lpass-irq-rxtxif",
>> + "lpass-irq-hdmi";
> Same.
Okay.
>
>> + };
>> +
>> vamacro: codec@3370000 {
>> compatible = "qcom,sc7280-lpass-va-macro";
>> pinctrl-0 = <&dmic01_active>;
>> --
>> 2.7.4
>>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 3/3] arm64: dts: qcom: sc7280: add sound card support
2022-01-03 11:12 [PATCH v2 0/3] Add soundcard support for sc7280 based platforms Srinivasa Rao Mandadapu
2022-01-03 11:12 ` [PATCH v2 1/3] arm64: dts: qcom: sc7280: Add nodes for va tx and rx macros and external codecs Srinivasa Rao Mandadapu
2022-01-03 11:12 ` [PATCH v2 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node Srinivasa Rao Mandadapu
@ 2022-01-03 11:13 ` Srinivasa Rao Mandadapu
2022-01-05 21:10 ` Stephen Boyd
2 siblings, 1 reply; 14+ messages in thread
From: Srinivasa Rao Mandadapu @ 2022-01-03 11:13 UTC (permalink / raw)
To: agross, bjorn.andersson, robh+dt, linux-arm-msm, devicetree,
linux-kernel, rohitkr, srinivas.kandagatla, dianders, swboyd,
judyhsiao
Cc: Srinivasa Rao Mandadapu, Venkata Prasad Potturu
This patch adds sound card support for MTP using WCD938x headset playback,
capture, I2S Speaker Playback and DMICs via VA macro.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7280-crd.dts | 8 +++
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 93 ++++++++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 ++
3 files changed, 104 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
index 035cca9..f55232e 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
@@ -76,6 +76,14 @@ ap_ts_pen_1v8: &i2c13 {
qcom,us-euro-gpios = <&tlmm 81 0>;
};
+&sound {
+ audio-routing =
+ "VA DMIC0", "MIC BIAS1",
+ "VA DMIC1", "MIC BIAS1",
+ "VA DMIC2", "MIC BIAS3",
+ "VA DMIC3", "MIC BIAS3";
+};
+
&tlmm {
tp_int_odl: tp-int-odl {
pins = "gpio7";
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index 3449d56..63b1184 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -637,6 +637,99 @@
};
};
+&sound {
+ compatible = "google,sc7280-herobrine";
+ model = "sc7280-wcd938x-max98360a-1mic";
+ status = "okay";
+ audio-routing =
+ "IN1_HPHL", "HPHL_OUT",
+ "IN2_HPHR", "HPHR_OUT",
+ "AMIC1", "MIC BIAS1",
+ "AMIC2", "MIC BIAS2",
+ "VA DMIC0", "MIC BIAS3",
+ "VA DMIC1", "MIC BIAS3",
+ "VA DMIC2", "MIC BIAS1",
+ "VA DMIC3", "MIC BIAS1",
+ "TX SWR_ADC0", "ADC1_OUTPUT",
+ "TX SWR_ADC1", "ADC2_OUTPUT",
+ "TX SWR_ADC2", "ADC3_OUTPUT",
+ "TX SWR_DMIC0", "DMIC1_OUTPUT",
+ "TX SWR_DMIC1", "DMIC2_OUTPUT",
+ "TX SWR_DMIC2", "DMIC3_OUTPUT",
+ "TX SWR_DMIC3", "DMIC4_OUTPUT",
+ "TX SWR_DMIC4", "DMIC5_OUTPUT",
+ "TX SWR_DMIC5", "DMIC6_OUTPUT",
+ "TX SWR_DMIC6", "DMIC7_OUTPUT",
+ "TX SWR_DMIC7", "DMIC8_OUTPUT";
+
+ qcom,msm-mbhc-hphl-swh = <1>;
+ qcom,msm-mbhc-gnd-swh = <1>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #sound-dai-cells = <0>;
+
+ dai-link@6 {
+ link-name = "WCD Playback";
+ reg = <LPASS_CDC_DMA_RX0>;
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
+ };
+
+ codec {
+ sound-dai = <&wcd938x 0>, <&swr0 0>, <&rxmacro 0>;
+ };
+ };
+
+ dai-link@19 {
+ link-name = "WCD Capture";
+ reg = <LPASS_CDC_DMA_TX3>;
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
+ };
+
+ codec {
+ sound-dai = <&wcd938x 1>, <&swr1 0>, <&txmacro 0>;
+ };
+ };
+
+ dai-link@1 {
+ link-name = "Secondary MI2S Playback";
+ reg = <MI2S_SECONDARY>;
+ cpu {
+ sound-dai = <&lpass_cpu MI2S_SECONDARY>;
+ };
+
+ codec {
+ sound-dai = <&max98360a>;
+ };
+ };
+
+ dai-link@5 {
+ link-name = "DP Playback";
+ reg = <LPASS_DP_RX>;
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_DP_RX>;
+ };
+
+ codec {
+ sound-dai = <&msm_dp>;
+ };
+ };
+
+ dai-link@25 {
+ link-name = "DMIC Capture";
+ reg = <LPASS_CDC_DMA_VA_TX0>;
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
+ };
+
+ codec {
+ sound-dai = <&vamacro 0>;
+ };
+ };
+};
+
&swr0 {
wcd_rx: wcd938x-rx{
compatible = "sdw20217010d00";
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 68c7755..57bc5ef 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2786,6 +2786,9 @@
};
+ sound: sound {
+ };
+
usb_1_hsphy: phy@88e3000 {
compatible = "qcom,sc7280-usb-hs-phy",
"qcom,usb-snps-hs-7nm-phy";
--
2.7.4
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v2 3/3] arm64: dts: qcom: sc7280: add sound card support
2022-01-03 11:13 ` [PATCH v2 3/3] arm64: dts: qcom: sc7280: add sound card support Srinivasa Rao Mandadapu
@ 2022-01-05 21:10 ` Stephen Boyd
2022-02-03 11:10 ` Srinivasa Rao Mandadapu
0 siblings, 1 reply; 14+ messages in thread
From: Stephen Boyd @ 2022-01-05 21:10 UTC (permalink / raw)
To: Srinivasa Rao Mandadapu, agross, bjorn.andersson, devicetree,
dianders, judyhsiao, linux-arm-msm, linux-kernel, robh+dt,
rohitkr, srinivas.kandagatla
Cc: Venkata Prasad Potturu
Quoting Srinivasa Rao Mandadapu (2022-01-03 03:13:00)
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> index 3449d56..63b1184 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> @@ -637,6 +637,99 @@
> };
> };
>
> +&sound {
> + compatible = "google,sc7280-herobrine";
> + model = "sc7280-wcd938x-max98360a-1mic";
> + status = "okay";
> + audio-routing =
> + "IN1_HPHL", "HPHL_OUT",
> + "IN2_HPHR", "HPHR_OUT",
> + "AMIC1", "MIC BIAS1",
> + "AMIC2", "MIC BIAS2",
> + "VA DMIC0", "MIC BIAS3",
> + "VA DMIC1", "MIC BIAS3",
> + "VA DMIC2", "MIC BIAS1",
> + "VA DMIC3", "MIC BIAS1",
> + "TX SWR_ADC0", "ADC1_OUTPUT",
> + "TX SWR_ADC1", "ADC2_OUTPUT",
> + "TX SWR_ADC2", "ADC3_OUTPUT",
> + "TX SWR_DMIC0", "DMIC1_OUTPUT",
> + "TX SWR_DMIC1", "DMIC2_OUTPUT",
> + "TX SWR_DMIC2", "DMIC3_OUTPUT",
> + "TX SWR_DMIC3", "DMIC4_OUTPUT",
> + "TX SWR_DMIC4", "DMIC5_OUTPUT",
> + "TX SWR_DMIC5", "DMIC6_OUTPUT",
> + "TX SWR_DMIC6", "DMIC7_OUTPUT",
> + "TX SWR_DMIC7", "DMIC8_OUTPUT";
> +
> + qcom,msm-mbhc-hphl-swh = <1>;
> + qcom,msm-mbhc-gnd-swh = <1>;
Why are these last extra tabbed?
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #sound-dai-cells = <0>;
> +
> + dai-link@6 {
> + link-name = "WCD Playback";
> + reg = <LPASS_CDC_DMA_RX0>;
> + cpu {
> + sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
> + };
> +
> + codec {
> + sound-dai = <&wcd938x 0>, <&swr0 0>, <&rxmacro 0>;
> + };
> + };
> +
> + dai-link@19 {
> + link-name = "WCD Capture";
> + reg = <LPASS_CDC_DMA_TX3>;
> + cpu {
> + sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
> + };
> +
> + codec {
> + sound-dai = <&wcd938x 1>, <&swr1 0>, <&txmacro 0>;
> + };
> + };
> +
> + dai-link@1 {
> + link-name = "Secondary MI2S Playback";
> + reg = <MI2S_SECONDARY>;
> + cpu {
> + sound-dai = <&lpass_cpu MI2S_SECONDARY>;
> + };
> +
> + codec {
> + sound-dai = <&max98360a>;
> + };
> + };
> +
> + dai-link@5 {
> + link-name = "DP Playback";
> + reg = <LPASS_DP_RX>;
> + cpu {
> + sound-dai = <&lpass_cpu LPASS_DP_RX>;
> + };
> +
> + codec {
> + sound-dai = <&msm_dp>;
Why double tabbed?
> + };
> + };
> +
> + dai-link@25 {
> + link-name = "DMIC Capture";
> + reg = <LPASS_CDC_DMA_VA_TX0>;
> + cpu {
> + sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
> + };
> +
> + codec {
> + sound-dai = <&vamacro 0>;
> + };
> + };
The order of the nodes seems arbitrary. Is there any sort order that can
be used to avoid conflicts in the future? Maybe the reg property because
that's how we sort the SoC node.
> +};
> +
> &swr0 {
> wcd_rx: wcd938x-rx{
> compatible = "sdw20217010d00";
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 68c7755..57bc5ef 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2786,6 +2786,9 @@
>
> };
>
> + sound: sound {
Is this really necessary? Certainly it shouldn't be in the SoC node as
it doesn't have a reg property.
> + };
> +
> usb_1_hsphy: phy@88e3000 {
> compatible = "qcom,sc7280-usb-hs-phy",
> "qcom,usb-snps-hs-7nm-phy";
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v2 3/3] arm64: dts: qcom: sc7280: add sound card support
2022-01-05 21:10 ` Stephen Boyd
@ 2022-02-03 11:10 ` Srinivasa Rao Mandadapu
0 siblings, 0 replies; 14+ messages in thread
From: Srinivasa Rao Mandadapu @ 2022-02-03 11:10 UTC (permalink / raw)
To: Stephen Boyd, agross, bjorn.andersson, devicetree, dianders,
judyhsiao, linux-arm-msm, linux-kernel, robh+dt, rohitkr,
srinivas.kandagatla
Cc: Venkata Prasad Potturu
On 1/6/2022 2:40 AM, Stephen Boyd wrote:
Thanks for Your time Stephen!!!
> Quoting Srinivasa Rao Mandadapu (2022-01-03 03:13:00)
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> index 3449d56..63b1184 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> @@ -637,6 +637,99 @@
>> };
>> };
>>
>> +&sound {
>> + compatible = "google,sc7280-herobrine";
>> + model = "sc7280-wcd938x-max98360a-1mic";
>> + status = "okay";
>> + audio-routing =
>> + "IN1_HPHL", "HPHL_OUT",
>> + "IN2_HPHR", "HPHR_OUT",
>> + "AMIC1", "MIC BIAS1",
>> + "AMIC2", "MIC BIAS2",
>> + "VA DMIC0", "MIC BIAS3",
>> + "VA DMIC1", "MIC BIAS3",
>> + "VA DMIC2", "MIC BIAS1",
>> + "VA DMIC3", "MIC BIAS1",
>> + "TX SWR_ADC0", "ADC1_OUTPUT",
>> + "TX SWR_ADC1", "ADC2_OUTPUT",
>> + "TX SWR_ADC2", "ADC3_OUTPUT",
>> + "TX SWR_DMIC0", "DMIC1_OUTPUT",
>> + "TX SWR_DMIC1", "DMIC2_OUTPUT",
>> + "TX SWR_DMIC2", "DMIC3_OUTPUT",
>> + "TX SWR_DMIC3", "DMIC4_OUTPUT",
>> + "TX SWR_DMIC4", "DMIC5_OUTPUT",
>> + "TX SWR_DMIC5", "DMIC6_OUTPUT",
>> + "TX SWR_DMIC6", "DMIC7_OUTPUT",
>> + "TX SWR_DMIC7", "DMIC8_OUTPUT";
>> +
>> + qcom,msm-mbhc-hphl-swh = <1>;
>> + qcom,msm-mbhc-gnd-swh = <1>;
> Why are these last extra tabbed?
Okay. Will remove it.
>
>> +
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + #sound-dai-cells = <0>;
>> +
>> + dai-link@6 {
>> + link-name = "WCD Playback";
>> + reg = <LPASS_CDC_DMA_RX0>;
>> + cpu {
>> + sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
>> + };
>> +
>> + codec {
>> + sound-dai = <&wcd938x 0>, <&swr0 0>, <&rxmacro 0>;
>> + };
>> + };
>> +
>> + dai-link@19 {
>> + link-name = "WCD Capture";
>> + reg = <LPASS_CDC_DMA_TX3>;
>> + cpu {
>> + sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
>> + };
>> +
>> + codec {
>> + sound-dai = <&wcd938x 1>, <&swr1 0>, <&txmacro 0>;
>> + };
>> + };
>> +
>> + dai-link@1 {
>> + link-name = "Secondary MI2S Playback";
>> + reg = <MI2S_SECONDARY>;
>> + cpu {
>> + sound-dai = <&lpass_cpu MI2S_SECONDARY>;
>> + };
>> +
>> + codec {
>> + sound-dai = <&max98360a>;
>> + };
>> + };
>> +
>> + dai-link@5 {
>> + link-name = "DP Playback";
>> + reg = <LPASS_DP_RX>;
>> + cpu {
>> + sound-dai = <&lpass_cpu LPASS_DP_RX>;
>> + };
>> +
>> + codec {
>> + sound-dai = <&msm_dp>;
> Why double tabbed?
Okay. will remove it.
>
>> + };
>> + };
>> +
>> + dai-link@25 {
>> + link-name = "DMIC Capture";
>> + reg = <LPASS_CDC_DMA_VA_TX0>;
>> + cpu {
>> + sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
>> + };
>> +
>> + codec {
>> + sound-dai = <&vamacro 0>;
>> + };
>> + };
> The order of the nodes seems arbitrary. Is there any sort order that can
> be used to avoid conflicts in the future? Maybe the reg property because
> that's how we sort the SoC node.
Okay. Will change accordingly.
>
>> +};
>> +
>> &swr0 {
>> wcd_rx: wcd938x-rx{
>> compatible = "sdw20217010d00";
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 68c7755..57bc5ef 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -2786,6 +2786,9 @@
>>
>> };
>>
>> + sound: sound {
> Is this really necessary? Certainly it shouldn't be in the SoC node as
> it doesn't have a reg property.
Okay. will remove it here and add in board specific files.
>
>> + };
>> +
>> usb_1_hsphy: phy@88e3000 {
>> compatible = "qcom,sc7280-usb-hs-phy",
>> "qcom,usb-snps-hs-7nm-phy";
>> --
>> 2.7.4
>>
^ permalink raw reply [flat|nested] 14+ messages in thread