* mlx5_core failed to load with 5.1.0-rc7-next-20190430+
@ 2019-05-01 1:23 Qian Cai
2019-05-01 3:00 ` Saeed Mahameed
0 siblings, 1 reply; 5+ messages in thread
From: Qian Cai @ 2019-05-01 1:23 UTC (permalink / raw)
To: kliteyn; +Cc: ozsh, saeedm, leon, netdev, linux-rdma, linux kernel
Reverted the commit b169e64a2444 ("net/mlx5: Geneve, Add flow table capabilities
for Geneve decap with TLV options") fixed the problem below during boot ends up
without networking.
[ 92.471247] mlx5_core 0000:0b:00.0: mlx5_cmd_check:744:(pid 13):
CREATE_EQ(0x301) op_mod(0x0) failed, status bad parameter(0x3), syndrome (0x8fef)
[ 92.484824] mlx5_core 0000:0b:00.0: create_async_eqs:572:(pid 13): failed to
create async EQ -22
[ 92.603279] mlx5_core 0000:0b:00.0: mlx5_eq_table_create:1007:(pid 13):
Failed to create async EQs
[ 92.630541] mlx5_core 0000:0b:00.0: mlx5_load:1053:(pid 13): Failed to create EQs
[ 94.866908] mlx5_core 0000:0b:00.0: init_one:1329:(pid 13): mlx5_load_one
failed with error code -22
[ 94.879657] mlx5_core: probe of 0000:0b:00.0 failed with error -22
[ 94.887784] mlx5_core 0000:0b:00.1: Adding to iommu group 2
[ 95.017012] mlx5_core 0000:0b:00.1: firmware version: 14.21.1000
[ 95.023090] mlx5_core 0000:0b:00.1: 63.008 Gb/s available PCIe bandwidth (8
GT/s x8 link)
[ 96.155792] mlx5_core 0000:0b:00.1: mlx5_cmd_check:744:(pid 13):
CREATE_EQ(0x301) op_mod(0x0) failed, status bad parameter(0x3), syndrome (0x8fef)
[ 96.169220] mlx5_core 0000:0b:00.1: create_async_eqs:572:(pid 13): failed to
create async EQ -22
[ 96.199340] mlx5_core 0000:0b:00.1: mlx5_eq_table_create:1007:(pid 13):
Failed to create async EQs
[ 96.224004] mlx5_core 0000:0b:00.1: mlx5_load:1053:(pid 13): Failed to create EQs
[ 97.681695] mlx5_core 0000:0b:00.1: init_one:1329:(pid 13): mlx5_load_one
failed with error code -22
[ 97.692749] mlx5_core: probe of 0000:0b:00.1 failed with error -22
# lspci -vvv
...
0b:00.0 Ethernet controller: Mellanox Technologies MT27710 Family [ConnectX-4 Lx]
Subsystem: Hewlett Packard Enterprise Device 028a
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping-
SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort-
<MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 23
NUMA node: 0
Region 0: Memory at 10000000000 (64-bit, prefetchable) [size=32M]
Expansion ROM at 43000000 [disabled] [size=1M]
Capabilities: [60] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ SlotPowerLimit 0.000W
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+ FLReset-
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
LnkCap: Port #0, Speed 8GT/s, Width x8, ASPM not supported
ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 8GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported
AtomicOpsCap: 32bit- 64bit- 128bitCAS-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
AtomicOpsCtl: ReqEn-
LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete+,
EqualizationPhase1+
EqualizationPhase2+, EqualizationPhase3+, LinkEqualizationRequest-
Capabilities: [48] Vital Product Data
End
Capabilities: [9c] MSI-X: Enable+ Count=64 Masked-
Vector table: BAR=0 offset=00002000
PBA: BAR=0 offset=00003000
Capabilities: [c0] Vendor Specific Information: Len=18 <?>
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0-,D1-,D2-,D3hot-,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC-
UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC-
UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+
ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 04, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
HeaderLog: 00000000 00000000 00000000 00000000
Capabilities: [150 v1] Alternative Routing-ID Interpretation (ARI)
ARICap: MFVC- ACS-, Next Function: 1
ARICtl: MFVC- ACS-, Function Group: 0
Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
IOVCap: Migration-, Interrupt Message Number: 000
IOVCtl: Enable- Migration- Interrupt- MSE- ARIHierarchy+
IOVSta: Migration-
Initial VFs: 8, Total VFs: 8, Number of VFs: 0, Function Dependency Link: 00
VF offset: 2, stride: 1, Device ID: 1016
Supported Page Size: 000007ff, System Page Size: 00000001
Region 0: Memory at 0000010004800000 (64-bit, prefetchable)
VF Migration: offset: 00000000, BIR: 0
Capabilities: [1c0 v1] #19
Capabilities: [230 v1] Access Control Services
ACSCap: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl-
DirectTrans-
ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl-
DirectTrans-
Kernel driver in use: mlx5_core
Kernel modules: mlx5_core
0b:00.1 Ethernet controller: Mellanox Technologies MT27710 Family [ConnectX-4 Lx]
Subsystem: Hewlett Packard Enterprise Device 028a
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping-
SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort-
<MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 24
NUMA node: 0
Region 0: Memory at 10002000000 (64-bit, prefetchable) [size=32M]
Expansion ROM at 43100000 [disabled] [size=1M]
Capabilities: [60] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ SlotPowerLimit 0.000W
DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+ FLReset-
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
LnkCap: Port #0, Speed 8GT/s, Width x8, ASPM not supported
ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 8GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported
AtomicOpsCap: 32bit- 64bit- 128bitCAS-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
AtomicOpsCtl: ReqEn-
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-,
EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [48] Vital Product Data
End
Capabilities: [9c] MSI-X: Enable+ Count=64 Masked-
Vector table: BAR=0 offset=00002000
PBA: BAR=0 offset=00003000
Capabilities: [c0] Vendor Specific Information: Len=18 <?>
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0-,D1-,D2-,D3hot-,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC-
UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC-
UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+
ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 04, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
HeaderLog: 00000000 00000000 00000000 00000000
Capabilities: [150 v1] Alternative Routing-ID Interpretation (ARI)
ARICap: MFVC- ACS-, Next Function: 0
ARICtl: MFVC- ACS-, Function Group: 0
Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
IOVCap: Migration-, Interrupt Message Number: 000
IOVCtl: Enable- Migration- Interrupt- MSE- ARIHierarchy-
IOVSta: Migration-
Initial VFs: 8, Total VFs: 8, Number of VFs: 0, Function Dependency Link: 00
VF offset: 9, stride: 1, Device ID: 1016
Supported Page Size: 000007ff, System Page Size: 00000001
Region 0: Memory at 0000010004000000 (64-bit, prefetchable)
VF Migration: offset: 00000000, BIR: 0
Capabilities: [230 v1] Access Control Services
ACSCap: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl-
DirectTrans-
ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl-
DirectTrans-
Kernel driver in use: mlx5_core
Kernel modules: mlx5_core
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: mlx5_core failed to load with 5.1.0-rc7-next-20190430+
2019-05-01 1:23 mlx5_core failed to load with 5.1.0-rc7-next-20190430+ Qian Cai
@ 2019-05-01 3:00 ` Saeed Mahameed
2019-05-01 3:26 ` Saeed Mahameed
0 siblings, 1 reply; 5+ messages in thread
From: Saeed Mahameed @ 2019-05-01 3:00 UTC (permalink / raw)
To: Qian Cai
Cc: kliteyn, ozsh, Saeed Mahameed, Leon Romanovsky,
Linux Netdev List, RDMA mailing list, linux kernel
On Tue, Apr 30, 2019 at 6:23 PM Qian Cai <cai@lca.pw> wrote:
>
> Reverted the commit b169e64a2444 ("net/mlx5: Geneve, Add flow table capabilities
> for Geneve decap with TLV options") fixed the problem below during boot ends up
> without networking.
>
Hi Qian, thanks for the report, i clearly see where the issue is,
mlx5_ifc_cmd_hca_cap_bits offsets are all off ! due to cited patch,
will fix ASAP.
> [ 92.471247] mlx5_core 0000:0b:00.0: mlx5_cmd_check:744:(pid 13):
> CREATE_EQ(0x301) op_mod(0x0) failed, status bad parameter(0x3), syndrome (0x8fef)
> [ 92.484824] mlx5_core 0000:0b:00.0: create_async_eqs:572:(pid 13): failed to
> create async EQ -22
> [ 92.603279] mlx5_core 0000:0b:00.0: mlx5_eq_table_create:1007:(pid 13):
> Failed to create async EQs
> [ 92.630541] mlx5_core 0000:0b:00.0: mlx5_load:1053:(pid 13): Failed to create EQs
> [ 94.866908] mlx5_core 0000:0b:00.0: init_one:1329:(pid 13): mlx5_load_one
> failed with error code -22
> [ 94.879657] mlx5_core: probe of 0000:0b:00.0 failed with error -22
> [ 94.887784] mlx5_core 0000:0b:00.1: Adding to iommu group 2
> [ 95.017012] mlx5_core 0000:0b:00.1: firmware version: 14.21.1000
> [ 95.023090] mlx5_core 0000:0b:00.1: 63.008 Gb/s available PCIe bandwidth (8
> GT/s x8 link)
> [ 96.155792] mlx5_core 0000:0b:00.1: mlx5_cmd_check:744:(pid 13):
> CREATE_EQ(0x301) op_mod(0x0) failed, status bad parameter(0x3), syndrome (0x8fef)
> [ 96.169220] mlx5_core 0000:0b:00.1: create_async_eqs:572:(pid 13): failed to
> create async EQ -22
> [ 96.199340] mlx5_core 0000:0b:00.1: mlx5_eq_table_create:1007:(pid 13):
> Failed to create async EQs
> [ 96.224004] mlx5_core 0000:0b:00.1: mlx5_load:1053:(pid 13): Failed to create EQs
> [ 97.681695] mlx5_core 0000:0b:00.1: init_one:1329:(pid 13): mlx5_load_one
> failed with error code -22
> [ 97.692749] mlx5_core: probe of 0000:0b:00.1 failed with error -22
>
> # lspci -vvv
> ...
> 0b:00.0 Ethernet controller: Mellanox Technologies MT27710 Family [ConnectX-4 Lx]
> Subsystem: Hewlett Packard Enterprise Device 028a
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping-
> SERR+ FastB2B- DisINTx+
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort-
> <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Interrupt: pin A routed to IRQ 23
> NUMA node: 0
> Region 0: Memory at 10000000000 (64-bit, prefetchable) [size=32M]
> Expansion ROM at 43000000 [disabled] [size=1M]
> Capabilities: [60] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
> ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ SlotPowerLimit 0.000W
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+ FLReset-
> MaxPayload 128 bytes, MaxReadReq 512 bytes
> DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
> LnkCap: Port #0, Speed 8GT/s, Width x8, ASPM not supported
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed 8GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported
> AtomicOpsCap: 32bit- 64bit- 128bitCAS-
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> AtomicOpsCtl: ReqEn-
> LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete+,
> EqualizationPhase1+
> EqualizationPhase2+, EqualizationPhase3+, LinkEqualizationRequest-
> Capabilities: [48] Vital Product Data
> End
> Capabilities: [9c] MSI-X: Enable+ Count=64 Masked-
> Vector table: BAR=0 offset=00002000
> PBA: BAR=0 offset=00003000
> Capabilities: [c0] Vendor Specific Information: Len=18 <?>
> Capabilities: [40] Power Management version 3
> Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0-,D1-,D2-,D3hot-,D3cold+)
> Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
> Capabilities: [100 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC-
> UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC-
> UnsupReq- ACSViol-
> UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+
> ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 04, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
> MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
> HeaderLog: 00000000 00000000 00000000 00000000
> Capabilities: [150 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 1
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE- ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 8, Total VFs: 8, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 2, stride: 1, Device ID: 1016
> Supported Page Size: 000007ff, System Page Size: 00000001
> Region 0: Memory at 0000010004800000 (64-bit, prefetchable)
> VF Migration: offset: 00000000, BIR: 0
> Capabilities: [1c0 v1] #19
> Capabilities: [230 v1] Access Control Services
> ACSCap: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl-
> DirectTrans-
> ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl-
> DirectTrans-
> Kernel driver in use: mlx5_core
> Kernel modules: mlx5_core
>
> 0b:00.1 Ethernet controller: Mellanox Technologies MT27710 Family [ConnectX-4 Lx]
> Subsystem: Hewlett Packard Enterprise Device 028a
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping-
> SERR+ FastB2B- DisINTx+
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort-
> <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Interrupt: pin B routed to IRQ 24
> NUMA node: 0
> Region 0: Memory at 10002000000 (64-bit, prefetchable) [size=32M]
> Expansion ROM at 43100000 [disabled] [size=1M]
> Capabilities: [60] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
> ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ SlotPowerLimit 0.000W
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+ FLReset-
> MaxPayload 128 bytes, MaxReadReq 512 bytes
> DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
> LnkCap: Port #0, Speed 8GT/s, Width x8, ASPM not supported
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed 8GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported
> AtomicOpsCap: 32bit- 64bit- 128bitCAS-
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> AtomicOpsCtl: ReqEn-
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-,
> EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [48] Vital Product Data
> End
> Capabilities: [9c] MSI-X: Enable+ Count=64 Masked-
> Vector table: BAR=0 offset=00002000
> PBA: BAR=0 offset=00003000
> Capabilities: [c0] Vendor Specific Information: Len=18 <?>
> Capabilities: [40] Power Management version 3
> Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0-,D1-,D2-,D3hot-,D3cold+)
> Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
> Capabilities: [100 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC-
> UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC-
> UnsupReq- ACSViol-
> UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+
> ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 04, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
> MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
> HeaderLog: 00000000 00000000 00000000 00000000
> Capabilities: [150 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE- ARIHierarchy-
> IOVSta: Migration-
> Initial VFs: 8, Total VFs: 8, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 9, stride: 1, Device ID: 1016
> Supported Page Size: 000007ff, System Page Size: 00000001
> Region 0: Memory at 0000010004000000 (64-bit, prefetchable)
> VF Migration: offset: 00000000, BIR: 0
> Capabilities: [230 v1] Access Control Services
> ACSCap: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl-
> DirectTrans-
> ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl-
> DirectTrans-
> Kernel driver in use: mlx5_core
> Kernel modules: mlx5_core
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: mlx5_core failed to load with 5.1.0-rc7-next-20190430+
2019-05-01 3:00 ` Saeed Mahameed
@ 2019-05-01 3:26 ` Saeed Mahameed
2019-05-01 14:24 ` Qian Cai
0 siblings, 1 reply; 5+ messages in thread
From: Saeed Mahameed @ 2019-05-01 3:26 UTC (permalink / raw)
To: Qian Cai
Cc: kliteyn, ozsh, Saeed Mahameed, Leon Romanovsky,
Linux Netdev List, RDMA mailing list, linux kernel
On Tue, Apr 30, 2019 at 8:00 PM Saeed Mahameed
<saeedm@dev.mellanox.co.il> wrote:
>
> On Tue, Apr 30, 2019 at 6:23 PM Qian Cai <cai@lca.pw> wrote:
> >
> > Reverted the commit b169e64a2444 ("net/mlx5: Geneve, Add flow table capabilities
> > for Geneve decap with TLV options") fixed the problem below during boot ends up
> > without networking.
> >
>
> Hi Qian, thanks for the report, i clearly see where the issue is,
> mlx5_ifc_cmd_hca_cap_bits offsets are all off ! due to cited patch,
> will fix ASAP.
>
Hi Qian, can you please try the following commit :
[mlx5-next] net/mlx5: Fix broken hca cap offset1093551diffmboxseries
https://patchwork.ozlabs.org/patch/1093551/
$ curl -s https://patchwork.ozlabs.org/patch/1093551//mbox/ | git am
Thanks,
Saeed.
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: mlx5_core failed to load with 5.1.0-rc7-next-20190430+
2019-05-01 3:26 ` Saeed Mahameed
@ 2019-05-01 14:24 ` Qian Cai
2019-05-01 20:38 ` Saeed Mahameed
0 siblings, 1 reply; 5+ messages in thread
From: Qian Cai @ 2019-05-01 14:24 UTC (permalink / raw)
To: Saeed Mahameed
Cc: kliteyn, ozsh, Saeed Mahameed, Leon Romanovsky,
Linux Netdev List, RDMA mailing list, linux kernel
On Tue, 2019-04-30 at 20:26 -0700, Saeed Mahameed wrote:
> On Tue, Apr 30, 2019 at 8:00 PM Saeed Mahameed
> <saeedm@dev.mellanox.co.il> wrote:
> >
> > On Tue, Apr 30, 2019 at 6:23 PM Qian Cai <cai@lca.pw> wrote:
> > >
> > > Reverted the commit b169e64a2444 ("net/mlx5: Geneve, Add flow table
> > > capabilities
> > > for Geneve decap with TLV options") fixed the problem below during boot
> > > ends up
> > > without networking.
> > >
> >
> > Hi Qian, thanks for the report, i clearly see where the issue is,
> > mlx5_ifc_cmd_hca_cap_bits offsets are all off ! due to cited patch,
> > will fix ASAP.
> >
>
> Hi Qian, can you please try the following commit :
>
> [mlx5-next] net/mlx5: Fix broken hca cap offset1093551diffmboxseries
> https://patchwork.ozlabs.org/patch/1093551/
>
> $ curl -s https://patchwork.ozlabs.org/patch/1093551//mbox/ | git am
Yes, it works great!
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: mlx5_core failed to load with 5.1.0-rc7-next-20190430+
2019-05-01 14:24 ` Qian Cai
@ 2019-05-01 20:38 ` Saeed Mahameed
0 siblings, 0 replies; 5+ messages in thread
From: Saeed Mahameed @ 2019-05-01 20:38 UTC (permalink / raw)
To: cai, saeedm
Cc: Oz Shlomo, netdev, linux-rdma, linux-kernel, leon, Yevgeny Kliteynik
On Wed, 2019-05-01 at 10:24 -0400, Qian Cai wrote:
> On Tue, 2019-04-30 at 20:26 -0700, Saeed Mahameed wrote:
> > On Tue, Apr 30, 2019 at 8:00 PM Saeed Mahameed
> > <saeedm@dev.mellanox.co.il> wrote:
> > > On Tue, Apr 30, 2019 at 6:23 PM Qian Cai <cai@lca.pw> wrote:
> > > > Reverted the commit b169e64a2444 ("net/mlx5: Geneve, Add flow
> > > > table
> > > > capabilities
> > > > for Geneve decap with TLV options") fixed the problem below
> > > > during boot
> > > > ends up
> > > > without networking.
> > > >
> > >
> > > Hi Qian, thanks for the report, i clearly see where the issue is,
> > > mlx5_ifc_cmd_hca_cap_bits offsets are all off ! due to cited
> > > patch,
> > > will fix ASAP.
> > >
> >
> > Hi Qian, can you please try the following commit :
> >
> > [mlx5-next] net/mlx5: Fix broken hca cap
> > offset1093551diffmboxseries
> > https://patchwork.ozlabs.org/patch/1093551/
> >
> > $ curl -s https://patchwork.ozlabs.org/patch/1093551//mbox/ | git
> > am
>
> Yes, it works great!
Great ! thanks for your feedback.
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-05-01 20:38 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2019-05-01 1:23 mlx5_core failed to load with 5.1.0-rc7-next-20190430+ Qian Cai
2019-05-01 3:00 ` Saeed Mahameed
2019-05-01 3:26 ` Saeed Mahameed
2019-05-01 14:24 ` Qian Cai
2019-05-01 20:38 ` Saeed Mahameed
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