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From: Palmer Dabbelt <palmer@dabbelt.com>
To: apatel@ventanamicro.com
Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	Paul Walmsley <paul.walmsley@sifive.com>,
	daniel.lezcano@linaro.org, tglx@linutronix.de,
	ajones@ventanamicro.com, atishp@atishpatra.org,
	samuel@sholland.org, Conor Dooley <conor.dooley@microchip.com>,
	anup@brainfault.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	apatel@ventanamicro.com
Subject: Re: [PATCH v4 0/3] Improve CLOCK_EVT_FEAT_C3STOP feature setting
Date: Tue, 29 Nov 2022 10:43:50 -0800 (PST)	[thread overview]
Message-ID: <mhng-767f0a38-40c9-4090-8341-ec0c41dc502b@palmer-ri-x1c9a> (raw)
In-Reply-To: <20221129140313.886192-1-apatel@ventanamicro.com>

On Tue, 29 Nov 2022 06:03:10 PST (-0800), apatel@ventanamicro.com wrote:
> This series improves the RISC-V timer driver to set CLOCK_EVT_FEAT_C3STOP
> feature based on RISC-V platform capabilities.
>
> These patches can also be found in riscv_timer_dt_imp_v4 branch at:
> https://github.com/avpatel/linux.git
>
> Changes since v3:
>  - Rebased on Linux-6.1-rc7
>  - Replaced PATCH1 with a patch to initialize broadcast timer
>
> Changes since v2:
>  - Include Conor's revert patch as the first patch and rebased other patches
>  - Update PATCH2 to document bindings for separate RISC-V timer DT node
>  - Update PATCH3 based on RISC-V timer DT node bindings
>
> Changes since v1:
>  - Rebased on Linux-5.19-rc8
>  - Renamed "riscv,always-on" DT property to "riscv,timer-can-wake-cpu"
>
> Anup Patel (2):
>   dt-bindings: timer: Add bindings for the RISC-V timer device
>   clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT
>
> Conor Dooley (1):
>   RISC-V: time: initialize broadcast hrtimer based clock event device
>
>  .../bindings/timer/riscv,timer.yaml           | 52 +++++++++++++++++++
>  arch/riscv/kernel/time.c                      |  3 ++
>  drivers/clocksource/timer-riscv.c             | 12 ++++-
>  3 files changed, 66 insertions(+), 1 deletion(-)
>  create mode 100644 Documentation/devicetree/bindings/timer/riscv,timer.yaml

Acked-by: Palmer Dabbelt <palmer@rivosinc.com>

IIRC the main issue here were the DT bindings, though, so I think we'll 
need to make sure that's sorted out.

      parent reply	other threads:[~2022-11-29 18:43 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-29 14:03 [PATCH v4 0/3] Improve CLOCK_EVT_FEAT_C3STOP feature setting Anup Patel
2022-11-29 14:03 ` [PATCH v4 1/3] RISC-V: time: initialize broadcast hrtimer based clock event device Anup Patel
2022-11-30  4:19   ` Samuel Holland
2022-11-29 14:03 ` [PATCH v4 2/3] dt-bindings: timer: Add bindings for the RISC-V timer device Anup Patel
2022-11-30  4:45   ` Samuel Holland
2022-12-01  5:56     ` Anup Patel
2022-11-29 14:03 ` [PATCH v4 3/3] clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT Anup Patel
2022-11-29 14:36   ` Conor Dooley
2022-11-29 17:11     ` Anup Patel
2022-11-29 17:17       ` Conor Dooley
2022-11-29 17:22         ` Anup Patel
2022-11-29 18:43           ` Palmer Dabbelt
2022-11-29 18:43 ` Palmer Dabbelt [this message]

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