From: Samuel Holland <samuel@sholland.org>
To: Anup Patel <apatel@ventanamicro.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Jones <ajones@ventanamicro.com>,
Atish Patra <atishp@atishpatra.org>,
Conor Dooley <conor.dooley@microchip.com>,
Anup Patel <anup@brainfault.org>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 1/3] RISC-V: time: initialize broadcast hrtimer based clock event device
Date: Tue, 29 Nov 2022 22:19:52 -0600 [thread overview]
Message-ID: <167c5c23-2863-7882-15ea-e251ed3caf8d@sholland.org> (raw)
In-Reply-To: <20221129140313.886192-2-apatel@ventanamicro.com>
On 11/29/22 08:03, Anup Patel wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Similarly to commit 022eb8ae8b5e ("ARM: 8938/1: kernel: initialize
> broadcast hrtimer based clock event device"), RISC-V needs to initiate
> hrtimers before C3STOP can be used. Otherwise, the introduction of C3STOP
Specifically it is the hrtimer-based broadcast clockevent that we need
to initialize, not hrtimers as a whole.
> for the RISC-V arch timer in commit 232ccac1bd9b
> ("clocksource/drivers/riscv: Events are stopped during CPU suspend")
Maybe add some more details here:
... leaves us without any broadcast timer registered. This prevents the
kernel from entering oneshot mode, which ...
> breaks timer behaviour, for example clock_nanosleep().
>
> A test app that sleeps each cpu for 6, 5, 4, 3 ms respectively, HZ=250
> & C3STOP enabled, the sleep times are rounded up to the next jiffy:
> == CPU: 1 == == CPU: 2 == == CPU: 3 == == CPU: 4 ==
> Mean: 7.974992 Mean: 7.976534 Mean: 7.962591 Mean: 3.952179
> Std Dev: 0.154374 Std Dev: 0.156082 Std Dev: 0.171018 Std Dev: 0.076193
> Hi: 9.472000 Hi: 10.495000 Hi: 8.864000 Hi: 4.736000
> Lo: 6.087000 Lo: 6.380000 Lo: 4.872000 Lo: 3.403000
> Samples: 521 Samples: 521 Samples: 521 Samples: 521
>
> Link: https://lore.kernel.org/linux-riscv/YzYTNQRxLr7Q9JR0@spud/
> Fixes: 232ccac1bd9b ("clocksource/drivers/riscv: Events are stopped during CPU suspend")
> Suggested-by: Samuel Holland <samuel@sholland.org>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Either way:
Reviewed-by: Samuel Holland <samuel@sholland.org>
> ---
> arch/riscv/kernel/time.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c
> index 8217b0f67c6c..1cf21db4fcc7 100644
> --- a/arch/riscv/kernel/time.c
> +++ b/arch/riscv/kernel/time.c
> @@ -5,6 +5,7 @@
> */
>
> #include <linux/of_clk.h>
> +#include <linux/clockchips.h>
> #include <linux/clocksource.h>
> #include <linux/delay.h>
> #include <asm/sbi.h>
> @@ -29,6 +30,8 @@ void __init time_init(void)
>
> of_clk_init(NULL);
> timer_probe();
> +
> + tick_setup_hrtimer_broadcast();
> }
>
> void clocksource_arch_init(struct clocksource *cs)
next prev parent reply other threads:[~2022-11-30 4:20 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-29 14:03 [PATCH v4 0/3] Improve CLOCK_EVT_FEAT_C3STOP feature setting Anup Patel
2022-11-29 14:03 ` [PATCH v4 1/3] RISC-V: time: initialize broadcast hrtimer based clock event device Anup Patel
2022-11-30 4:19 ` Samuel Holland [this message]
2022-11-29 14:03 ` [PATCH v4 2/3] dt-bindings: timer: Add bindings for the RISC-V timer device Anup Patel
2022-11-30 4:45 ` Samuel Holland
2022-12-01 5:56 ` Anup Patel
2022-11-29 14:03 ` [PATCH v4 3/3] clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT Anup Patel
2022-11-29 14:36 ` Conor Dooley
2022-11-29 17:11 ` Anup Patel
2022-11-29 17:17 ` Conor Dooley
2022-11-29 17:22 ` Anup Patel
2022-11-29 18:43 ` Palmer Dabbelt
2022-11-29 18:43 ` [PATCH v4 0/3] Improve CLOCK_EVT_FEAT_C3STOP feature setting Palmer Dabbelt
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