From: tip-bot for Jiang Liu <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: tony.luck@intel.com, fenghua.yu@intel.com, mingo@kernel.org,
gregkh@linuxfoundation.org, rjw@rjwysocki.net, joro@8bytes.org,
konrad.wilk@oracle.com, hpa@zytor.com,
linux-kernel@vger.kernel.org, benh@kernel.crashing.org,
bp@alien8.de, bhelgaas@google.com, yinghai@kernel.org,
jiang.liu@linux.intel.com, rdunlap@infradead.org,
vinod.koul@intel.com, tglx@linutronix.de
Subject: [tip:x86/apic] iommu/vt-d: Refine the interfaces to create IRQ for DMAR unit
Date: Wed, 26 Nov 2014 15:10:35 -0800 [thread overview]
Message-ID: <tip-82ebe4e0c0d6ce8ef20cac67ef4ce4b46b9e219b@git.kernel.org> (raw)
In-Reply-To: <1416894816-23245-20-git-send-email-jiang.liu@linux.intel.com>
Commit-ID: 82ebe4e0c0d6ce8ef20cac67ef4ce4b46b9e219b
Gitweb: http://git.kernel.org/tip/82ebe4e0c0d6ce8ef20cac67ef4ce4b46b9e219b
Author: Jiang Liu <jiang.liu@linux.intel.com>
AuthorDate: Tue, 25 Nov 2014 13:53:28 +0800
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Wed, 26 Nov 2014 18:59:25 +0100
iommu/vt-d: Refine the interfaces to create IRQ for DMAR unit
Refine the interfaces to create IRQ for DMAR unit. It's a preparation
for converting DMAR IRQ to hierarchy irqdomain on x86.
It also moves dmar_alloc_hwirq()/dmar_free_hwirq() from irq_remapping.h
to dmar.h. They are not irq_remapping specific.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: iommu@lists.linux-foundation.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Vinod Koul <vinod.koul@intel.com>
Link: http://lkml.kernel.org/r/1416894816-23245-20-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/ia64/include/asm/irq_remapping.h | 2 --
arch/ia64/kernel/msi_ia64.c | 30 +++++++++++++++++++-----------
arch/x86/include/asm/irq_remapping.h | 4 ----
arch/x86/kernel/apic/msi.c | 24 +++++++++++++-----------
drivers/iommu/dmar.c | 19 +++++--------------
include/linux/dmar.h | 3 ++-
6 files changed, 39 insertions(+), 43 deletions(-)
diff --git a/arch/ia64/include/asm/irq_remapping.h b/arch/ia64/include/asm/irq_remapping.h
index e3b3556..a8687b1 100644
--- a/arch/ia64/include/asm/irq_remapping.h
+++ b/arch/ia64/include/asm/irq_remapping.h
@@ -1,6 +1,4 @@
#ifndef __IA64_INTR_REMAPPING_H
#define __IA64_INTR_REMAPPING_H
#define irq_remapping_enabled 0
-#define dmar_alloc_hwirq create_irq
-#define dmar_free_hwirq destroy_irq
#endif
diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c
index 8ae36ea..3f6b761 100644
--- a/arch/ia64/kernel/msi_ia64.c
+++ b/arch/ia64/kernel/msi_ia64.c
@@ -166,7 +166,7 @@ static struct irq_chip dmar_msi_type = {
.irq_retrigger = ia64_msi_retrigger_irq,
};
-static int
+static void
msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
{
struct irq_cfg *cfg = irq_cfg + irq;
@@ -188,21 +188,29 @@ msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
MSI_DATA_LEVEL_ASSERT |
MSI_DATA_DELIVERY_FIXED |
MSI_DATA_VECTOR(cfg->vector);
- return 0;
}
-int arch_setup_dmar_msi(unsigned int irq)
+int dmar_alloc_hwirq(int id, int node, void *arg)
{
- int ret;
+ int irq;
struct msi_msg msg;
- ret = msi_compose_msg(NULL, irq, &msg);
- if (ret < 0)
- return ret;
- dmar_msi_write(irq, &msg);
- irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq,
- "edge");
- return 0;
+ irq = create_irq();
+ if (irq > 0) {
+ irq_set_handler_data(irq, arg);
+ irq_set_chip_and_handler_name(irq, &dmar_msi_type,
+ handle_edge_irq, "edge");
+ msi_compose_msg(NULL, irq, &msg);
+ dmar_msi_write(irq, &msg);
+ }
+
+ return irq;
+}
+
+void dmar_free_hwirq(int irq)
+{
+ irq_set_handler_data(irq, NULL);
+ destroy_irq(irq);
}
#endif /* CONFIG_INTEL_IOMMU */
diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h
index 9c39650..82507c5 100644
--- a/arch/x86/include/asm/irq_remapping.h
+++ b/arch/x86/include/asm/irq_remapping.h
@@ -121,8 +121,4 @@ irq_remapping_get_irq_domain(struct irq_alloc_info *info)
#define irq_remapping_print_chip NULL
#endif /* CONFIG_IRQ_REMAP */
-
-extern int dmar_alloc_hwirq(void);
-extern void dmar_free_hwirq(int irq);
-
#endif /* __X86_IRQ_REMAPPING_H */
diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c
index afaaa11..695c82b 100644
--- a/arch/x86/kernel/apic/msi.c
+++ b/arch/x86/kernel/apic/msi.c
@@ -228,25 +228,27 @@ static struct irq_chip dmar_msi_type = {
.flags = IRQCHIP_SKIP_SET_WAKE,
};
-int arch_setup_dmar_msi(unsigned int irq)
+int dmar_alloc_hwirq(int id, int node, void *arg)
{
+ int irq;
struct msi_msg msg;
- struct irq_cfg *cfg = irq_cfg(irq);
- native_compose_msi_msg(cfg, &msg);
- dmar_msi_write(irq, &msg);
- irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq,
- "edge");
- return 0;
-}
+ irq = irq_domain_alloc_irqs(NULL, 1, node, NULL);
+ if (irq > 0) {
+ irq_set_handler_data(irq, arg);
+ irq_set_chip_and_handler_name(irq, &dmar_msi_type,
+ handle_edge_irq, "edge");
+ native_compose_msi_msg(irq_cfg(irq), &msg);
+ dmar_msi_write(irq, &msg);
+ }
-int dmar_alloc_hwirq(void)
-{
- return irq_domain_alloc_irqs(NULL, 1, NUMA_NO_NODE, NULL);
+ return irq;
}
void dmar_free_hwirq(int irq)
{
+ irq_set_handler_data(irq, NULL);
+ irq_set_handler(irq, NULL);
irq_domain_free_irqs(irq, 1);
}
#endif
diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c
index 9847613..536f2d8 100644
--- a/drivers/iommu/dmar.c
+++ b/drivers/iommu/dmar.c
@@ -1087,8 +1087,8 @@ static void free_iommu(struct intel_iommu *iommu)
if (iommu->irq) {
free_irq(iommu->irq, iommu);
- irq_set_handler_data(iommu->irq, NULL);
dmar_free_hwirq(iommu->irq);
+ iommu->irq = 0;
}
if (iommu->qi) {
@@ -1642,23 +1642,14 @@ int dmar_set_interrupt(struct intel_iommu *iommu)
if (iommu->irq)
return 0;
- irq = dmar_alloc_hwirq();
- if (irq <= 0) {
+ irq = dmar_alloc_hwirq(iommu->seq_id, iommu->node, iommu);
+ if (irq > 0) {
+ iommu->irq = irq;
+ } else {
pr_err("IOMMU: no free vectors\n");
return -EINVAL;
}
- irq_set_handler_data(irq, iommu);
- iommu->irq = irq;
-
- ret = arch_setup_dmar_msi(irq);
- if (ret) {
- irq_set_handler_data(irq, NULL);
- iommu->irq = 0;
- dmar_free_hwirq(irq);
- return ret;
- }
-
ret = request_irq(irq, dmar_fault, IRQF_NO_THREAD, iommu->name, iommu);
if (ret)
pr_err("IOMMU: can't request irq\n");
diff --git a/include/linux/dmar.h b/include/linux/dmar.h
index 3062495..8473756 100644
--- a/include/linux/dmar.h
+++ b/include/linux/dmar.h
@@ -227,6 +227,7 @@ extern void dmar_msi_read(int irq, struct msi_msg *msg);
extern void dmar_msi_write(int irq, struct msi_msg *msg);
extern int dmar_set_interrupt(struct intel_iommu *iommu);
extern irqreturn_t dmar_fault(int irq, void *dev_id);
-extern int arch_setup_dmar_msi(unsigned int irq);
+extern int dmar_alloc_hwirq(int id, int node, void *arg);
+extern void dmar_free_hwirq(int irq);
#endif /* __DMAR_H__ */
next prev parent reply other threads:[~2014-11-26 23:11 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-25 5:53 [Patch Part2 v6 00/27] Enable hierarchy irqdomian on x86 platforms Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 01/27] x86, irq: Save destination CPU ID in irq_cfg Jiang Liu
2014-11-26 23:05 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 02/27] x86, irq: Use hierarchy irqdomain to manage CPU interrupt vectors Jiang Liu
2014-11-26 23:06 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 03/27] x86, hpet: Use new irqdomain interfaces to allocate/free IRQ Jiang Liu
2014-11-26 23:06 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-24 15:44 ` [tip:x86/apic] x86/hpet: Use new irqdomain interfaces to allocate /free IRQ tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 04/27] x86, MSI: Use new irqdomain interfaces to allocate/free IRQ Jiang Liu
2014-11-26 23:06 ` [tip:x86/apic] x86, MSI: Use new irqdomain interfaces to allocate /free IRQ tip-bot for Jiang Liu
2015-04-24 15:44 ` [tip:x86/apic] x86/MSI: Use new irqdomain interfaces to allocate/ free IRQ tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 05/27] x86, uv: Use new irqdomain interfaces to allocate/free IRQ Jiang Liu
2014-11-26 23:06 ` [tip:x86/apic] x86, uv: Use new irqdomain interfaces to allocate/ free IRQ tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 06/27] x86, htirq: Use new irqdomain interfaces to allocate/free IRQ Jiang Liu
2014-11-26 23:07 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 07/27] x86, dmar: " Jiang Liu
2014-11-26 23:07 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 08/27] x86: irq_remapping: Introduce new interfaces to support hierarchy irqdomain Jiang Liu
2014-11-26 23:07 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 09/27] iommu/vt-d: Change prototypes to prepare for enabling " Jiang Liu
2014-11-26 23:07 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 10/27] iommu/vt-d: Enhance Intel IR driver to suppport " Jiang Liu
2014-11-26 23:08 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 11/27] iommu/amd: Enhance AMD " Jiang Liu
2014-11-26 23:08 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 12/27] x86, hpet: Enhance HPET IRQ to support " Jiang Liu
2014-11-26 23:08 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 13/27] x86, PCI, MSI: Use hierarchy irqdomain to manage MSI interrupts Jiang Liu
2014-11-26 23:09 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 14/27] x86, irq: Directly call native_compose_msi_msg() for DMAR IRQ Jiang Liu
2014-11-26 23:09 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 15/27] iommu/vt-d: Clean up unused MSI related code Jiang Liu
2014-11-26 23:09 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 16/27] iommu/amd: " Jiang Liu
2014-11-26 23:09 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 17/27] x86: irq_remapping: " Jiang Liu
2014-11-26 23:10 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 18/27] x86, irq: Clean up unused MSI related code and interfaces Jiang Liu
2014-11-26 23:10 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 19/27] iommu/vt-d: Refine the interfaces to create IRQ for DMAR unit Jiang Liu
2014-11-26 23:10 ` tip-bot for Jiang Liu [this message]
2014-11-25 5:53 ` [Patch Part2 v6 20/27] x86, irq: Use hierarchy irqdomain to manage DMAR interrupts Jiang Liu
2014-11-26 23:10 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 21/27] x86, htirq: Use hierarchy irqdomain to manage Hypertransport interrupts Jiang Liu
2014-11-26 23:11 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 22/27] x86, uv: Use hierarchy irqdomain to manage UV interrupts Jiang Liu
2014-11-26 23:11 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-12-15 21:37 ` [Patch Part2 v6 22/27] " Dimitri Sivanich
2014-12-16 17:29 ` Dimitri Sivanich
2014-12-17 2:41 ` Jiang Liu
2014-12-17 16:45 ` Russ Anderson
2014-12-23 7:18 ` Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 23/27] x86, irq: Normalize x86 irq_chip name Jiang Liu
2014-11-26 23:11 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 24/27] x86, PCI/MSI: Simplify the way to deal with remapped MSI interrupts Jiang Liu
2014-11-26 23:11 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 25/27] PCI/MSI: Replace msi_update_msg() with irq_chip_compose_msi_msg() Jiang Liu
2014-11-26 23:12 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 26/27] x86, irq: Implement irq_chip.irq_write_msi_msg for MSI/DMAR/HPET irq_chips Jiang Liu
2014-11-26 23:12 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 27/27] x86, irq: Simplify MSI/DMAR/HPET implementation by using common code Jiang Liu
2014-11-26 23:12 ` [tip:x86/apic] x86, irq: Simplify MSI/DMAR/ HPET " tip-bot for Jiang Liu
2015-04-13 6:11 [Patch Part1 v8 19/37] iommu/vt-d: Refine the interfaces to create IRQ for DMAR unit Jiang Liu
2015-04-24 15:48 ` [tip:x86/apic] " tip-bot for Jiang Liu
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