From: tip-bot for Jiang Liu <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: yinghai@kernel.org, rdunlap@infradead.org, bp@alien8.de,
konrad.wilk@oracle.com, tony.luck@intel.com, rjw@rjwysocki.net,
jroedel@suse.de, joro@8bytes.org, gregkh@linuxfoundation.org,
bhelgaas@google.com, jiang.liu@linux.intel.com,
tglx@linutronix.de, mingo@kernel.org,
linux-kernel@vger.kernel.org, hpa@zytor.com,
benh@kernel.crashing.org
Subject: [tip:x86/apic] iommu/vt-d: Clean up unused MSI related code
Date: Wed, 26 Nov 2014 15:09:32 -0800 [thread overview]
Message-ID: <tip-aa398ca77f6a77b5fa4fa24fe306f0f246864475@git.kernel.org> (raw)
In-Reply-To: <1416894816-23245-16-git-send-email-jiang.liu@linux.intel.com>
Commit-ID: aa398ca77f6a77b5fa4fa24fe306f0f246864475
Gitweb: http://git.kernel.org/tip/aa398ca77f6a77b5fa4fa24fe306f0f246864475
Author: Jiang Liu <jiang.liu@linux.intel.com>
AuthorDate: Tue, 25 Nov 2014 13:53:24 +0800
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Wed, 26 Nov 2014 18:59:25 +0100
iommu/vt-d: Clean up unused MSI related code
Now MSI interrupt has been converted to new hierarchy irqdomain
interfaces, so kill legacy MSI related code.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Acked-by: Joerg Roedel <jroedel@suse.de>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: iommu@lists.linux-foundation.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Joerg Roedel <joro@8bytes.org>
Link: http://lkml.kernel.org/r/1416894816-23245-16-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
drivers/iommu/intel_irq_remapping.c | 144 ------------------------------------
1 file changed, 144 deletions(-)
diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c
index dab8653..cb00d6b 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -144,44 +144,6 @@ static int qi_flush_iec(struct intel_iommu *iommu, int index, int mask)
return qi_submit_sync(&desc, iommu);
}
-static int map_irq_to_irte_handle(int irq, u16 *sub_handle)
-{
- struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
- unsigned long flags;
- int index;
-
- if (!irq_iommu)
- return -1;
-
- raw_spin_lock_irqsave(&irq_2_ir_lock, flags);
- *sub_handle = irq_iommu->sub_handle;
- index = irq_iommu->irte_index;
- raw_spin_unlock_irqrestore(&irq_2_ir_lock, flags);
- return index;
-}
-
-static int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle)
-{
- struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
- struct irq_cfg *cfg = irq_cfg(irq);
- unsigned long flags;
-
- if (!irq_iommu)
- return -1;
-
- raw_spin_lock_irqsave(&irq_2_ir_lock, flags);
-
- cfg->remapped = 1;
- irq_iommu->iommu = iommu;
- irq_iommu->irte_index = index;
- irq_iommu->sub_handle = subhandle;
- irq_iommu->irte_mask = 0;
-
- raw_spin_unlock_irqrestore(&irq_2_ir_lock, flags);
-
- return 0;
-}
-
static int modify_irte(struct irq_2_iommu *irq_iommu,
struct irte *irte_modified)
{
@@ -1120,108 +1082,6 @@ intel_ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
return 0;
}
-static void intel_compose_msi_msg(struct pci_dev *pdev,
- unsigned int irq, unsigned int dest,
- struct msi_msg *msg, u8 hpet_id)
-{
- struct irq_cfg *cfg;
- struct irte irte;
- u16 sub_handle = 0;
- int ir_index;
-
- cfg = irq_cfg(irq);
-
- ir_index = map_irq_to_irte_handle(irq, &sub_handle);
- BUG_ON(ir_index == -1);
-
- prepare_irte(&irte, cfg->vector, dest);
-
- /* Set source-id of interrupt request */
- if (pdev)
- set_msi_sid(&irte, pdev);
- else
- set_hpet_sid(&irte, hpet_id);
-
- modify_irte(irq_2_iommu(irq), &irte);
-
- msg->address_hi = MSI_ADDR_BASE_HI;
- msg->data = sub_handle;
- msg->address_lo = MSI_ADDR_BASE_LO | MSI_ADDR_IR_EXT_INT |
- MSI_ADDR_IR_SHV |
- MSI_ADDR_IR_INDEX1(ir_index) |
- MSI_ADDR_IR_INDEX2(ir_index);
-}
-
-/*
- * Map the PCI dev to the corresponding remapping hardware unit
- * and allocate 'nvec' consecutive interrupt-remapping table entries
- * in it.
- */
-static int intel_msi_alloc_irq(struct pci_dev *dev, int irq, int nvec)
-{
- struct intel_iommu *iommu;
- int index;
-
- down_read(&dmar_global_lock);
- iommu = map_dev_to_ir(dev);
- if (!iommu) {
- printk(KERN_ERR
- "Unable to map PCI %s to iommu\n", pci_name(dev));
- index = -ENOENT;
- } else {
- index = alloc_irte(iommu, irq, irq_2_iommu(irq), nvec);
- if (index < 0) {
- printk(KERN_ERR
- "Unable to allocate %d IRTE for PCI %s\n",
- nvec, pci_name(dev));
- index = -ENOSPC;
- }
- }
- up_read(&dmar_global_lock);
-
- return index;
-}
-
-static int intel_msi_setup_irq(struct pci_dev *pdev, unsigned int irq,
- int index, int sub_handle)
-{
- struct intel_iommu *iommu;
- int ret = -ENOENT;
-
- down_read(&dmar_global_lock);
- iommu = map_dev_to_ir(pdev);
- if (iommu) {
- /*
- * setup the mapping between the irq and the IRTE
- * base index, the sub_handle pointing to the
- * appropriate interrupt remap table entry.
- */
- set_irte_irq(irq, iommu, index, sub_handle);
- ret = 0;
- }
- up_read(&dmar_global_lock);
-
- return ret;
-}
-
-static int intel_alloc_hpet_msi(unsigned int irq, unsigned int id)
-{
- int ret = -1;
- struct intel_iommu *iommu;
- int index;
-
- down_read(&dmar_global_lock);
- iommu = map_hpet_to_ir(id);
- if (iommu) {
- index = alloc_irte(iommu, irq, irq_2_iommu(irq), 1);
- if (index >= 0)
- ret = 0;
- }
- up_read(&dmar_global_lock);
-
- return ret;
-}
-
static struct irq_domain *intel_get_ir_irq_domain(struct irq_alloc_info *info)
{
struct intel_iommu *iommu = NULL;
@@ -1279,10 +1139,6 @@ struct irq_remap_ops intel_irq_remap_ops = {
.setup_ioapic_entry = intel_setup_ioapic_entry,
.set_affinity = intel_ioapic_set_affinity,
.free_irq = free_irte,
- .compose_msi_msg = intel_compose_msi_msg,
- .msi_alloc_irq = intel_msi_alloc_irq,
- .msi_setup_irq = intel_msi_setup_irq,
- .alloc_hpet_msi = intel_alloc_hpet_msi,
.get_ir_irq_domain = intel_get_ir_irq_domain,
.get_irq_domain = intel_get_irq_domain,
};
next prev parent reply other threads:[~2014-11-26 23:10 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-25 5:53 [Patch Part2 v6 00/27] Enable hierarchy irqdomian on x86 platforms Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 01/27] x86, irq: Save destination CPU ID in irq_cfg Jiang Liu
2014-11-26 23:05 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 02/27] x86, irq: Use hierarchy irqdomain to manage CPU interrupt vectors Jiang Liu
2014-11-26 23:06 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 03/27] x86, hpet: Use new irqdomain interfaces to allocate/free IRQ Jiang Liu
2014-11-26 23:06 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-24 15:44 ` [tip:x86/apic] x86/hpet: Use new irqdomain interfaces to allocate /free IRQ tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 04/27] x86, MSI: Use new irqdomain interfaces to allocate/free IRQ Jiang Liu
2014-11-26 23:06 ` [tip:x86/apic] x86, MSI: Use new irqdomain interfaces to allocate /free IRQ tip-bot for Jiang Liu
2015-04-24 15:44 ` [tip:x86/apic] x86/MSI: Use new irqdomain interfaces to allocate/ free IRQ tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 05/27] x86, uv: Use new irqdomain interfaces to allocate/free IRQ Jiang Liu
2014-11-26 23:06 ` [tip:x86/apic] x86, uv: Use new irqdomain interfaces to allocate/ free IRQ tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 06/27] x86, htirq: Use new irqdomain interfaces to allocate/free IRQ Jiang Liu
2014-11-26 23:07 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 07/27] x86, dmar: " Jiang Liu
2014-11-26 23:07 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 08/27] x86: irq_remapping: Introduce new interfaces to support hierarchy irqdomain Jiang Liu
2014-11-26 23:07 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 09/27] iommu/vt-d: Change prototypes to prepare for enabling " Jiang Liu
2014-11-26 23:07 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 10/27] iommu/vt-d: Enhance Intel IR driver to suppport " Jiang Liu
2014-11-26 23:08 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 11/27] iommu/amd: Enhance AMD " Jiang Liu
2014-11-26 23:08 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 12/27] x86, hpet: Enhance HPET IRQ to support " Jiang Liu
2014-11-26 23:08 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 13/27] x86, PCI, MSI: Use hierarchy irqdomain to manage MSI interrupts Jiang Liu
2014-11-26 23:09 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 14/27] x86, irq: Directly call native_compose_msi_msg() for DMAR IRQ Jiang Liu
2014-11-26 23:09 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 15/27] iommu/vt-d: Clean up unused MSI related code Jiang Liu
2014-11-26 23:09 ` tip-bot for Jiang Liu [this message]
2014-11-25 5:53 ` [Patch Part2 v6 16/27] iommu/amd: " Jiang Liu
2014-11-26 23:09 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 17/27] x86: irq_remapping: " Jiang Liu
2014-11-26 23:10 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 18/27] x86, irq: Clean up unused MSI related code and interfaces Jiang Liu
2014-11-26 23:10 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 19/27] iommu/vt-d: Refine the interfaces to create IRQ for DMAR unit Jiang Liu
2014-11-26 23:10 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 20/27] x86, irq: Use hierarchy irqdomain to manage DMAR interrupts Jiang Liu
2014-11-26 23:10 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 21/27] x86, htirq: Use hierarchy irqdomain to manage Hypertransport interrupts Jiang Liu
2014-11-26 23:11 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 22/27] x86, uv: Use hierarchy irqdomain to manage UV interrupts Jiang Liu
2014-11-26 23:11 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-12-15 21:37 ` [Patch Part2 v6 22/27] " Dimitri Sivanich
2014-12-16 17:29 ` Dimitri Sivanich
2014-12-17 2:41 ` Jiang Liu
2014-12-17 16:45 ` Russ Anderson
2014-12-23 7:18 ` Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 23/27] x86, irq: Normalize x86 irq_chip name Jiang Liu
2014-11-26 23:11 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 24/27] x86, PCI/MSI: Simplify the way to deal with remapped MSI interrupts Jiang Liu
2014-11-26 23:11 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 25/27] PCI/MSI: Replace msi_update_msg() with irq_chip_compose_msi_msg() Jiang Liu
2014-11-26 23:12 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 26/27] x86, irq: Implement irq_chip.irq_write_msi_msg for MSI/DMAR/HPET irq_chips Jiang Liu
2014-11-26 23:12 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 5:53 ` [Patch Part2 v6 27/27] x86, irq: Simplify MSI/DMAR/HPET implementation by using common code Jiang Liu
2014-11-26 23:12 ` [tip:x86/apic] x86, irq: Simplify MSI/DMAR/ HPET " tip-bot for Jiang Liu
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