* [tip:ras/core] x86/mce: Add macros for the corrected error count bit field
[not found] <20180925000343.GB5998@agluck-desk>
@ 2018-09-27 14:13 ` tip-bot for Qiuxu Zhuo
0 siblings, 0 replies; only message in thread
From: tip-bot for Qiuxu Zhuo @ 2018-09-27 14:13 UTC (permalink / raw)
To: linux-tip-commits
Cc: mingo, tglx, tony.luck, bp, linux-kernel, aris, qiuxu.zhuo, mchehab, hpa
Commit-ID: e5276b1ffa97e3883802f40a5e3a167fe1cb1d20
Gitweb: https://git.kernel.org/tip/e5276b1ffa97e3883802f40a5e3a167fe1cb1d20
Author: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
AuthorDate: Mon, 24 Sep 2018 17:03:43 -0700
Committer: Borislav Petkov <bp@suse.de>
CommitDate: Thu, 27 Sep 2018 16:08:18 +0200
x86/mce: Add macros for the corrected error count bit field
The bit field [52:38] of MCi_STATUS contains the corrected error count.
Add {*_SHIFT|*_MASK|*_CEC(c)} macros for it.
[ bp: use GENMASK_ULL. ]
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Aristeu Rozanski <aris@redhat.com>
Cc: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Cc: linux-edac@vger.kernel.org
Cc: x86@kernel.org
Link: https://lkml.kernel.org/r/20180925000343.GB5998@agluck-desk
---
arch/x86/include/asm/mce.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 6f95047179eb..97d6969f9a8a 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -39,6 +39,9 @@
#define MCI_STATUS_PCC BIT_ULL(57) /* processor context corrupt */
#define MCI_STATUS_S BIT_ULL(56) /* Signaled machine check */
#define MCI_STATUS_AR BIT_ULL(55) /* Action required */
+#define MCI_STATUS_CEC_SHIFT 38 /* Corrected Error Count */
+#define MCI_STATUS_CEC_MASK GENMASK_ULL(52,38)
+#define MCI_STATUS_CEC(c) (((c) & MCI_STATUS_CEC_MASK) >> MCI_STATUS_CEC_SHIFT)
/* AMD-specific bits */
#define MCI_STATUS_TCC BIT_ULL(55) /* Task context corrupt */
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