From: Palmer Dabbelt <palmer@sifive.com>
Cc: linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
sudeep.holla@arm.com, lorenzo.pieralisi@arm.com,
hanjun.guo@linaro.org, rjw@rjwysocki.net,
Will Deacon <will.deacon@arm.com>,
catalin.marinas@arm.com, Greg KH <gregkh@linuxfoundation.org>,
mark.rutland@arm.com, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, wangxiongfeng2@huawei.com,
vkilari@codeaurora.org, ahs3@redhat.com,
dietmar.eggemann@arm.com, morten.rasmussen@arm.com,
lenb@kernel.org, john.garry@huawei.com, austinwc@codeaurora.org,
tnowicki@caviumnetworks.com, jeremy.linton@arm.com
Subject: Re: [PATCH v7 02/13] drivers: base: cacheinfo: setup DT cache properties early
Date: Wed, 28 Feb 2018 14:34:14 -0800 (PST) [thread overview]
Message-ID: <mhng-a110cedb-912a-4701-b1b4-8546d12e861a@palmer-si-x1c4> (raw)
In-Reply-To: <20180228220619.6992-3-jeremy.linton@arm.com>
On Wed, 28 Feb 2018 14:06:08 PST (-0800), jeremy.linton@arm.com wrote:
> The original intent in cacheinfo was that an architecture
> specific populate_cache_leaves() would probe the hardware
> and then cache_shared_cpu_map_setup() and
> cache_override_properties() would provide firmware help to
> extend/expand upon what was probed. Arm64 was really
> the only architecture that was working this way, and
> with the removal of most of the hardware probing logic it
> became clear that it was possible to simplify the logic a bit.
>
> This patch combines the walk of the DT nodes with the
> code updating the cache size/line_size and nr_sets.
> cache_override_properties() (which was DT specific) is
> then removed. The result is that cacheinfo.of_node is
> no longer used as a temporary place to hold DT references
> for future calls that update cache properties. That change
> helps to clarify its one remaining use (matching
> cacheinfo nodes that represent shared caches) which
> will be used by the ACPI/PPTT code in the following patches.
>
> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
> ---
> arch/riscv/kernel/cacheinfo.c | 1 -
> drivers/base/cacheinfo.c | 65 +++++++++++++++++++------------------------
> 2 files changed, 29 insertions(+), 37 deletions(-)
>
> diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c
> index 10ed2749e246..0bc86e5f8f3f 100644
> --- a/arch/riscv/kernel/cacheinfo.c
> +++ b/arch/riscv/kernel/cacheinfo.c
> @@ -20,7 +20,6 @@ static void ci_leaf_init(struct cacheinfo *this_leaf,
> struct device_node *node,
> enum cache_type type, unsigned int level)
> {
> - this_leaf->of_node = node;
> this_leaf->level = level;
> this_leaf->type = type;
> /* not a sector cache */
> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
> index 09ccef7ddc99..a872523e8951 100644
> --- a/drivers/base/cacheinfo.c
> +++ b/drivers/base/cacheinfo.c
> @@ -71,7 +71,7 @@ static inline int get_cacheinfo_idx(enum cache_type type)
> return type;
> }
This looks good as far as RISC-V is concerned, though that's such a trivial
part of the changeset it's not worth that much :). Thanks!
WARNING: multiple messages have this Message-ID (diff)
From: Palmer Dabbelt <palmer@sifive.com>
To: jeremy.linton@arm.com
Cc: linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
sudeep.holla@arm.com, lorenzo.pieralisi@arm.com,
hanjun.guo@linaro.org, rjw@rjwysocki.net,
Will Deacon <will.deacon@arm.com>,
catalin.marinas@arm.com, Greg KH <gregkh@linuxfoundation.org>,
mark.rutland@arm.com, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, wangxiongfeng2@huawei.com,
vkilari@codeaurora.org, ahs3@redhat.com,
dietmar.eggemann@arm.com, morten.rasmussen@arm.com,
lenb@kernel.org, john.garry@huawei.com, austinwc@codeaurora.org,
tnowicki@caviumnetworks.com, jeremy.linton@arm.com
Subject: Re: [PATCH v7 02/13] drivers: base: cacheinfo: setup DT cache properties early
Date: Wed, 28 Feb 2018 14:34:14 -0800 (PST) [thread overview]
Message-ID: <mhng-a110cedb-912a-4701-b1b4-8546d12e861a@palmer-si-x1c4> (raw)
In-Reply-To: <20180228220619.6992-3-jeremy.linton@arm.com>
On Wed, 28 Feb 2018 14:06:08 PST (-0800), jeremy.linton@arm.com wrote:
> The original intent in cacheinfo was that an architecture
> specific populate_cache_leaves() would probe the hardware
> and then cache_shared_cpu_map_setup() and
> cache_override_properties() would provide firmware help to
> extend/expand upon what was probed. Arm64 was really
> the only architecture that was working this way, and
> with the removal of most of the hardware probing logic it
> became clear that it was possible to simplify the logic a bit.
>
> This patch combines the walk of the DT nodes with the
> code updating the cache size/line_size and nr_sets.
> cache_override_properties() (which was DT specific) is
> then removed. The result is that cacheinfo.of_node is
> no longer used as a temporary place to hold DT references
> for future calls that update cache properties. That change
> helps to clarify its one remaining use (matching
> cacheinfo nodes that represent shared caches) which
> will be used by the ACPI/PPTT code in the following patches.
>
> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
> ---
> arch/riscv/kernel/cacheinfo.c | 1 -
> drivers/base/cacheinfo.c | 65 +++++++++++++++++++------------------------
> 2 files changed, 29 insertions(+), 37 deletions(-)
>
> diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c
> index 10ed2749e246..0bc86e5f8f3f 100644
> --- a/arch/riscv/kernel/cacheinfo.c
> +++ b/arch/riscv/kernel/cacheinfo.c
> @@ -20,7 +20,6 @@ static void ci_leaf_init(struct cacheinfo *this_leaf,
> struct device_node *node,
> enum cache_type type, unsigned int level)
> {
> - this_leaf->of_node = node;
> this_leaf->level = level;
> this_leaf->type = type;
> /* not a sector cache */
> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
> index 09ccef7ddc99..a872523e8951 100644
> --- a/drivers/base/cacheinfo.c
> +++ b/drivers/base/cacheinfo.c
> @@ -71,7 +71,7 @@ static inline int get_cacheinfo_idx(enum cache_type type)
> return type;
> }
This looks good as far as RISC-V is concerned, though that's such a trivial
part of the changeset it's not worth that much :). Thanks!
WARNING: multiple messages have this Message-ID (diff)
From: palmer@sifive.com (Palmer Dabbelt)
To: linux-riscv@lists.infradead.org
Subject: [PATCH v7 02/13] drivers: base: cacheinfo: setup DT cache properties early
Date: Wed, 28 Feb 2018 14:34:14 -0800 (PST) [thread overview]
Message-ID: <mhng-a110cedb-912a-4701-b1b4-8546d12e861a@palmer-si-x1c4> (raw)
In-Reply-To: <20180228220619.6992-3-jeremy.linton@arm.com>
On Wed, 28 Feb 2018 14:06:08 PST (-0800), jeremy.linton at arm.com wrote:
> The original intent in cacheinfo was that an architecture
> specific populate_cache_leaves() would probe the hardware
> and then cache_shared_cpu_map_setup() and
> cache_override_properties() would provide firmware help to
> extend/expand upon what was probed. Arm64 was really
> the only architecture that was working this way, and
> with the removal of most of the hardware probing logic it
> became clear that it was possible to simplify the logic a bit.
>
> This patch combines the walk of the DT nodes with the
> code updating the cache size/line_size and nr_sets.
> cache_override_properties() (which was DT specific) is
> then removed. The result is that cacheinfo.of_node is
> no longer used as a temporary place to hold DT references
> for future calls that update cache properties. That change
> helps to clarify its one remaining use (matching
> cacheinfo nodes that represent shared caches) which
> will be used by the ACPI/PPTT code in the following patches.
>
> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
> ---
> arch/riscv/kernel/cacheinfo.c | 1 -
> drivers/base/cacheinfo.c | 65 +++++++++++++++++++------------------------
> 2 files changed, 29 insertions(+), 37 deletions(-)
>
> diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c
> index 10ed2749e246..0bc86e5f8f3f 100644
> --- a/arch/riscv/kernel/cacheinfo.c
> +++ b/arch/riscv/kernel/cacheinfo.c
> @@ -20,7 +20,6 @@ static void ci_leaf_init(struct cacheinfo *this_leaf,
> struct device_node *node,
> enum cache_type type, unsigned int level)
> {
> - this_leaf->of_node = node;
> this_leaf->level = level;
> this_leaf->type = type;
> /* not a sector cache */
> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
> index 09ccef7ddc99..a872523e8951 100644
> --- a/drivers/base/cacheinfo.c
> +++ b/drivers/base/cacheinfo.c
> @@ -71,7 +71,7 @@ static inline int get_cacheinfo_idx(enum cache_type type)
> return type;
> }
This looks good as far as RISC-V is concerned, though that's such a trivial
part of the changeset it's not worth that much :). Thanks!
WARNING: multiple messages have this Message-ID (diff)
From: palmer@sifive.com (Palmer Dabbelt)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 02/13] drivers: base: cacheinfo: setup DT cache properties early
Date: Wed, 28 Feb 2018 14:34:14 -0800 (PST) [thread overview]
Message-ID: <mhng-a110cedb-912a-4701-b1b4-8546d12e861a@palmer-si-x1c4> (raw)
In-Reply-To: <20180228220619.6992-3-jeremy.linton@arm.com>
On Wed, 28 Feb 2018 14:06:08 PST (-0800), jeremy.linton at arm.com wrote:
> The original intent in cacheinfo was that an architecture
> specific populate_cache_leaves() would probe the hardware
> and then cache_shared_cpu_map_setup() and
> cache_override_properties() would provide firmware help to
> extend/expand upon what was probed. Arm64 was really
> the only architecture that was working this way, and
> with the removal of most of the hardware probing logic it
> became clear that it was possible to simplify the logic a bit.
>
> This patch combines the walk of the DT nodes with the
> code updating the cache size/line_size and nr_sets.
> cache_override_properties() (which was DT specific) is
> then removed. The result is that cacheinfo.of_node is
> no longer used as a temporary place to hold DT references
> for future calls that update cache properties. That change
> helps to clarify its one remaining use (matching
> cacheinfo nodes that represent shared caches) which
> will be used by the ACPI/PPTT code in the following patches.
>
> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
> ---
> arch/riscv/kernel/cacheinfo.c | 1 -
> drivers/base/cacheinfo.c | 65 +++++++++++++++++++------------------------
> 2 files changed, 29 insertions(+), 37 deletions(-)
>
> diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c
> index 10ed2749e246..0bc86e5f8f3f 100644
> --- a/arch/riscv/kernel/cacheinfo.c
> +++ b/arch/riscv/kernel/cacheinfo.c
> @@ -20,7 +20,6 @@ static void ci_leaf_init(struct cacheinfo *this_leaf,
> struct device_node *node,
> enum cache_type type, unsigned int level)
> {
> - this_leaf->of_node = node;
> this_leaf->level = level;
> this_leaf->type = type;
> /* not a sector cache */
> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
> index 09ccef7ddc99..a872523e8951 100644
> --- a/drivers/base/cacheinfo.c
> +++ b/drivers/base/cacheinfo.c
> @@ -71,7 +71,7 @@ static inline int get_cacheinfo_idx(enum cache_type type)
> return type;
> }
This looks good as far as RISC-V is concerned, though that's such a trivial
part of the changeset it's not worth that much :). Thanks!
next prev parent reply other threads:[~2018-02-28 22:34 UTC|newest]
Thread overview: 136+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-28 22:06 [PATCH v7 00/13] Support PPTT for ARM64 Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` [PATCH v7 01/13] drivers: base: cacheinfo: move cache_setup_of_node() Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-03-06 16:16 ` Sudeep Holla
2018-03-06 16:16 ` Sudeep Holla
2018-03-06 16:16 ` Sudeep Holla
2018-02-28 22:06 ` [PATCH v7 02/13] drivers: base: cacheinfo: setup DT cache properties early Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:34 ` Palmer Dabbelt [this message]
2018-02-28 22:34 ` Palmer Dabbelt
2018-02-28 22:34 ` Palmer Dabbelt
2018-02-28 22:34 ` Palmer Dabbelt
2018-03-06 16:43 ` Sudeep Holla
2018-03-06 16:43 ` Sudeep Holla
2018-03-06 16:43 ` Sudeep Holla
2018-02-28 22:06 ` [PATCH v7 03/13] cacheinfo: rename of_node to fw_token Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-03-06 16:45 ` Sudeep Holla
2018-03-06 16:45 ` Sudeep Holla
2018-03-06 16:45 ` Sudeep Holla
2018-02-28 22:06 ` [PATCH v7 04/13] arm64/acpi: Create arch specific cpu to acpi id helper Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-03-06 17:13 ` Sudeep Holla
2018-03-06 17:13 ` Sudeep Holla
2018-03-06 17:13 ` Sudeep Holla
2018-02-28 22:06 ` [PATCH v7 05/13] ACPI/PPTT: Add Processor Properties Topology Table parsing Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-03-06 17:39 ` Sudeep Holla
2018-03-06 17:39 ` Sudeep Holla
2018-03-06 17:39 ` Sudeep Holla
2018-03-08 16:39 ` Ard Biesheuvel
2018-03-08 16:39 ` Ard Biesheuvel
2018-03-08 16:39 ` Ard Biesheuvel
2018-03-08 19:52 ` Jeremy Linton
2018-03-08 19:52 ` Jeremy Linton
2018-03-08 19:52 ` Jeremy Linton
2018-03-08 19:52 ` Jeremy Linton
2018-03-19 10:46 ` Rafael J. Wysocki
2018-03-19 10:46 ` Rafael J. Wysocki
2018-03-19 10:46 ` Rafael J. Wysocki
2018-03-20 13:25 ` Jeremy Linton
2018-03-20 13:25 ` Jeremy Linton
2018-03-20 13:25 ` Jeremy Linton
2018-02-28 22:06 ` [PATCH v7 06/13] ACPI: Enable PPTT support on ARM64 Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-03-06 16:55 ` Sudeep Holla
2018-03-06 16:55 ` Sudeep Holla
2018-03-06 16:55 ` Sudeep Holla
2018-02-28 22:06 ` [PATCH v7 07/13] drivers: base cacheinfo: Add support for ACPI based firmware tables Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-03-06 17:50 ` Sudeep Holla
2018-03-06 17:50 ` Sudeep Holla
2018-03-06 17:50 ` Sudeep Holla
2018-03-08 17:20 ` Lorenzo Pieralisi
2018-03-08 17:20 ` Lorenzo Pieralisi
2018-03-08 17:20 ` Lorenzo Pieralisi
2018-02-28 22:06 ` [PATCH v7 08/13] arm64: " Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-03-03 21:58 ` kbuild test robot
2018-03-03 21:58 ` kbuild test robot
2018-03-03 21:58 ` kbuild test robot
2018-03-03 21:58 ` kbuild test robot
2018-03-06 17:23 ` Sudeep Holla
2018-03-06 17:23 ` Sudeep Holla
2018-03-06 17:23 ` Sudeep Holla
2018-02-28 22:06 ` [PATCH v7 09/13] ACPI/PPTT: Add topology parsing code Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` [PATCH v7 10/13] arm64: topology: rename cluster_id Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-03-05 12:24 ` Mark Brown
2018-03-05 12:24 ` Mark Brown
2018-03-05 12:24 ` Mark Brown
2018-02-28 22:06 ` [PATCH v7 11/13] arm64: topology: enable ACPI/PPTT based CPU topology Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` [PATCH v7 12/13] ACPI: Add PPTT to injectable table list Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` [PATCH v7 13/13] arm64: topology: divorce MC scheduling domain from core_siblings Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-02-28 22:06 ` Jeremy Linton
2018-03-01 15:52 ` Morten Rasmussen
2018-03-01 15:52 ` Morten Rasmussen
2018-03-01 15:52 ` Morten Rasmussen
2018-02-27 20:18 ` Jeremy Linton
2018-02-27 20:18 ` Jeremy Linton
2018-02-27 20:18 ` Jeremy Linton
2018-03-06 16:07 ` Morten Rasmussen
2018-03-06 16:07 ` Morten Rasmussen
2018-03-06 16:07 ` Morten Rasmussen
2018-03-06 22:22 ` Jeremy Linton
2018-03-06 22:22 ` Jeremy Linton
2018-03-06 22:22 ` Jeremy Linton
2018-03-07 13:06 ` Morten Rasmussen
2018-03-07 13:06 ` Morten Rasmussen
2018-03-07 13:06 ` Morten Rasmussen
2018-03-07 16:19 ` Jeremy Linton
2018-03-07 16:19 ` Jeremy Linton
2018-03-07 16:19 ` Jeremy Linton
2018-03-14 13:05 ` Morten Rasmussen
2018-03-14 13:05 ` Morten Rasmussen
2018-03-14 13:05 ` Morten Rasmussen
2018-03-08 20:41 ` Brice Goglin
2018-03-08 20:41 ` Brice Goglin
2018-03-08 20:41 ` Brice Goglin
2018-03-14 12:43 ` Morten Rasmussen
2018-03-14 12:43 ` Morten Rasmussen
2018-03-14 12:43 ` Morten Rasmussen
2018-03-01 12:06 ` [PATCH v7 00/13] Support PPTT for ARM64 Sudeep Holla
2018-03-01 12:06 ` Sudeep Holla
2018-03-01 12:06 ` Sudeep Holla
2018-02-27 18:49 ` Jeremy Linton
2018-02-27 18:49 ` Jeremy Linton
2018-02-27 18:49 ` Jeremy Linton
2018-03-08 15:59 ` Ard Biesheuvel
2018-03-08 15:59 ` Ard Biesheuvel
2018-03-08 15:59 ` Ard Biesheuvel
2018-03-08 17:41 ` Jeremy Linton
2018-03-08 17:41 ` Jeremy Linton
2018-03-08 17:41 ` Jeremy Linton
2018-03-14 9:57 ` vkilari
2018-03-14 9:57 ` vkilari at codeaurora.org
2018-03-14 9:57 ` vkilari at codeaurora.org
2018-03-14 9:57 ` vkilari
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