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* [PATCH net 0/2] net: mv643xx_eth: TSO TX data corruption fixes
@ 2015-10-18 14:02 Philipp Kirchhofer
  2015-10-18 14:02 ` [PATCH net 1/2] net: mv643xx_eth: Ensure proper data alignment in TSO TX path Philipp Kirchhofer
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Philipp Kirchhofer @ 2015-10-18 14:02 UTC (permalink / raw)
  To: Sebastian Hesselbarth, netdev; +Cc: Philipp Kirchhofer

Hello,

as previously discussed [1] the mv643xx_eth driver has some
issues with data corruption when using TCP segmentation offload (TSO).

The following patch set improves this situation by fixing two data
corruption bugs in the TSO TX path.

Before applying the patches repeatedly accessing large files located on
a SMB share on my NSA325 NAS with TSO enabled resulted in different
hash sums, which confirmed that data corruption is happening during
file transfer. After applying the patches the hash sums were the same.

As this is my first patch submission please feel free to point out any
issues with the patch set.

[1] http://thread.gmane.org/gmane.linux.network/336530

Best wishes,
  Philipp

Philipp Kirchhofer (2):
  net: mv643xx_eth: Ensure proper data alignment in TSO TX path
  net: mv643xx_eth: Defer writing the first TX descriptor when using TSO

 drivers/net/ethernet/marvell/mv643xx_eth.c | 48 +++++++++++++++++++++++++-----
 1 file changed, 40 insertions(+), 8 deletions(-)

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH net 1/2] net: mv643xx_eth: Ensure proper data alignment in TSO TX path
  2015-10-18 14:02 [PATCH net 0/2] net: mv643xx_eth: TSO TX data corruption fixes Philipp Kirchhofer
@ 2015-10-18 14:02 ` Philipp Kirchhofer
  2015-10-18 14:02 ` [PATCH net 2/2] net: mv643xx_eth: Defer writing the first TX descriptor when using TSO Philipp Kirchhofer
  2015-10-21 14:38 ` [PATCH net 0/2] net: mv643xx_eth: TSO TX data corruption fixes David Miller
  2 siblings, 0 replies; 4+ messages in thread
From: Philipp Kirchhofer @ 2015-10-18 14:02 UTC (permalink / raw)
  To: Sebastian Hesselbarth, netdev; +Cc: Philipp Kirchhofer

The TX DMA engine requires that buffers with a size of 8 bytes or smaller
must be 64 bit aligned. This requirement may be violated when doing TSO,
as in this case larger skb frags can be broken up and transmitted in small
parts with then inappropriate alignment.

Fix this by checking for proper alignment before handing a buffer to the
DMA engine. If the data is misaligned realign it by copying it into the
TSO header data area.

Signed-off-by: Philipp Kirchhofer <philipp@familie-kirchhofer.de>
---
 drivers/net/ethernet/marvell/mv643xx_eth.c | 22 +++++++++++++++++-----
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ethernet/marvell/mv643xx_eth.c b/drivers/net/ethernet/marvell/mv643xx_eth.c
index d52639b..68073bc 100644
--- a/drivers/net/ethernet/marvell/mv643xx_eth.c
+++ b/drivers/net/ethernet/marvell/mv643xx_eth.c
@@ -759,11 +759,23 @@ txq_put_data_tso(struct net_device *dev, struct tx_queue *txq,
 
 	desc->l4i_chk = 0;
 	desc->byte_cnt = length;
-	desc->buf_ptr = dma_map_single(dev->dev.parent, data,
-				       length, DMA_TO_DEVICE);
-	if (unlikely(dma_mapping_error(dev->dev.parent, desc->buf_ptr))) {
-		WARN(1, "dma_map_single failed!\n");
-		return -ENOMEM;
+
+	if (length <= 8 && (uintptr_t)data & 0x7) {
+		/* Copy unaligned small data fragment to TSO header data area */
+		memcpy(txq->tso_hdrs + txq->tx_curr_desc * TSO_HEADER_SIZE,
+		       data, length);
+		desc->buf_ptr = txq->tso_hdrs_dma
+			+ txq->tx_curr_desc * TSO_HEADER_SIZE;
+	} else {
+		/* Alignment is okay, map buffer and hand off to hardware */
+		txq->tx_desc_mapping[tx_index] = DESC_DMA_MAP_SINGLE;
+		desc->buf_ptr = dma_map_single(dev->dev.parent, data,
+			length, DMA_TO_DEVICE);
+		if (unlikely(dma_mapping_error(dev->dev.parent,
+					       desc->buf_ptr))) {
+			WARN(1, "dma_map_single failed!\n");
+			return -ENOMEM;
+		}
 	}
 
 	cmd_sts = BUFFER_OWNED_BY_DMA;

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH net 2/2] net: mv643xx_eth: Defer writing the first TX descriptor when using TSO
  2015-10-18 14:02 [PATCH net 0/2] net: mv643xx_eth: TSO TX data corruption fixes Philipp Kirchhofer
  2015-10-18 14:02 ` [PATCH net 1/2] net: mv643xx_eth: Ensure proper data alignment in TSO TX path Philipp Kirchhofer
@ 2015-10-18 14:02 ` Philipp Kirchhofer
  2015-10-21 14:38 ` [PATCH net 0/2] net: mv643xx_eth: TSO TX data corruption fixes David Miller
  2 siblings, 0 replies; 4+ messages in thread
From: Philipp Kirchhofer @ 2015-10-18 14:02 UTC (permalink / raw)
  To: Sebastian Hesselbarth, netdev; +Cc: Philipp Kirchhofer

To prevent a race between the TX DMA engine and the CPU the writing of the
first transmit descriptor must be deferred until all following descriptors
have been updated. The network card may otherwise start transmitting before
all packet descriptors are set up correctly, which leads to data corruption
or an aborted transmit operation.

This deferral is already done in the non-TSO TX path, implement it also in
the TSO TX path.

Signed-off-by: Philipp Kirchhofer <philipp@familie-kirchhofer.de>
---
 drivers/net/ethernet/marvell/mv643xx_eth.c | 26 +++++++++++++++++++++++---
 1 file changed, 23 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/marvell/mv643xx_eth.c b/drivers/net/ethernet/marvell/mv643xx_eth.c
index 68073bc..5124535 100644
--- a/drivers/net/ethernet/marvell/mv643xx_eth.c
+++ b/drivers/net/ethernet/marvell/mv643xx_eth.c
@@ -791,7 +791,8 @@ txq_put_data_tso(struct net_device *dev, struct tx_queue *txq,
 }
 
 static inline void
-txq_put_hdr_tso(struct sk_buff *skb, struct tx_queue *txq, int length)
+txq_put_hdr_tso(struct sk_buff *skb, struct tx_queue *txq, int length,
+		u32 *first_cmd_sts, bool first_desc)
 {
 	struct mv643xx_eth_private *mp = txq_to_mp(txq);
 	int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
@@ -800,6 +801,7 @@ txq_put_hdr_tso(struct sk_buff *skb, struct tx_queue *txq, int length)
 	int ret;
 	u32 cmd_csum = 0;
 	u16 l4i_chk = 0;
+	u32 cmd_sts;
 
 	tx_index = txq->tx_curr_desc;
 	desc = &txq->tx_desc_area[tx_index];
@@ -815,9 +817,17 @@ txq_put_hdr_tso(struct sk_buff *skb, struct tx_queue *txq, int length)
 	desc->byte_cnt = hdr_len;
 	desc->buf_ptr = txq->tso_hdrs_dma +
 			txq->tx_curr_desc * TSO_HEADER_SIZE;
-	desc->cmd_sts = cmd_csum | BUFFER_OWNED_BY_DMA  | TX_FIRST_DESC |
+	cmd_sts = cmd_csum | BUFFER_OWNED_BY_DMA  | TX_FIRST_DESC |
 				   GEN_CRC;
 
+	/* Defer updating the first command descriptor until all
+	 * following descriptors have been written.
+	 */
+	if (first_desc)
+		*first_cmd_sts = cmd_sts;
+	else
+		desc->cmd_sts = cmd_sts;
+
 	txq->tx_curr_desc++;
 	if (txq->tx_curr_desc == txq->tx_ring_size)
 		txq->tx_curr_desc = 0;
@@ -831,6 +841,8 @@ static int txq_submit_tso(struct tx_queue *txq, struct sk_buff *skb,
 	int desc_count = 0;
 	struct tso_t tso;
 	int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
+	struct tx_desc *first_tx_desc;
+	u32 first_cmd_sts = 0;
 
 	/* Count needed descriptors */
 	if ((txq->tx_desc_count + tso_count_descs(skb)) >= txq->tx_ring_size) {
@@ -838,11 +850,14 @@ static int txq_submit_tso(struct tx_queue *txq, struct sk_buff *skb,
 		return -EBUSY;
 	}
 
+	first_tx_desc = &txq->tx_desc_area[txq->tx_curr_desc];
+
 	/* Initialize the TSO handler, and prepare the first payload */
 	tso_start(skb, &tso);
 
 	total_len = skb->len - hdr_len;
 	while (total_len > 0) {
+		bool first_desc = (desc_count == 0);
 		char *hdr;
 
 		data_left = min_t(int, skb_shinfo(skb)->gso_size, total_len);
@@ -852,7 +867,8 @@ static int txq_submit_tso(struct tx_queue *txq, struct sk_buff *skb,
 		/* prepare packet headers: MAC + IP + TCP */
 		hdr = txq->tso_hdrs + txq->tx_curr_desc * TSO_HEADER_SIZE;
 		tso_build_hdr(skb, hdr, &tso, data_left, total_len == 0);
-		txq_put_hdr_tso(skb, txq, data_left);
+		txq_put_hdr_tso(skb, txq, data_left, &first_cmd_sts,
+				first_desc);
 
 		while (data_left > 0) {
 			int size;
@@ -872,6 +888,10 @@ static int txq_submit_tso(struct tx_queue *txq, struct sk_buff *skb,
 	__skb_queue_tail(&txq->tx_skb, skb);
 	skb_tx_timestamp(skb);
 
+	/* ensure all other descriptors are written before first cmd_sts */
+	wmb();
+	first_tx_desc->cmd_sts = first_cmd_sts;
+
 	/* clear TX_END status */
 	mp->work_tx_end &= ~(1 << txq->index);
 

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH net 0/2] net: mv643xx_eth: TSO TX data corruption fixes
  2015-10-18 14:02 [PATCH net 0/2] net: mv643xx_eth: TSO TX data corruption fixes Philipp Kirchhofer
  2015-10-18 14:02 ` [PATCH net 1/2] net: mv643xx_eth: Ensure proper data alignment in TSO TX path Philipp Kirchhofer
  2015-10-18 14:02 ` [PATCH net 2/2] net: mv643xx_eth: Defer writing the first TX descriptor when using TSO Philipp Kirchhofer
@ 2015-10-21 14:38 ` David Miller
  2 siblings, 0 replies; 4+ messages in thread
From: David Miller @ 2015-10-21 14:38 UTC (permalink / raw)
  To: philipp; +Cc: sebastian.hesselbarth, netdev

From: Philipp Kirchhofer <philipp@familie-kirchhofer.de>
Date: Sun, 18 Oct 2015 16:02:42 +0200

> as previously discussed [1] the mv643xx_eth driver has some
> issues with data corruption when using TCP segmentation offload (TSO).
> 
> The following patch set improves this situation by fixing two data
> corruption bugs in the TSO TX path.
> 
> Before applying the patches repeatedly accessing large files located on
> a SMB share on my NSA325 NAS with TSO enabled resulted in different
> hash sums, which confirmed that data corruption is happening during
> file transfer. After applying the patches the hash sums were the same.
> 
> As this is my first patch submission please feel free to point out any
> issues with the patch set.
> 
> [1] http://thread.gmane.org/gmane.linux.network/336530

Series applied, thanks.

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2015-10-21 14:21 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2015-10-18 14:02 [PATCH net 0/2] net: mv643xx_eth: TSO TX data corruption fixes Philipp Kirchhofer
2015-10-18 14:02 ` [PATCH net 1/2] net: mv643xx_eth: Ensure proper data alignment in TSO TX path Philipp Kirchhofer
2015-10-18 14:02 ` [PATCH net 2/2] net: mv643xx_eth: Defer writing the first TX descriptor when using TSO Philipp Kirchhofer
2015-10-21 14:38 ` [PATCH net 0/2] net: mv643xx_eth: TSO TX data corruption fixes David Miller

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