* [PATCH net-next 0/2] Microchip KSZ driver enhancements
@ 2019-06-12 20:49 Robert Hancock
2019-06-12 20:49 ` [PATCH net-next 1/2] net: dsa: microchip: Add PHY errata workarounds Robert Hancock
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Robert Hancock @ 2019-06-12 20:49 UTC (permalink / raw)
To: netdev
Cc: woojung.huh, UNGLinuxDriver, andrew, vivien.didelot, f.fainelli,
Robert Hancock
A couple of enhancements to the Microchip KSZ switch driver: one to add
PHY register settings for errata workarounds for more stable operation, and
another to add a device tree option to change the output clock rate as
required by some board designs.
Robert Hancock (2):
net: dsa: microchip: Add PHY errata workarounds
net: dsa: microchip: Support optional 125MHz SYNCLKO output
Documentation/devicetree/bindings/net/dsa/ksz.txt | 2 +
drivers/net/dsa/microchip/ksz9477.c | 66 +++++++++++++++++++++++
drivers/net/dsa/microchip/ksz_common.c | 2 +
drivers/net/dsa/microchip/ksz_priv.h | 2 +
4 files changed, 72 insertions(+)
--
1.8.3.1
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH net-next 1/2] net: dsa: microchip: Add PHY errata workarounds 2019-06-12 20:49 [PATCH net-next 0/2] Microchip KSZ driver enhancements Robert Hancock @ 2019-06-12 20:49 ` Robert Hancock 2019-06-12 20:49 ` [PATCH net-next 2/2] net: dsa: microchip: Support optional 125MHz SYNCLKO output Robert Hancock 2019-06-15 2:12 ` [PATCH net-next 0/2] Microchip KSZ driver enhancements David Miller 2 siblings, 0 replies; 4+ messages in thread From: Robert Hancock @ 2019-06-12 20:49 UTC (permalink / raw) To: netdev Cc: woojung.huh, UNGLinuxDriver, andrew, vivien.didelot, f.fainelli, Robert Hancock The Silicon Errata and Data Sheet Clarification documents for the KSZ9477 series of chips describe a number of otherwise undocumented PHY register settings which are required to work around various chip errata. Apply these settings when initializing the PHY ports on these chips. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> --- drivers/net/dsa/microchip/ksz9477.c | 62 ++++++++++++++++++++++++++++++++++++ drivers/net/dsa/microchip/ksz_priv.h | 1 + 2 files changed, 63 insertions(+) diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477.c index c026d15..7be6d84 100644 --- a/drivers/net/dsa/microchip/ksz9477.c +++ b/drivers/net/dsa/microchip/ksz9477.c @@ -1165,6 +1165,62 @@ static phy_interface_t ksz9477_get_interface(struct ksz_device *dev, int port) return interface; } +static void ksz9477_port_mmd_write(struct ksz_device *dev, int port, + u8 dev_addr, u16 reg_addr, u16 val) +{ + ksz_pwrite16(dev, port, REG_PORT_PHY_MMD_SETUP, + MMD_SETUP(PORT_MMD_OP_INDEX, dev_addr)); + ksz_pwrite16(dev, port, REG_PORT_PHY_MMD_INDEX_DATA, reg_addr); + ksz_pwrite16(dev, port, REG_PORT_PHY_MMD_SETUP, + MMD_SETUP(PORT_MMD_OP_DATA_NO_INCR, dev_addr)); + ksz_pwrite16(dev, port, REG_PORT_PHY_MMD_INDEX_DATA, val); +} + +static void ksz9477_phy_errata_setup(struct ksz_device *dev, int port) +{ + /* Apply PHY settings to address errata listed in + * KSZ9477, KSZ9897, KSZ9896, KSZ9567, KSZ8565 + * Silicon Errata and Data Sheet Clarification documents: + * + * Register settings are needed to improve PHY receive performance + */ + ksz9477_port_mmd_write(dev, port, 0x01, 0x6f, 0xdd0b); + ksz9477_port_mmd_write(dev, port, 0x01, 0x8f, 0x6032); + ksz9477_port_mmd_write(dev, port, 0x01, 0x9d, 0x248c); + ksz9477_port_mmd_write(dev, port, 0x01, 0x75, 0x0060); + ksz9477_port_mmd_write(dev, port, 0x01, 0xd3, 0x7777); + ksz9477_port_mmd_write(dev, port, 0x1c, 0x06, 0x3008); + ksz9477_port_mmd_write(dev, port, 0x1c, 0x08, 0x2001); + + /* Transmit waveform amplitude can be improved + * (1000BASE-T, 100BASE-TX, 10BASE-Te) + */ + ksz9477_port_mmd_write(dev, port, 0x1c, 0x04, 0x00d0); + + /* Energy Efficient Ethernet (EEE) feature select must + * be manually disabled (except on KSZ8565 which is 100Mbit) + */ + if (dev->features & GBIT_SUPPORT) + ksz9477_port_mmd_write(dev, port, 0x07, 0x3c, 0x0000); + + /* Register settings are required to meet data sheet + * supply current specifications + */ + ksz9477_port_mmd_write(dev, port, 0x1c, 0x13, 0x6eff); + ksz9477_port_mmd_write(dev, port, 0x1c, 0x14, 0xe6ff); + ksz9477_port_mmd_write(dev, port, 0x1c, 0x15, 0x6eff); + ksz9477_port_mmd_write(dev, port, 0x1c, 0x16, 0xe6ff); + ksz9477_port_mmd_write(dev, port, 0x1c, 0x17, 0x00ff); + ksz9477_port_mmd_write(dev, port, 0x1c, 0x18, 0x43ff); + ksz9477_port_mmd_write(dev, port, 0x1c, 0x19, 0xc3ff); + ksz9477_port_mmd_write(dev, port, 0x1c, 0x1a, 0x6fff); + ksz9477_port_mmd_write(dev, port, 0x1c, 0x1b, 0x07ff); + ksz9477_port_mmd_write(dev, port, 0x1c, 0x1c, 0x0fff); + ksz9477_port_mmd_write(dev, port, 0x1c, 0x1d, 0xe7ff); + ksz9477_port_mmd_write(dev, port, 0x1c, 0x1e, 0xefff); + ksz9477_port_mmd_write(dev, port, 0x1c, 0x20, 0xeeee); +} + static void ksz9477_port_setup(struct ksz_device *dev, int port, bool cpu_port) { u8 data8; @@ -1203,6 +1259,8 @@ static void ksz9477_port_setup(struct ksz_device *dev, int port, bool cpu_port) PORT_FORCE_TX_FLOW_CTRL | PORT_FORCE_RX_FLOW_CTRL, false); + if (dev->phy_errata_9477) + ksz9477_phy_errata_setup(dev, port); } else { /* force flow control */ ksz_port_cfg(dev, port, REG_PORT_CTRL_0, @@ -1474,6 +1532,7 @@ struct ksz_chip_data { int num_statics; int cpu_ports; int port_cnt; + bool phy_errata_9477; }; static const struct ksz_chip_data ksz9477_switch_chips[] = { @@ -1485,6 +1544,7 @@ struct ksz_chip_data { .num_statics = 16, .cpu_ports = 0x7F, /* can be configured as cpu port */ .port_cnt = 7, /* total physical port count */ + .phy_errata_9477 = true, }, { .chip_id = 0x00989700, @@ -1494,6 +1554,7 @@ struct ksz_chip_data { .num_statics = 16, .cpu_ports = 0x7F, /* can be configured as cpu port */ .port_cnt = 7, /* total physical port count */ + .phy_errata_9477 = true, }, { .chip_id = 0x00989300, @@ -1522,6 +1583,7 @@ static int ksz9477_switch_init(struct ksz_device *dev) dev->num_statics = chip->num_statics; dev->port_cnt = chip->port_cnt; dev->cpu_ports = chip->cpu_ports; + dev->phy_errata_9477 = chip->phy_errata_9477; break; } diff --git a/drivers/net/dsa/microchip/ksz_priv.h b/drivers/net/dsa/microchip/ksz_priv.h index b52e5ca..724301d 100644 --- a/drivers/net/dsa/microchip/ksz_priv.h +++ b/drivers/net/dsa/microchip/ksz_priv.h @@ -77,6 +77,7 @@ struct ksz_device { int last_port; /* ports after that not used */ phy_interface_t interface; u32 regs_size; + bool phy_errata_9477; struct vlan_table *vlan_cache; -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH net-next 2/2] net: dsa: microchip: Support optional 125MHz SYNCLKO output 2019-06-12 20:49 [PATCH net-next 0/2] Microchip KSZ driver enhancements Robert Hancock 2019-06-12 20:49 ` [PATCH net-next 1/2] net: dsa: microchip: Add PHY errata workarounds Robert Hancock @ 2019-06-12 20:49 ` Robert Hancock 2019-06-15 2:12 ` [PATCH net-next 0/2] Microchip KSZ driver enhancements David Miller 2 siblings, 0 replies; 4+ messages in thread From: Robert Hancock @ 2019-06-12 20:49 UTC (permalink / raw) To: netdev Cc: woojung.huh, UNGLinuxDriver, andrew, vivien.didelot, f.fainelli, Robert Hancock The KSZ9477 series chips have a SYNCLKO pin which by default outputs a 25MHz clock, but some board setups require a 125MHz clock instead. Added a microchip,synclko-125 device tree property to allow indicating a 125MHz clock output is required. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> --- Documentation/devicetree/bindings/net/dsa/ksz.txt | 2 ++ drivers/net/dsa/microchip/ksz9477.c | 4 ++++ drivers/net/dsa/microchip/ksz_common.c | 2 ++ drivers/net/dsa/microchip/ksz_priv.h | 1 + 4 files changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/net/dsa/ksz.txt b/Documentation/devicetree/bindings/net/dsa/ksz.txt index e7db726..4ac21ce 100644 --- a/Documentation/devicetree/bindings/net/dsa/ksz.txt +++ b/Documentation/devicetree/bindings/net/dsa/ksz.txt @@ -16,6 +16,8 @@ Required properties: Optional properties: - reset-gpios : Should be a gpio specifier for a reset line +- microchip,synclko-125 : Set if the output SYNCLKO frequency should be set to + 125MHz instead of 25MHz. See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional required and optional properties. diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477.c index 7be6d84..508380f 100644 --- a/drivers/net/dsa/microchip/ksz9477.c +++ b/drivers/net/dsa/microchip/ksz9477.c @@ -258,6 +258,10 @@ static int ksz9477_reset_switch(struct ksz_device *dev) data16 |= (BROADCAST_STORM_VALUE * BROADCAST_STORM_PROT_RATE) / 100; ksz_write16(dev, REG_SW_MAC_CTRL_2, data16); + if (dev->synclko_125) + ksz_write8(dev, REG_SW_GLOBAL_OUTPUT_CTRL__1, + SW_ENABLE_REFCLKO | SW_REFCLKO_IS_125MHZ); + return 0; } diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c index 39dace8..40c57d8 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -460,6 +460,8 @@ int ksz_switch_register(struct ksz_device *dev, ret = of_get_phy_mode(dev->dev->of_node); if (ret >= 0) dev->interface = ret; + dev->synclko_125 = of_property_read_bool(dev->dev->of_node, + "microchip,synclko-125"); } ret = dsa_register_switch(dev->ds); diff --git a/drivers/net/dsa/microchip/ksz_priv.h b/drivers/net/dsa/microchip/ksz_priv.h index 724301d..c615d2a 100644 --- a/drivers/net/dsa/microchip/ksz_priv.h +++ b/drivers/net/dsa/microchip/ksz_priv.h @@ -78,6 +78,7 @@ struct ksz_device { phy_interface_t interface; u32 regs_size; bool phy_errata_9477; + bool synclko_125; struct vlan_table *vlan_cache; -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH net-next 0/2] Microchip KSZ driver enhancements 2019-06-12 20:49 [PATCH net-next 0/2] Microchip KSZ driver enhancements Robert Hancock 2019-06-12 20:49 ` [PATCH net-next 1/2] net: dsa: microchip: Add PHY errata workarounds Robert Hancock 2019-06-12 20:49 ` [PATCH net-next 2/2] net: dsa: microchip: Support optional 125MHz SYNCLKO output Robert Hancock @ 2019-06-15 2:12 ` David Miller 2 siblings, 0 replies; 4+ messages in thread From: David Miller @ 2019-06-15 2:12 UTC (permalink / raw) To: hancock Cc: netdev, woojung.huh, UNGLinuxDriver, andrew, vivien.didelot, f.fainelli From: Robert Hancock <hancock@sedsystems.ca> Date: Wed, 12 Jun 2019 14:49:04 -0600 > A couple of enhancements to the Microchip KSZ switch driver: one to add > PHY register settings for errata workarounds for more stable operation, and > another to add a device tree option to change the output clock rate as > required by some board designs. Series applied. ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2019-06-15 2:13 UTC | newest] Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-06-12 20:49 [PATCH net-next 0/2] Microchip KSZ driver enhancements Robert Hancock 2019-06-12 20:49 ` [PATCH net-next 1/2] net: dsa: microchip: Add PHY errata workarounds Robert Hancock 2019-06-12 20:49 ` [PATCH net-next 2/2] net: dsa: microchip: Support optional 125MHz SYNCLKO output Robert Hancock 2019-06-15 2:12 ` [PATCH net-next 0/2] Microchip KSZ driver enhancements David Miller
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