From: Voon Weifeng <weifeng.voon@intel.com>
To: "David S. Miller" <davem@davemloft.net>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
Jose Abreu <joabreu@synopsys.com>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Andrew Lunn <andrew@lunn.ch>,
Alexandre Torgue <alexandre.torgue@st.com>,
Ong Boon Leong <boon.leong.ong@intel.com>,
Voon Weifeng <weifeng.voon@intel.com>
Subject: [PATCH v1 net-next 4/4] net: stmmac: setup higher frequency clk support for EHL & TGL
Date: Tue, 27 Aug 2019 09:38:11 +0800 [thread overview]
Message-ID: <1566869891-29239-5-git-send-email-weifeng.voon@intel.com> (raw)
In-Reply-To: <1566869891-29239-1-git-send-email-weifeng.voon@intel.com>
EHL DW EQOS is running on a 200MHz clock. Setting up stmmac-clk,
ptp clock and ptp_max_adj to 200MHz.
Signed-off-by: Voon Weifeng <weifeng.voon@intel.com>
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
---
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 21 +++++++++++++++++++++
drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c | 3 +++
include/linux/stmmac.h | 1 +
3 files changed, 25 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
index e969dc9bb9f0..20906287b6d4 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
@@ -9,6 +9,7 @@
Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
*******************************************************************************/
+#include <linux/clk-provider.h>
#include <linux/pci.h>
#include <linux/dmi.h>
@@ -174,6 +175,19 @@ static int intel_mgbe_common_data(struct pci_dev *pdev,
plat->axi->axi_blen[1] = 8;
plat->axi->axi_blen[2] = 16;
+ plat->ptp_max_adj = plat->clk_ptp_rate;
+
+ /* Set system clock */
+ plat->stmmac_clk = clk_register_fixed_rate(&pdev->dev,
+ "stmmac-clk", NULL, 0,
+ plat->clk_ptp_rate);
+
+ if (IS_ERR(plat->stmmac_clk)) {
+ dev_warn(&pdev->dev, "Fail to register stmmac-clk\n");
+ plat->stmmac_clk = NULL;
+ }
+ clk_prepare_enable(plat->stmmac_clk);
+
/* Set default value for multicast hash bins */
plat->multicast_filter_bins = HASH_TABLE_SIZE;
@@ -193,6 +207,7 @@ static int ehl_common_data(struct pci_dev *pdev,
plat->rx_queues_to_use = 8;
plat->tx_queues_to_use = 8;
+ plat->clk_ptp_rate = 200000000;
ret = intel_mgbe_common_data(pdev, plat);
if (ret)
return ret;
@@ -233,6 +248,7 @@ static int tgl_common_data(struct pci_dev *pdev,
plat->rx_queues_to_use = 6;
plat->tx_queues_to_use = 4;
+ plat->clk_ptp_rate = 200000000;
ret = intel_mgbe_common_data(pdev, plat);
if (ret)
return ret;
@@ -438,10 +454,15 @@ static int stmmac_pci_probe(struct pci_dev *pdev,
*/
static void stmmac_pci_remove(struct pci_dev *pdev)
{
+ struct net_device *ndev = dev_get_drvdata(&pdev->dev);
+ struct stmmac_priv *priv = netdev_priv(ndev);
int i;
stmmac_dvr_remove(&pdev->dev);
+ if (priv->plat->stmmac_clk)
+ clk_unregister_fixed_rate(priv->plat->stmmac_clk);
+
for (i = 0; i <= PCI_STD_RESOURCE_END; i++) {
if (pci_resource_len(pdev, i) == 0)
continue;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c
index c48224973a37..173493db038c 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c
@@ -194,6 +194,9 @@ void stmmac_ptp_register(struct stmmac_priv *priv)
priv->pps[i].available = true;
}
+ if (priv->plat->ptp_max_adj)
+ stmmac_ptp_clock_ops.max_adj = priv->plat->ptp_max_adj;
+
stmmac_ptp_clock_ops.n_per_out = priv->dma_cap.pps_out_num;
spin_lock_init(&priv->ptp_lock);
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
index 5cc6b6faf359..7ad7ae35cf88 100644
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -168,6 +168,7 @@ struct plat_stmmacenet_data {
struct clk *clk_ptp_ref;
unsigned int clk_ptp_rate;
unsigned int clk_ref_rate;
+ s32 ptp_max_adj;
struct reset_control *stmmac_rst;
struct stmmac_axi *axi;
int has_gmac4;
--
1.9.1
next prev parent reply other threads:[~2019-08-26 17:39 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-27 1:38 [PATCH v1 net-next 0/4] Add EHL and TGL PCI info and PCI ID Voon Weifeng
2019-08-27 1:38 ` [PATCH v1 net-next 1/4] net: stmmac: add EHL SGMII 1Gbps " Voon Weifeng
2019-08-27 1:38 ` [PATCH v1 net-next 2/4] net: stmmac: add TGL " Voon Weifeng
2019-08-27 1:38 ` [PATCH v1 net-next 3/4] net: stmmac: add EHL RGMII " Voon Weifeng
2019-08-27 1:38 ` Voon Weifeng [this message]
2019-08-26 19:55 ` [PATCH v1 net-next 4/4] net: stmmac: setup higher frequency clk support for EHL & TGL Florian Fainelli
2019-08-26 20:13 ` Andrew Lunn
2019-08-27 10:38 ` Voon, Weifeng
2019-08-27 15:08 ` Florian Fainelli
2019-08-28 4:59 ` [PATCH v1 net-next 0/4] Add EHL and TGL PCI info and PCI ID David Miller
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