* [PATCH] stmmac: pci: Add LS7A support for dwmac-loongson
@ 2022-08-16 10:25 Feiyang Chen
2022-08-18 2:15 ` Andrew Lunn
2022-08-18 2:19 ` Andrew Lunn
0 siblings, 2 replies; 8+ messages in thread
From: Feiyang Chen @ 2022-08-16 10:25 UTC (permalink / raw)
To: peppe.cavallaro, alexandre.torgue, joabreu
Cc: Feiyang Chen, zhangqing, chenhuacai, chris.chenfeiyang, netdev,
loongarch
Current dwmac-loongson only support LS2K in the "probed with PCI and
configured with DT" manner. We add LS7A support on which the devices
are fully PCI (non-DT).
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Feiyang Chen <chenfeiyang@loongson.cn>
---
.../ethernet/stmicro/stmmac/dwmac-loongson.c | 175 ++++++++++++------
1 file changed, 122 insertions(+), 53 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
index 017dbbda0c1c..50748f047e85 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
@@ -9,14 +9,22 @@
#include <linux/of_irq.h>
#include "stmmac.h"
-static int loongson_default_data(struct plat_stmmacenet_data *plat)
+struct stmmac_pci_info {
+ int (*setup)(struct pci_dev *pdev, struct plat_stmmacenet_data *plat);
+};
+
+static void common_default_data(struct pci_dev *pdev,
+ struct plat_stmmacenet_data *plat)
{
+ plat->bus_id = PCI_DEVID(pdev->bus->number, pdev->devfn);
+ plat->interface = PHY_INTERFACE_MODE_GMII;
+
plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
plat->has_gmac = 1;
plat->force_sf_dma_mode = 1;
/* Set default value for multicast hash bins */
- plat->multicast_filter_bins = HASH_TABLE_SIZE;
+ plat->multicast_filter_bins = 256;
/* Set default value for unicast filter entries */
plat->unicast_filter_entries = 1;
@@ -35,32 +43,79 @@ static int loongson_default_data(struct plat_stmmacenet_data *plat)
/* Disable RX queues routing by default */
plat->rx_queues_cfg[0].pkt_route = 0x0;
- /* Default to phy auto-detection */
- plat->phy_addr = -1;
-
plat->dma_cfg->pbl = 32;
plat->dma_cfg->pblx8 = true;
- plat->multicast_filter_bins = 256;
+ plat->clk_ref_rate = 125000000;
+ plat->clk_ptp_rate = 125000000;
+}
+
+static int loongson_gmac_data(struct pci_dev *pdev,
+ struct plat_stmmacenet_data *plat)
+{
+ common_default_data(pdev, plat);
+
+ plat->mdio_bus_data->phy_mask = 0;
+
+ plat->phy_addr = -1;
+ plat->phy_interface = PHY_INTERFACE_MODE_RGMII_ID;
+
+ return 0;
+}
+
+static struct stmmac_pci_info loongson_gmac_pci_info = {
+ .setup = loongson_gmac_data,
+};
+
+static void loongson_gnet_fix_speed(void *priv, unsigned int speed)
+{
+ struct net_device *ndev = (struct net_device *)(*(unsigned long *)priv);
+ struct stmmac_priv *ptr = netdev_priv(ndev);
+
+ if (speed == SPEED_1000) {
+ if (readl(ptr->ioaddr + MAC_CTRL_REG) & (1 << 15) /* PS */) {
+ /* reset phy */
+ phy_set_bits(ndev->phydev, 0 /*MII_BMCR*/,
+ 0x200 /*BMCR_ANRESTART*/);
+ }
+ }
+}
+
+static int loongson_gnet_data(struct pci_dev *pdev,
+ struct plat_stmmacenet_data *plat)
+{
+ common_default_data(pdev, plat);
+
+ plat->mdio_bus_data->phy_mask = 0xfffffffb;
+
+ plat->phy_addr = 2;
+ plat->phy_interface = PHY_INTERFACE_MODE_GMII;
+
+ /* GNET 1000M speed need workaround */
+ plat->fix_mac_speed = loongson_gnet_fix_speed;
+
+ /* Get netdev pointer address */
+ plat->bsp_priv = &(pdev->dev.driver_data);
+
return 0;
}
-static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+static struct stmmac_pci_info loongson_gnet_pci_info = {
+ .setup = loongson_gnet_data,
+};
+
+static int loongson_dwmac_probe(struct pci_dev *pdev,
+ const struct pci_device_id *id)
{
struct plat_stmmacenet_data *plat;
+ struct stmmac_pci_info *info;
struct stmmac_resources res;
struct device_node *np;
- int ret, i, phy_mode;
+ int ret, i, bus_id, phy_mode;
bool mdio = false;
np = dev_of_node(&pdev->dev);
-
- if (!np) {
- pr_info("dwmac_loongson_pci: No OF node\n");
- return -ENODEV;
- }
-
- if (!of_device_is_compatible(np, "loongson, pci-gmac")) {
+ if (np && !of_device_is_compatible(np, "loongson, pci-gmac")) {
pr_info("dwmac_loongson_pci: Incompatible OF node\n");
return -ENODEV;
}
@@ -74,14 +129,14 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id
mdio = true;
}
- if (mdio) {
- plat->mdio_bus_data = devm_kzalloc(&pdev->dev,
- sizeof(*plat->mdio_bus_data),
- GFP_KERNEL);
- if (!plat->mdio_bus_data)
- return -ENOMEM;
+ plat->mdio_bus_data = devm_kzalloc(&pdev->dev,
+ sizeof(*plat->mdio_bus_data),
+ GFP_KERNEL);
+ if (!plat->mdio_bus_data)
+ return -ENOMEM;
+
+ if (mdio)
plat->mdio_bus_data->needs_reset = true;
- }
plat->dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*plat->dma_cfg), GFP_KERNEL);
if (!plat->dma_cfg)
@@ -104,42 +159,52 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id
break;
}
- plat->bus_id = of_alias_get_id(np, "ethernet");
- if (plat->bus_id < 0)
- plat->bus_id = pci_dev_id(pdev);
-
- phy_mode = device_get_phy_mode(&pdev->dev);
- if (phy_mode < 0) {
- dev_err(&pdev->dev, "phy_mode not found\n");
- return phy_mode;
- }
-
- plat->phy_interface = phy_mode;
- plat->interface = PHY_INTERFACE_MODE_GMII;
-
pci_set_master(pdev);
- loongson_default_data(plat);
- pci_enable_msi(pdev);
- memset(&res, 0, sizeof(res));
- res.addr = pcim_iomap_table(pdev)[0];
+ info = (struct stmmac_pci_info *)id->driver_data;
+ ret = info->setup(pdev, plat);
+ if (ret)
+ return ret;
- res.irq = of_irq_get_byname(np, "macirq");
- if (res.irq < 0) {
- dev_err(&pdev->dev, "IRQ macirq not found\n");
- ret = -ENODEV;
+ if (np) {
+ bus_id = of_alias_get_id(np, "ethernet");
+ if (bus_id >= 0)
+ plat->bus_id = bus_id;
+
+ phy_mode = device_get_phy_mode(&pdev->dev);
+ if (phy_mode < 0) {
+ dev_err(&pdev->dev, "phy_mode not found\n");
+ return phy_mode;
+ }
+ plat->phy_interface = phy_mode;
}
- res.wol_irq = of_irq_get_byname(np, "eth_wake_irq");
- if (res.wol_irq < 0) {
- dev_info(&pdev->dev, "IRQ eth_wake_irq not found, using macirq\n");
- res.wol_irq = res.irq;
- }
+ pci_enable_msi(pdev);
- res.lpi_irq = of_irq_get_byname(np, "eth_lpi");
- if (res.lpi_irq < 0) {
- dev_err(&pdev->dev, "IRQ eth_lpi not found\n");
- ret = -ENODEV;
+ memset(&res, 0, sizeof(res));
+ res.addr = pcim_iomap_table(pdev)[0];
+ if (np) {
+ res.irq = of_irq_get_byname(np, "macirq");
+ if (res.irq < 0) {
+ dev_err(&pdev->dev, "IRQ macirq not found\n");
+ ret = -ENODEV;
+ }
+
+ res.wol_irq = of_irq_get_byname(np, "eth_wake_irq");
+ if (res.wol_irq < 0) {
+ dev_info(&pdev->dev,
+ "IRQ eth_wake_irq not found, using macirq\n");
+ res.wol_irq = res.irq;
+ }
+
+ res.lpi_irq = of_irq_get_byname(np, "eth_lpi");
+ if (res.lpi_irq < 0) {
+ dev_err(&pdev->dev, "IRQ eth_lpi not found\n");
+ ret = -ENODEV;
+ }
+ } else {
+ res.irq = pdev->irq;
+ res.wol_irq = pdev->irq;
}
return stmmac_dvr_probe(&pdev->dev, plat, &res);
@@ -199,8 +264,12 @@ static int __maybe_unused loongson_dwmac_resume(struct device *dev)
static SIMPLE_DEV_PM_OPS(loongson_dwmac_pm_ops, loongson_dwmac_suspend,
loongson_dwmac_resume);
+#define PCI_DEVICE_ID_LOONGSON_GMAC 0x7a03
+#define PCI_DEVICE_ID_LOONGSON_GNET 0x7a13
+
static const struct pci_device_id loongson_dwmac_id_table[] = {
- { PCI_VDEVICE(LOONGSON, 0x7a03) },
+ { PCI_DEVICE_DATA(LOONGSON, GMAC, &loongson_gmac_pci_info) },
+ { PCI_DEVICE_DATA(LOONGSON, GNET, &loongson_gnet_pci_info) },
{}
};
MODULE_DEVICE_TABLE(pci, loongson_dwmac_id_table);
--
2.31.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH] stmmac: pci: Add LS7A support for dwmac-loongson
2022-08-16 10:25 [PATCH] stmmac: pci: Add LS7A support for dwmac-loongson Feiyang Chen
@ 2022-08-18 2:15 ` Andrew Lunn
2022-08-18 5:01 ` Feiyang Chen
2022-08-18 2:19 ` Andrew Lunn
1 sibling, 1 reply; 8+ messages in thread
From: Andrew Lunn @ 2022-08-18 2:15 UTC (permalink / raw)
To: Feiyang Chen
Cc: peppe.cavallaro, alexandre.torgue, joabreu, Feiyang Chen,
zhangqing, chenhuacai, netdev, loongarch
> +static void loongson_gnet_fix_speed(void *priv, unsigned int speed)
> +{
> + struct net_device *ndev = (struct net_device *)(*(unsigned long *)priv);
> + struct stmmac_priv *ptr = netdev_priv(ndev);
> +
> + if (speed == SPEED_1000) {
> + if (readl(ptr->ioaddr + MAC_CTRL_REG) & (1 << 15) /* PS */) {
> + /* reset phy */
> + phy_set_bits(ndev->phydev, 0 /*MII_BMCR*/,
> + 0x200 /*BMCR_ANRESTART*/);
The MAC driver should not be accessing PHY registers. Why does the PHY
need a reset? Can you call phy_stop()/phy_start()?
Andrew
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] stmmac: pci: Add LS7A support for dwmac-loongson
2022-08-16 10:25 [PATCH] stmmac: pci: Add LS7A support for dwmac-loongson Feiyang Chen
2022-08-18 2:15 ` Andrew Lunn
@ 2022-08-18 2:19 ` Andrew Lunn
2022-08-18 5:01 ` Feiyang Chen
1 sibling, 1 reply; 8+ messages in thread
From: Andrew Lunn @ 2022-08-18 2:19 UTC (permalink / raw)
To: Feiyang Chen
Cc: peppe.cavallaro, alexandre.torgue, joabreu, Feiyang Chen,
zhangqing, chenhuacai, netdev, loongarch
On Tue, Aug 16, 2022 at 06:25:37PM +0800, Feiyang Chen wrote:
> Current dwmac-loongson only support LS2K in the "probed with PCI and
> configured with DT" manner. We add LS7A support on which the devices
> are fully PCI (non-DT).
Please could you break this patch up into a number of smaller
patches. It is very hard to follow what you are changing here.
Ideally you want lots of small patches, each with a good commit
message, which are obviously correct.
Andrew
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] stmmac: pci: Add LS7A support for dwmac-loongson
2022-08-18 2:15 ` Andrew Lunn
@ 2022-08-18 5:01 ` Feiyang Chen
2022-08-18 14:55 ` Andrew Lunn
0 siblings, 1 reply; 8+ messages in thread
From: Feiyang Chen @ 2022-08-18 5:01 UTC (permalink / raw)
To: Andrew Lunn
Cc: peppe.cavallaro, alexandre.torgue, joabreu, Feiyang Chen,
zhangqing, Huacai Chen, netdev, loongarch
On Thu, 18 Aug 2022 at 10:15, Andrew Lunn <andrew@lunn.ch> wrote:
>
> > +static void loongson_gnet_fix_speed(void *priv, unsigned int speed)
> > +{
> > + struct net_device *ndev = (struct net_device *)(*(unsigned long *)priv);
> > + struct stmmac_priv *ptr = netdev_priv(ndev);
> > +
> > + if (speed == SPEED_1000) {
> > + if (readl(ptr->ioaddr + MAC_CTRL_REG) & (1 << 15) /* PS */) {
> > + /* reset phy */
> > + phy_set_bits(ndev->phydev, 0 /*MII_BMCR*/,
> > + 0x200 /*BMCR_ANRESTART*/);
>
> The MAC driver should not be accessing PHY registers. Why does the PHY
> need a reset? Can you call phy_stop()/phy_start()?
>
Hi, Andrew,
This is a PHY bug, I'll try other methods.
Thanks,
Feiyang
> Andrew
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] stmmac: pci: Add LS7A support for dwmac-loongson
2022-08-18 2:19 ` Andrew Lunn
@ 2022-08-18 5:01 ` Feiyang Chen
2022-11-21 13:03 ` Xi Ruoyao
0 siblings, 1 reply; 8+ messages in thread
From: Feiyang Chen @ 2022-08-18 5:01 UTC (permalink / raw)
To: Andrew Lunn
Cc: peppe.cavallaro, alexandre.torgue, joabreu, Feiyang Chen,
zhangqing, Huacai Chen, netdev, loongarch
On Thu, 18 Aug 2022 at 10:19, Andrew Lunn <andrew@lunn.ch> wrote:
>
> On Tue, Aug 16, 2022 at 06:25:37PM +0800, Feiyang Chen wrote:
> > Current dwmac-loongson only support LS2K in the "probed with PCI and
> > configured with DT" manner. We add LS7A support on which the devices
> > are fully PCI (non-DT).
>
> Please could you break this patch up into a number of smaller
> patches. It is very hard to follow what you are changing here.
>
> Ideally you want lots of small patches, each with a good commit
> message, which are obviously correct.
>
Hi, Andrew,
OK, I will have a try.
Thanks,
Feiyang
> Andrew
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] stmmac: pci: Add LS7A support for dwmac-loongson
2022-08-18 5:01 ` Feiyang Chen
@ 2022-08-18 14:55 ` Andrew Lunn
0 siblings, 0 replies; 8+ messages in thread
From: Andrew Lunn @ 2022-08-18 14:55 UTC (permalink / raw)
To: Feiyang Chen
Cc: peppe.cavallaro, alexandre.torgue, joabreu, Feiyang Chen,
zhangqing, Huacai Chen, netdev, loongarch
On Thu, Aug 18, 2022 at 01:01:09PM +0800, Feiyang Chen wrote:
> On Thu, 18 Aug 2022 at 10:15, Andrew Lunn <andrew@lunn.ch> wrote:
> >
> > > +static void loongson_gnet_fix_speed(void *priv, unsigned int speed)
> > > +{
> > > + struct net_device *ndev = (struct net_device *)(*(unsigned long *)priv);
> > > + struct stmmac_priv *ptr = netdev_priv(ndev);
> > > +
> > > + if (speed == SPEED_1000) {
> > > + if (readl(ptr->ioaddr + MAC_CTRL_REG) & (1 << 15) /* PS */) {
> > > + /* reset phy */
> > > + phy_set_bits(ndev->phydev, 0 /*MII_BMCR*/,
> > > + 0x200 /*BMCR_ANRESTART*/);
> >
> > The MAC driver should not be accessing PHY registers. Why does the PHY
> > need a reset? Can you call phy_stop()/phy_start()?
> >
>
> Hi, Andrew,
>
> This is a PHY bug, I'll try other methods.
Workarounds for PHY bugs should be in the PHY driver.
Maybe you can use the .link_change_notify callback.
Andrew
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] stmmac: pci: Add LS7A support for dwmac-loongson
2022-08-18 5:01 ` Feiyang Chen
@ 2022-11-21 13:03 ` Xi Ruoyao
2022-11-22 1:06 ` Feiyang Chen
0 siblings, 1 reply; 8+ messages in thread
From: Xi Ruoyao @ 2022-11-21 13:03 UTC (permalink / raw)
To: Feiyang Chen, Andrew Lunn
Cc: peppe.cavallaro, alexandre.torgue, joabreu, Feiyang Chen,
zhangqing, Huacai Chen, netdev, loongarch
On Thu, 2022-08-18 at 13:01 +0800, Feiyang Chen wrote:
> On Thu, 18 Aug 2022 at 10:19, Andrew Lunn <andrew@lunn.ch> wrote:
> >
> > On Tue, Aug 16, 2022 at 06:25:37PM +0800, Feiyang Chen wrote:
> > > Current dwmac-loongson only support LS2K in the "probed with PCI
> > > and
> > > configured with DT" manner. We add LS7A support on which the
> > > devices
> > > are fully PCI (non-DT).
> >
> > Please could you break this patch up into a number of smaller
> > patches. It is very hard to follow what you are changing here.
> >
> > Ideally you want lots of small patches, each with a good commit
> > message, which are obviously correct.
> >
>
> Hi, Andrew,
>
> OK, I will have a try.
Any progress on the refactoring? :)
--
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] stmmac: pci: Add LS7A support for dwmac-loongson
2022-11-21 13:03 ` Xi Ruoyao
@ 2022-11-22 1:06 ` Feiyang Chen
0 siblings, 0 replies; 8+ messages in thread
From: Feiyang Chen @ 2022-11-22 1:06 UTC (permalink / raw)
To: Xi Ruoyao
Cc: Andrew Lunn, peppe.cavallaro, alexandre.torgue, joabreu,
Feiyang Chen, zhangqing, Huacai Chen, netdev, loongarch
On Mon, 21 Nov 2022 at 21:03, Xi Ruoyao <xry111@xry111.site> wrote:
>
> On Thu, 2022-08-18 at 13:01 +0800, Feiyang Chen wrote:
> > On Thu, 18 Aug 2022 at 10:19, Andrew Lunn <andrew@lunn.ch> wrote:
> > >
> > > On Tue, Aug 16, 2022 at 06:25:37PM +0800, Feiyang Chen wrote:
> > > > Current dwmac-loongson only support LS2K in the "probed with PCI
> > > > and
> > > > configured with DT" manner. We add LS7A support on which the
> > > > devices
> > > > are fully PCI (non-DT).
> > >
> > > Please could you break this patch up into a number of smaller
> > > patches. It is very hard to follow what you are changing here.
> > >
> > > Ideally you want lots of small patches, each with a good commit
> > > message, which are obviously correct.
> > >
> >
> > Hi, Andrew,
> >
> > OK, I will have a try.
>
> Any progress on the refactoring? :)
>
WIP :)
> --
> Xi Ruoyao <xry111@xry111.site>
> School of Aerospace Science and Technology, Xidian University
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-11-22 1:08 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-08-16 10:25 [PATCH] stmmac: pci: Add LS7A support for dwmac-loongson Feiyang Chen
2022-08-18 2:15 ` Andrew Lunn
2022-08-18 5:01 ` Feiyang Chen
2022-08-18 14:55 ` Andrew Lunn
2022-08-18 2:19 ` Andrew Lunn
2022-08-18 5:01 ` Feiyang Chen
2022-11-21 13:03 ` Xi Ruoyao
2022-11-22 1:06 ` Feiyang Chen
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