* [PATCH mlx5-next 1/3] net/mlx5: Expose eswitch encap mode
2019-06-06 11:06 [PATCH rdma-next 0/3] Expose ENCAP mode to mlx5_ib Leon Romanovsky
@ 2019-06-06 11:06 ` Leon Romanovsky
2019-06-06 11:56 ` Petr Vorel
2019-06-06 13:08 ` Parav Pandit
2019-06-06 11:06 ` [PATCH rdma-next 2/3] RDMA/mlx5: Consider " Leon Romanovsky
2019-06-06 11:06 ` [PATCH rdma-next 3/3] RDMA/mlx5: Enable decap and packet reformat on FDB Leon Romanovsky
2 siblings, 2 replies; 10+ messages in thread
From: Leon Romanovsky @ 2019-06-06 11:06 UTC (permalink / raw)
To: Doug Ledford, Jason Gunthorpe
Cc: Leon Romanovsky, RDMA mailing list, Maor Gottlieb, Mark Bloch,
Saeed Mahameed, linux-netdev
From: Maor Gottlieb <maorg@mellanox.com>
Add API to get the current Eswitch encap mode.
It will be used in downstream patches to check if
flow table can be created with encap support or not.
Signed-off-by: Maor Gottlieb <maorg@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
---
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c | 10 ++++++++++
include/linux/mlx5/eswitch.h | 10 ++++++++++
2 files changed, 20 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
index 9ea0ccfe5ef5..1da7f9569ee8 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
@@ -2452,6 +2452,16 @@ u8 mlx5_eswitch_mode(struct mlx5_eswitch *esw)
}
EXPORT_SYMBOL_GPL(mlx5_eswitch_mode);
+u16 mlx5_eswitch_get_encap_mode(struct mlx5_core_dev *dev)
+{
+ struct mlx5_eswitch *esw;
+
+ esw = dev->priv.eswitch;
+ return ESW_ALLOWED(esw) ? esw->offloads.encap :
+ DEVLINK_ESWITCH_ENCAP_MODE_NONE;
+}
+EXPORT_SYMBOL(mlx5_eswitch_get_encap_mode);
+
bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0, struct mlx5_core_dev *dev1)
{
if ((dev0->priv.eswitch->mode == SRIOV_NONE &&
diff --git a/include/linux/mlx5/eswitch.h b/include/linux/mlx5/eswitch.h
index 0ca77dd1429c..7be43c0fcdc5 100644
--- a/include/linux/mlx5/eswitch.h
+++ b/include/linux/mlx5/eswitch.h
@@ -7,6 +7,7 @@
#define _MLX5_ESWITCH_
#include <linux/mlx5/driver.h>
+#include <net/devlink.h>
#define MLX5_ESWITCH_MANAGER(mdev) MLX5_CAP_GEN(mdev, eswitch_manager)
@@ -60,4 +61,13 @@ u8 mlx5_eswitch_mode(struct mlx5_eswitch *esw);
struct mlx5_flow_handle *
mlx5_eswitch_add_send_to_vport_rule(struct mlx5_eswitch *esw,
int vport, u32 sqn);
+
+#ifdef CONFIG_MLX5_ESWITCH
+u16 mlx5_eswitch_get_encap_mode(struct mlx5_core_dev *dev);
+#else /* CONFIG_MLX5_ESWITCH */
+static inline u16 mlx5_eswitch_get_encap_mode(struct mlx5_core_dev *dev)
+{
+ return DEVLINK_ESWITCH_ENCAP_MODE_NONE;
+}
+#endif /* CONFIG_MLX5_ESWITCH */
#endif
--
2.20.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH mlx5-next 1/3] net/mlx5: Expose eswitch encap mode
2019-06-06 11:06 ` [PATCH mlx5-next 1/3] net/mlx5: Expose eswitch encap mode Leon Romanovsky
@ 2019-06-06 11:56 ` Petr Vorel
2019-06-08 8:25 ` Leon Romanovsky
2019-06-06 13:08 ` Parav Pandit
1 sibling, 1 reply; 10+ messages in thread
From: Petr Vorel @ 2019-06-06 11:56 UTC (permalink / raw)
To: Leon Romanovsky
Cc: Doug Ledford, Jason Gunthorpe, Leon Romanovsky,
RDMA mailing list, Maor Gottlieb, Mark Bloch, Saeed Mahameed,
linux-netdev
Hi,
> From: Maor Gottlieb <maorg@mellanox.com>
> Add API to get the current Eswitch encap mode.
> It will be used in downstream patches to check if
> flow table can be created with encap support or not.
> Signed-off-by: Maor Gottlieb <maorg@mellanox.com>
> Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Reviewed-by: Petr Vorel <pvorel@suse.cz>
Kind regards,
Petr
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH mlx5-next 1/3] net/mlx5: Expose eswitch encap mode
2019-06-06 11:56 ` Petr Vorel
@ 2019-06-08 8:25 ` Leon Romanovsky
0 siblings, 0 replies; 10+ messages in thread
From: Leon Romanovsky @ 2019-06-08 8:25 UTC (permalink / raw)
To: Petr Vorel
Cc: Doug Ledford, Jason Gunthorpe, RDMA mailing list, Maor Gottlieb,
Mark Bloch, Saeed Mahameed, linux-netdev
On Thu, Jun 06, 2019 at 01:56:36PM +0200, Petr Vorel wrote:
> Hi,
>
> > From: Maor Gottlieb <maorg@mellanox.com>
>
> > Add API to get the current Eswitch encap mode.
> > It will be used in downstream patches to check if
> > flow table can be created with encap support or not.
>
> > Signed-off-by: Maor Gottlieb <maorg@mellanox.com>
> > Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
> Reviewed-by: Petr Vorel <pvorel@suse.cz>
Thanks Petr for review, I'll add your tags and resend.
>
> Kind regards,
> Petr
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH mlx5-next 1/3] net/mlx5: Expose eswitch encap mode
2019-06-06 11:06 ` [PATCH mlx5-next 1/3] net/mlx5: Expose eswitch encap mode Leon Romanovsky
2019-06-06 11:56 ` Petr Vorel
@ 2019-06-06 13:08 ` Parav Pandit
2019-06-08 8:25 ` Leon Romanovsky
1 sibling, 1 reply; 10+ messages in thread
From: Parav Pandit @ 2019-06-06 13:08 UTC (permalink / raw)
To: Leon Romanovsky, Doug Ledford, Jason Gunthorpe
Cc: Leon Romanovsky, RDMA mailing list, Maor Gottlieb, Mark Bloch,
Saeed Mahameed, linux-netdev
> -----Original Message-----
> From: linux-rdma-owner@vger.kernel.org <linux-rdma-
> owner@vger.kernel.org> On Behalf Of Leon Romanovsky
> Sent: Thursday, June 6, 2019 4:36 PM
> To: Doug Ledford <dledford@redhat.com>; Jason Gunthorpe
> <jgg@mellanox.com>
> Cc: Leon Romanovsky <leonro@mellanox.com>; RDMA mailing list <linux-
> rdma@vger.kernel.org>; Maor Gottlieb <maorg@mellanox.com>; Mark Bloch
> <markb@mellanox.com>; Saeed Mahameed <saeedm@mellanox.com>;
> linux-netdev <netdev@vger.kernel.org>
> Subject: [PATCH mlx5-next 1/3] net/mlx5: Expose eswitch encap mode
>
> From: Maor Gottlieb <maorg@mellanox.com>
>
> Add API to get the current Eswitch encap mode.
> It will be used in downstream patches to check if flow table can be created
> with encap support or not.
>
> Signed-off-by: Maor Gottlieb <maorg@mellanox.com>
> Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
> ---
> drivers/net/ethernet/mellanox/mlx5/core/eswitch.c | 10 ++++++++++
> include/linux/mlx5/eswitch.h | 10 ++++++++++
> 2 files changed, 20 insertions(+)
>
> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
> b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
> index 9ea0ccfe5ef5..1da7f9569ee8 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
> @@ -2452,6 +2452,16 @@ u8 mlx5_eswitch_mode(struct mlx5_eswitch
> *esw) } EXPORT_SYMBOL_GPL(mlx5_eswitch_mode);
>
> +u16 mlx5_eswitch_get_encap_mode(struct mlx5_core_dev *dev) {
Encap mode as well defined devlink definition.
So instead of u16, it should return enum devlink_eswitch_encap_mode.
Since this is only reading the mode, it is better to define struct mlx5_core_dev* as const struct mlx5_core_dev *.
> + struct mlx5_eswitch *esw;
> +
> + esw = dev->priv.eswitch;
> + return ESW_ALLOWED(esw) ? esw->offloads.encap :
> + DEVLINK_ESWITCH_ENCAP_MODE_NONE;
> +}
> +EXPORT_SYMBOL(mlx5_eswitch_get_encap_mode);
> +
> bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0, struct
> mlx5_core_dev *dev1) {
> if ((dev0->priv.eswitch->mode == SRIOV_NONE && diff --git
> a/include/linux/mlx5/eswitch.h b/include/linux/mlx5/eswitch.h index
> 0ca77dd1429c..7be43c0fcdc5 100644
> --- a/include/linux/mlx5/eswitch.h
> +++ b/include/linux/mlx5/eswitch.h
> @@ -7,6 +7,7 @@
> #define _MLX5_ESWITCH_
>
> #include <linux/mlx5/driver.h>
> +#include <net/devlink.h>
>
> #define MLX5_ESWITCH_MANAGER(mdev) MLX5_CAP_GEN(mdev,
> eswitch_manager)
>
> @@ -60,4 +61,13 @@ u8 mlx5_eswitch_mode(struct mlx5_eswitch *esw);
> struct mlx5_flow_handle * mlx5_eswitch_add_send_to_vport_rule(struct
> mlx5_eswitch *esw,
> int vport, u32 sqn);
> +
> +#ifdef CONFIG_MLX5_ESWITCH
> +u16 mlx5_eswitch_get_encap_mode(struct mlx5_core_dev *dev); #else /*
> +CONFIG_MLX5_ESWITCH */ static inline u16
> +mlx5_eswitch_get_encap_mode(struct mlx5_core_dev *dev) {
> + return DEVLINK_ESWITCH_ENCAP_MODE_NONE; } #endif /*
> +CONFIG_MLX5_ESWITCH */
> #endif
> --
> 2.20.1
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH mlx5-next 1/3] net/mlx5: Expose eswitch encap mode
2019-06-06 13:08 ` Parav Pandit
@ 2019-06-08 8:25 ` Leon Romanovsky
0 siblings, 0 replies; 10+ messages in thread
From: Leon Romanovsky @ 2019-06-08 8:25 UTC (permalink / raw)
To: Parav Pandit
Cc: Doug Ledford, Jason Gunthorpe, RDMA mailing list, Maor Gottlieb,
Mark Bloch, Saeed Mahameed, linux-netdev
On Thu, Jun 06, 2019 at 01:08:46PM +0000, Parav Pandit wrote:
>
>
> > -----Original Message-----
> > From: linux-rdma-owner@vger.kernel.org <linux-rdma-
> > owner@vger.kernel.org> On Behalf Of Leon Romanovsky
> > Sent: Thursday, June 6, 2019 4:36 PM
> > To: Doug Ledford <dledford@redhat.com>; Jason Gunthorpe
> > <jgg@mellanox.com>
> > Cc: Leon Romanovsky <leonro@mellanox.com>; RDMA mailing list <linux-
> > rdma@vger.kernel.org>; Maor Gottlieb <maorg@mellanox.com>; Mark Bloch
> > <markb@mellanox.com>; Saeed Mahameed <saeedm@mellanox.com>;
> > linux-netdev <netdev@vger.kernel.org>
> > Subject: [PATCH mlx5-next 1/3] net/mlx5: Expose eswitch encap mode
> >
> > From: Maor Gottlieb <maorg@mellanox.com>
> >
> > Add API to get the current Eswitch encap mode.
> > It will be used in downstream patches to check if flow table can be created
> > with encap support or not.
> >
> > Signed-off-by: Maor Gottlieb <maorg@mellanox.com>
> > Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
> > ---
> > drivers/net/ethernet/mellanox/mlx5/core/eswitch.c | 10 ++++++++++
> > include/linux/mlx5/eswitch.h | 10 ++++++++++
> > 2 files changed, 20 insertions(+)
> >
> > diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
> > b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
> > index 9ea0ccfe5ef5..1da7f9569ee8 100644
> > --- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
> > +++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
> > @@ -2452,6 +2452,16 @@ u8 mlx5_eswitch_mode(struct mlx5_eswitch
> > *esw) } EXPORT_SYMBOL_GPL(mlx5_eswitch_mode);
> >
> > +u16 mlx5_eswitch_get_encap_mode(struct mlx5_core_dev *dev) {
>
> Encap mode as well defined devlink definition.
> So instead of u16, it should return enum devlink_eswitch_encap_mode.
>
> Since this is only reading the mode, it is better to define struct mlx5_core_dev* as const struct mlx5_core_dev *.
Thanks Parav, I'll change and resend, anyway second patch uses wrong types too.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH rdma-next 2/3] RDMA/mlx5: Consider eswitch encap mode
2019-06-06 11:06 [PATCH rdma-next 0/3] Expose ENCAP mode to mlx5_ib Leon Romanovsky
2019-06-06 11:06 ` [PATCH mlx5-next 1/3] net/mlx5: Expose eswitch encap mode Leon Romanovsky
@ 2019-06-06 11:06 ` Leon Romanovsky
2019-06-06 11:56 ` Petr Vorel
2019-06-06 11:06 ` [PATCH rdma-next 3/3] RDMA/mlx5: Enable decap and packet reformat on FDB Leon Romanovsky
2 siblings, 1 reply; 10+ messages in thread
From: Leon Romanovsky @ 2019-06-06 11:06 UTC (permalink / raw)
To: Doug Ledford, Jason Gunthorpe
Cc: Leon Romanovsky, RDMA mailing list, Maor Gottlieb, Mark Bloch,
Saeed Mahameed, linux-netdev
From: Maor Gottlieb <maorg@mellanox.com>
When flow steering is created, then the encap support should
consider the eswitch encap mode. If the eswitch flow table (FDB)
supports encap then it shouldn't be supported on NIC RX flow tables.
Fixes: 4adda1122c490 ('RDMA/mlx5: Enable decap and packet reformat on flow tables')
Signed-off-by: Maor Gottlieb <maorg@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
---
drivers/infiniband/hw/mlx5/main.c | 20 ++++++++++++++------
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c
index 5fd5db2b397f..70d565283508 100644
--- a/drivers/infiniband/hw/mlx5/main.c
+++ b/drivers/infiniband/hw/mlx5/main.c
@@ -52,6 +52,7 @@
#include <linux/mlx5/port.h>
#include <linux/mlx5/vport.h>
#include <linux/mlx5/fs.h>
+#include <linux/mlx5/eswitch.h>
#include <linux/list.h>
#include <rdma/ib_smi.h>
#include <rdma/ib_umem.h>
@@ -3247,9 +3248,12 @@ static struct mlx5_ib_flow_prio *get_flow_table(struct mlx5_ib_dev *dev,
int num_groups;
u32 flags = 0;
int priority;
+ u8 esw_encap;
max_table_size = BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev,
log_max_ft_size));
+ esw_encap = mlx5_eswitch_get_encap_mode(dev->mdev) !=
+ DEVLINK_ESWITCH_ENCAP_MODE_NONE;
if (flow_attr->type == IB_FLOW_ATTR_NORMAL) {
enum mlx5_flow_namespace_type fn_type;
@@ -3262,10 +3266,10 @@ static struct mlx5_ib_flow_prio *get_flow_table(struct mlx5_ib_dev *dev,
if (ft_type == MLX5_IB_FT_RX) {
fn_type = MLX5_FLOW_NAMESPACE_BYPASS;
prio = &dev->flow_db->prios[priority];
- if (!dev->is_rep &&
+ if (!dev->is_rep && !esw_encap &&
MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev, decap))
flags |= MLX5_FLOW_TABLE_TUNNEL_EN_DECAP;
- if (!dev->is_rep &&
+ if (!dev->is_rep && !esw_encap &&
MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev,
reformat_l3_tunnel_to_l2))
flags |= MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT;
@@ -3275,7 +3279,7 @@ static struct mlx5_ib_flow_prio *get_flow_table(struct mlx5_ib_dev *dev,
log_max_ft_size));
fn_type = MLX5_FLOW_NAMESPACE_EGRESS;
prio = &dev->flow_db->egress_prios[priority];
- if (!dev->is_rep &&
+ if (!dev->is_rep && !esw_encap &&
MLX5_CAP_FLOWTABLE_NIC_TX(dev->mdev, reformat))
flags |= MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT;
}
@@ -3887,24 +3891,28 @@ _get_flow_table(struct mlx5_ib_dev *dev,
int max_table_size = 0;
u32 flags = 0;
int priority;
+ u8 esw_encap;
if (mcast)
priority = MLX5_IB_FLOW_MCAST_PRIO;
else
priority = ib_prio_to_core_prio(fs_matcher->priority, false);
+ esw_encap = mlx5_eswitch_get_encap_mode(dev->mdev) !=
+ DEVLINK_ESWITCH_ENCAP_MODE_NONE;
if (fs_matcher->ns_type == MLX5_FLOW_NAMESPACE_BYPASS) {
max_table_size = BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev,
log_max_ft_size));
- if (MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev, decap))
+ if (MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev, decap) && !esw_encap)
flags |= MLX5_FLOW_TABLE_TUNNEL_EN_DECAP;
if (MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev,
- reformat_l3_tunnel_to_l2))
+ reformat_l3_tunnel_to_l2) &&
+ !esw_encap)
flags |= MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT;
} else if (fs_matcher->ns_type == MLX5_FLOW_NAMESPACE_EGRESS) {
max_table_size = BIT(
MLX5_CAP_FLOWTABLE_NIC_TX(dev->mdev, log_max_ft_size));
- if (MLX5_CAP_FLOWTABLE_NIC_TX(dev->mdev, reformat))
+ if (MLX5_CAP_FLOWTABLE_NIC_TX(dev->mdev, reformat) && !esw_encap)
flags |= MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT;
} else if (fs_matcher->ns_type == MLX5_FLOW_NAMESPACE_FDB) {
max_table_size = BIT(
--
2.20.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH rdma-next 2/3] RDMA/mlx5: Consider eswitch encap mode
2019-06-06 11:06 ` [PATCH rdma-next 2/3] RDMA/mlx5: Consider " Leon Romanovsky
@ 2019-06-06 11:56 ` Petr Vorel
0 siblings, 0 replies; 10+ messages in thread
From: Petr Vorel @ 2019-06-06 11:56 UTC (permalink / raw)
To: Leon Romanovsky
Cc: Doug Ledford, Jason Gunthorpe, Leon Romanovsky,
RDMA mailing list, Maor Gottlieb, Mark Bloch, Saeed Mahameed,
linux-netdev
Hi,
> From: Maor Gottlieb <maorg@mellanox.com>
> When flow steering is created, then the encap support should
> consider the eswitch encap mode. If the eswitch flow table (FDB)
> supports encap then it shouldn't be supported on NIC RX flow tables.
> Fixes: 4adda1122c490 ('RDMA/mlx5: Enable decap and packet reformat on flow tables')
> Signed-off-by: Maor Gottlieb <maorg@mellanox.com>
> Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Reviewed-by: Petr Vorel <pvorel@suse.cz>
Kind regards,
Petr
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH rdma-next 3/3] RDMA/mlx5: Enable decap and packet reformat on FDB
2019-06-06 11:06 [PATCH rdma-next 0/3] Expose ENCAP mode to mlx5_ib Leon Romanovsky
2019-06-06 11:06 ` [PATCH mlx5-next 1/3] net/mlx5: Expose eswitch encap mode Leon Romanovsky
2019-06-06 11:06 ` [PATCH rdma-next 2/3] RDMA/mlx5: Consider " Leon Romanovsky
@ 2019-06-06 11:06 ` Leon Romanovsky
2019-06-06 11:57 ` Petr Vorel
2 siblings, 1 reply; 10+ messages in thread
From: Leon Romanovsky @ 2019-06-06 11:06 UTC (permalink / raw)
To: Doug Ledford, Jason Gunthorpe
Cc: Leon Romanovsky, RDMA mailing list, Maor Gottlieb, Mark Bloch,
Saeed Mahameed, linux-netdev
From: Maor Gottlieb <maorg@mellanox.com>
If FDB flow tables support decap operation, enable it on creation,
This allows to perform decapsulation of tunnelled packets by steering
rules. If FDB flow tables support reformat operation, enable it on
creation as well.
Signed-off-by: Maor Gottlieb <maorg@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
---
drivers/infiniband/hw/mlx5/main.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c
index 70d565283508..cd0c005d1120 100644
--- a/drivers/infiniband/hw/mlx5/main.c
+++ b/drivers/infiniband/hw/mlx5/main.c
@@ -3917,6 +3917,11 @@ _get_flow_table(struct mlx5_ib_dev *dev,
} else if (fs_matcher->ns_type == MLX5_FLOW_NAMESPACE_FDB) {
max_table_size = BIT(
MLX5_CAP_ESW_FLOWTABLE_FDB(dev->mdev, log_max_ft_size));
+ if (MLX5_CAP_ESW_FLOWTABLE_FDB(dev->mdev, decap) && esw_encap)
+ flags |= MLX5_FLOW_TABLE_TUNNEL_EN_DECAP;
+ if (MLX5_CAP_ESW_FLOWTABLE_FDB(dev->mdev, reformat_l3_tunnel_to_l2) &&
+ esw_encap)
+ flags |= MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT;
priority = FDB_BYPASS_PATH;
}
--
2.20.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH rdma-next 3/3] RDMA/mlx5: Enable decap and packet reformat on FDB
2019-06-06 11:06 ` [PATCH rdma-next 3/3] RDMA/mlx5: Enable decap and packet reformat on FDB Leon Romanovsky
@ 2019-06-06 11:57 ` Petr Vorel
0 siblings, 0 replies; 10+ messages in thread
From: Petr Vorel @ 2019-06-06 11:57 UTC (permalink / raw)
To: Leon Romanovsky
Cc: Doug Ledford, Jason Gunthorpe, Leon Romanovsky,
RDMA mailing list, Maor Gottlieb, Mark Bloch, Saeed Mahameed,
linux-netdev
Hi,
> From: Maor Gottlieb <maorg@mellanox.com>
> If FDB flow tables support decap operation, enable it on creation,
> This allows to perform decapsulation of tunnelled packets by steering
> rules. If FDB flow tables support reformat operation, enable it on
> creation as well.
> Signed-off-by: Maor Gottlieb <maorg@mellanox.com>
> Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Reviewed-by: Petr Vorel <pvorel@suse.cz>
Kind regards,
Petr
^ permalink raw reply [flat|nested] 10+ messages in thread