Re: [PATCH net v2 1/4] net: ethernet: fec: move GPR register offset and bit into DT

[Sascha Hauer <s.hauer@pengutronix.de>]

On Mon, May 25, 2020 at 03:09:26PM +0800, fugang.duan@nxp.com wrote:
> From: Fugang Duan <fugang.duan@nxp.com>
> 
> The commit da722186f654 (net: fec: set GPR bit on suspend by DT
> configuration) set the GPR reigster offset and bit in driver for
> wake on lan feature.
> 
> But it introduces two issues here:
> - one SOC has two instances, they have different bit
> - different SOCs may have different offset and bit
> 
> So to support wake-on-lan feature on other i.MX platforms, it should
> configure the GPR reigster offset and bit from DT.
> 
> So the patch is to improve the commit da722186f654 (net: fec: set GPR
> bit on suspend by DT configuration) to support multiple ethernet
> instances on i.MX series.
> 
> v2:
>  * switch back to store the quirks bitmask in driver_data
> 
> Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
> ---
>  drivers/net/ethernet/freescale/fec_main.c | 103 ++++++++++--------------------
>  1 file changed, 34 insertions(+), 69 deletions(-)
> 
> diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c
> index 2e20914..4f55d30 100644
> --- a/drivers/net/ethernet/freescale/fec_main.c
> +++ b/drivers/net/ethernet/freescale/fec_main.c
> @@ -86,56 +86,6 @@ static void fec_enet_itr_coal_init(struct net_device *ndev);
>  #define FEC_ENET_OPD_V	0xFFF0
>  #define FEC_MDIO_PM_TIMEOUT  100 /* ms */
>  
> -struct fec_devinfo {
> -	u32 quirks;
> -	u8 stop_gpr_reg;
> -	u8 stop_gpr_bit;
> -};

Honestly I like the approach of having a struct fec_devinfo for
abstracting differences between different hardware variants. It gives
you more freedom to describe the differences. Converting this back to a
single bitfield is a step backward, even when currently struct
fec_devinfo only contains a single value.

Sascha

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