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From: "Marek Behún" <kabel@kernel.org>
To: Pavana Sharma <pavana.sharma@digi.com>
Cc: kuba@kernel.org, andrew@lunn.ch, ashkan.boldaji@digi.com,
	davem@davemloft.net, f.fainelli@gmail.com, lkp@intel.com,
	netdev@vger.kernel.org, vivien.didelot@gmail.com,
	"Marek Behún" <kabel@kernel.org>
Subject: patch fixing mv88e6393x SERDES IRQ for Pavana's series
Date: Tue,  5 Jan 2021 13:37:55 +0100	[thread overview]
Message-ID: <20210105123755.30552-1-kabel@kernel.org> (raw)
In-Reply-To: <2c2bb4b92484ce21c0cf43076d6c7921bae7456a.1607685097.git.pavana.sharma@digi.com>

Pavana, please add this changes to your patch
  net: dsa: mv88e6xxx: Add support for mv88e6393x  family of Marvell

It fixes SERDES IRQ enablement and status reading for 10G on 6393x.

Also, there is a double space in your commit title (between words
"mv88e6393x" and "family"), please fix this.

You can add my Co-developed-by tag, if you want.

Co-developed-by: Marek Behún <kabel@kernel.org>
---
 drivers/net/dsa/mv88e6xxx/chip.c   |   2 +-
 drivers/net/dsa/mv88e6xxx/serdes.c | 100 +++++++++++++++++++++++++++--
 drivers/net/dsa/mv88e6xxx/serdes.h |   5 ++
 3 files changed, 102 insertions(+), 5 deletions(-)

diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index fd6e4106f98e..ab929d9d93f3 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -4001,7 +4001,7 @@ static const struct mv88e6xxx_ops mv88e6393x_ops = {
 	.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
 	.serdes_power = mv88e6393x_serdes_power,
 	.serdes_get_lane = mv88e6393x_serdes_get_lane,
-	.serdes_pcs_get_state = mv88e6390_serdes_pcs_get_state,
+	.serdes_pcs_get_state = mv88e6393x_serdes_pcs_get_state,
 	.serdes_irq_mapping = mv88e6390_serdes_irq_mapping,
 	.serdes_irq_enable = mv88e6393x_serdes_irq_enable,
 	.serdes_irq_status = mv88e6393x_serdes_irq_status,
diff --git a/drivers/net/dsa/mv88e6xxx/serdes.c b/drivers/net/dsa/mv88e6xxx/serdes.c
index 622fe6df2ff9..ae21d1dea9ba 100644
--- a/drivers/net/dsa/mv88e6xxx/serdes.c
+++ b/drivers/net/dsa/mv88e6xxx/serdes.c
@@ -923,6 +923,30 @@ static int mv88e6390_serdes_pcs_get_state_10g(struct mv88e6xxx_chip *chip,
 	return 0;
 }
 
+static int mv88e6393x_serdes_pcs_get_state_10g(struct mv88e6xxx_chip *chip,
+					       int port, int lane,
+					       struct phylink_link_state *state)
+{
+	u16 status;
+	int err;
+
+	err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
+				    MV88E6390_10G_STAT1, &status);
+	if (err)
+		return err;
+
+	state->link = !!(status & MDIO_STAT1_LSTATUS);
+	if (state->link) {
+		if (state->interface == PHY_INTERFACE_MODE_5GBASER)
+			state->speed = SPEED_5000;
+		else
+			state->speed = SPEED_10000;
+		state->duplex = DUPLEX_FULL;
+	}
+
+	return 0;
+}
+
 int mv88e6390_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
 				   int lane, struct phylink_link_state *state)
 {
@@ -942,6 +966,25 @@ int mv88e6390_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
 	}
 }
 
+int mv88e6393x_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
+				    int lane, struct phylink_link_state *state)
+{
+	switch (state->interface) {
+	case PHY_INTERFACE_MODE_SGMII:
+	case PHY_INTERFACE_MODE_1000BASEX:
+	case PHY_INTERFACE_MODE_2500BASEX:
+		return mv88e6390_serdes_pcs_get_state_sgmii(chip, port, lane,
+							    state);
+	case PHY_INTERFACE_MODE_5GBASER:
+	case PHY_INTERFACE_MODE_10GBASER:
+		return mv88e6393x_serdes_pcs_get_state_10g(chip, port, lane,
+							   state);
+
+	default:
+		return -EOPNOTSUPP;
+	}
+}
+
 int mv88e6390_serdes_pcs_an_restart(struct mv88e6xxx_chip *chip, int port,
 				    int lane)
 {
@@ -1009,6 +1052,23 @@ static void mv88e6390_serdes_irq_link_sgmii(struct mv88e6xxx_chip *chip,
 	dsa_port_phylink_mac_change(chip->ds, port, !!(bmsr & BMSR_LSTATUS));
 }
 
+static void mv88e6393x_serdes_irq_link_10g(struct mv88e6xxx_chip *chip,
+					   int port, u8 lane)
+{
+	u16 status;
+	int err;
+
+	/* If the link has dropped, we want to know about it. */
+	err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
+				    MV88E6390_10G_STAT1, &status);
+	if (err) {
+		dev_err(chip->dev, "can't read Serdes STAT1: %d\n", err);
+		return;
+	}
+
+	dsa_port_phylink_mac_change(chip->ds, port, !!(status & MDIO_STAT1_LSTATUS));
+}
+
 static int mv88e6390_serdes_irq_enable_sgmii(struct mv88e6xxx_chip *chip,
 					     int lane, bool enable)
 {
@@ -1048,21 +1108,44 @@ static int mv88e6390_serdes_irq_status_sgmii(struct mv88e6xxx_chip *chip,
 	return err;
 }
 
+static int mv88e6393x_serdes_irq_enable_10g(struct mv88e6xxx_chip *chip,
+					    u8 lane, bool enable)
+{
+	u16 val = 0;
+
+	if (enable)
+		val |= MV88E6393X_10G_INT_LINK_CHANGE;
+
+	return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
+				      MV88E6393X_10G_INT_ENABLE, val);
+}
+
 int mv88e6393x_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port,
 				int lane, bool enable)
 {
 	u8 cmode = chip->ports[port].cmode;
-	int err = 0;
 
 	switch (cmode) {
 	case MV88E6XXX_PORT_STS_CMODE_SGMII:
 	case MV88E6XXX_PORT_STS_CMODE_1000BASEX:
 	case MV88E6XXX_PORT_STS_CMODE_2500BASEX:
+		return mv88e6390_serdes_irq_enable_sgmii(chip, lane, enable);
 	case MV88E6XXX_PORT_STS_CMODE_5GBASER:
 	case MV88E6XXX_PORT_STS_CMODE_10GBASER:
-		err = mv88e6390_serdes_irq_enable_sgmii(chip, lane, enable);
+		return mv88e6393x_serdes_irq_enable_10g(chip, lane, enable);
 	}
 
+	return 0;
+}
+
+static int mv88e6393x_serdes_irq_status_10g(struct mv88e6xxx_chip *chip,
+					    u8 lane, u16 *status)
+{
+	int err;
+
+	err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
+				    MV88E6393X_10G_INT_STATUS, status);
+
 	return err;
 }
 
@@ -1078,8 +1161,6 @@ irqreturn_t mv88e6393x_serdes_irq_status(struct mv88e6xxx_chip *chip, int port,
 	case MV88E6XXX_PORT_STS_CMODE_SGMII:
 	case MV88E6XXX_PORT_STS_CMODE_1000BASEX:
 	case MV88E6XXX_PORT_STS_CMODE_2500BASEX:
-	case MV88E6XXX_PORT_STS_CMODE_5GBASER:
-	case MV88E6XXX_PORT_STS_CMODE_10GBASER:
 		err = mv88e6390_serdes_irq_status_sgmii(chip, lane, &status);
 		if (err)
 			return ret;
@@ -1088,6 +1169,17 @@ irqreturn_t mv88e6393x_serdes_irq_status(struct mv88e6xxx_chip *chip, int port,
 			ret = IRQ_HANDLED;
 			mv88e6390_serdes_irq_link_sgmii(chip, port, lane);
 		}
+		break;
+	case MV88E6XXX_PORT_STS_CMODE_5GBASER:
+	case MV88E6XXX_PORT_STS_CMODE_10GBASER:
+		err = mv88e6393x_serdes_irq_status_10g(chip, lane, &status);
+		if (err)
+			return err;
+		if (status & MV88E6393X_10G_INT_LINK_CHANGE) {
+			ret = IRQ_HANDLED;
+			mv88e6393x_serdes_irq_link_10g(chip, port, lane);
+		}
+		break;
 	}
 
 	return ret;
diff --git a/drivers/net/dsa/mv88e6xxx/serdes.h b/drivers/net/dsa/mv88e6xxx/serdes.h
index f17ddbb70127..4015db6287ca 100644
--- a/drivers/net/dsa/mv88e6xxx/serdes.h
+++ b/drivers/net/dsa/mv88e6xxx/serdes.h
@@ -42,6 +42,9 @@
 /* 10GBASE-R and 10GBASE-X4/X2 */
 #define MV88E6390_10G_CTRL1		(0x1000 + MDIO_CTRL1)
 #define MV88E6390_10G_STAT1		(0x1000 + MDIO_STAT1)
+#define MV88E6393X_10G_INT_ENABLE	0x9000
+#define MV88E6393X_10G_INT_LINK_CHANGE	BIT(2)
+#define MV88E6393X_10G_INT_STATUS	0x9001
 
 /* 1000BASE-X and SGMII */
 #define MV88E6390_SGMII_BMCR		(0x2000 + MII_BMCR)
@@ -124,6 +127,8 @@ int mv88e6352_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
 				   int lane, struct phylink_link_state *state);
 int mv88e6390_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
 				   int lane, struct phylink_link_state *state);
+int mv88e6393x_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
+				    int lane, struct phylink_link_state *state);
 int mv88e6352_serdes_pcs_an_restart(struct mv88e6xxx_chip *chip, int port,
 				    int lane);
 int mv88e6390_serdes_pcs_an_restart(struct mv88e6xxx_chip *chip, int port,
-- 
2.26.2


  parent reply	other threads:[~2021-01-05 12:39 UTC|newest]

Thread overview: 101+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <djc@djc.id.au; danc86@gmail.com[PATCH v2] Add support for mv88e6393x family of Marvell.>
2020-10-16  2:09 ` [PATCH v3] Add support for mv88e6393x family of Marvell Pavana Sharma
2020-10-16  2:37   ` Florian Fainelli
2020-10-17 19:30   ` Andrew Lunn
2020-10-26  5:52     ` [PATCH v4 0/3] " Pavana Sharma
2020-10-26  5:54       ` [PATCH v4 1/3] " Pavana Sharma
2020-10-26  8:58         ` kernel test robot
2020-10-27 19:10         ` kernel test robot
2020-10-26  5:58       ` [PATCH v4 2/3] Add phy interface for 5GBASER mode Pavana Sharma
2020-10-26 13:38         ` Andrew Lunn
2020-10-26 13:42         ` Florian Fainelli
2020-10-26  5:58       ` [PATCH v4 3/3] Change serdes lane parameter from u8 type to int Pavana Sharma
2020-10-26 13:43       ` [PATCH v4 0/3] Add support for mv88e6393x family of Marvell Florian Fainelli
2020-10-28  0:07         ` [PATCH v5 " Pavana Sharma
2020-10-28  0:08           ` [PATCH v5 1/3] net: phy: Add 5GBASER interface mode Pavana Sharma
2020-10-28 12:03             ` Andrew Lunn
2020-10-28  0:09           ` [PATCH v5 2/3] dt-bindings: net: Add 5GBASER phy " Pavana Sharma
2020-10-28 12:03             ` Andrew Lunn
2020-10-28  0:09           ` [PATCH v5 3/3] net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell Pavana Sharma
2020-10-28  2:03             ` Marek Behun
2020-10-28 12:21             ` Andrew Lunn
2020-10-29  5:40               ` [PATCH v6 0/4] " Pavana Sharma
2020-10-29  5:41                 ` [PATCH v6 1/4] dt-bindings: net: Add 5GBASER phy interface mode Pavana Sharma
2020-10-29  5:42                 ` [PATCH v6 2/4] net: phy: Add 5GBASER " Pavana Sharma
2020-10-29  6:11                   ` Marek Behun
2020-10-29 12:42                   ` Andrew Lunn
2020-10-29  5:42                 ` [PATCH v6 3/4] net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell Pavana Sharma
2020-10-29  6:31                   ` Marek Behun
2020-11-02  6:40                     ` [PATCH v7 0/4] " Pavana Sharma
2020-11-02  6:41                       ` [PATCH v7 1/4] dt-bindings: net: Add 5GBASER phy interface mode Pavana Sharma
2020-11-02  6:42                       ` [PATCH v7 2/4] net: phy: Add 5GBASER " Pavana Sharma
2020-11-02 13:09                         ` Andrew Lunn
2020-11-03  1:34                           ` Pavana Sharma
2020-11-03  2:12                             ` Florian Fainelli
2020-11-03  3:16                               ` Andrew Lunn
2020-11-03  8:48                                 ` [PATCH v8 0/4] Add support for mv88e6393x family of Marvell Pavana Sharma
2020-11-03  8:49                                   ` [PATCH v8 1/4] dt-bindings: net: Add 5GBASER phy interface mode Pavana Sharma
2020-11-06  1:42                                     ` Jakub Kicinski
2020-11-03  8:49                                   ` [PATCH v8 2/4] net: phy: Add 5GBASER " Pavana Sharma
2020-11-03  8:50                                   ` [PATCH v8 3/4] net: dsa: mv88e6xxx: Change serdes lane parameter from u8 type to int Pavana Sharma
2020-11-06  1:40                                     ` Jakub Kicinski
2020-11-03  8:50                                   ` [PATCH v8 4/4] net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell Pavana Sharma
2020-11-06  1:52                                     ` Jakub Kicinski
2020-11-19  8:01                                       ` [PATCH v9 0/4] " Pavana Sharma
2020-11-19  8:02                                         ` [PATCH v9 1/4] dt-bindings: net: Add 5GBASER phy interface mode Pavana Sharma
2020-11-19  8:03                                         ` [PATCH v9 2/4] net: phy: Add 5GBASER " Pavana Sharma
2020-11-19  8:03                                         ` [PATCH v9 3/4] net: dsa: mv88e6xxx: Change serdes lane parameter from u8 type to int Pavana Sharma
2020-11-19  8:04                                         ` [PATCH v9 4/4] net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell Pavana Sharma
2020-11-19 15:33                                           ` kernel test robot
2020-11-19 19:12                                           ` kernel test robot
2020-11-20  0:24                                             ` [PATCH v10 0/4] " Pavana Sharma
2020-11-20  0:25                                               ` [PATCH v10 1/4] dt-bindings: net: Add 5GBASER phy interface mode Pavana Sharma
2020-11-20  0:52                                                 ` Andrew Lunn
2020-11-20  0:25                                               ` [PATCH v10 2/4] net: phy: Add 5GBASER " Pavana Sharma
2020-11-20  0:55                                                 ` Andrew Lunn
2020-11-20  0:26                                               ` [PATCH v10 3/4] net: dsa: mv88e6xxx: Change serdes lane parameter from u8 type to int Pavana Sharma
2020-11-20  0:59                                                 ` Andrew Lunn
2020-11-20  0:26                                               ` [PATCH v10 4/4] net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell Pavana Sharma
2020-11-20  1:29                                                 ` Andrew Lunn
2020-11-20  1:43                                                   ` Marek Behun
2020-11-20  1:54                                                     ` Andrew Lunn
2020-12-09  5:02                                                       ` [PATCH v11 0/4] " Pavana Sharma
2020-12-09  5:03                                                         ` [PATCH v11 1/4] dt-bindings: net: Add 5GBASER phy interface mode Pavana Sharma
2020-12-09 23:15                                                           ` Andrew Lunn
2020-12-10 13:43                                                             ` Pavana Sharma
2020-12-09  5:04                                                         ` [PATCH v11 2/4] net: phy: Add 5GBASER " Pavana Sharma
2020-12-09 23:18                                                           ` Andrew Lunn
2020-12-09  5:05                                                         ` [PATCH v11 3/4] net: dsa: mv88e6xxx: Change serdes lane parameter type from u8 type to int Pavana Sharma
2020-12-09 23:24                                                           ` Andrew Lunn
2020-12-09  5:05                                                         ` [PATCH v11 4/4] net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell Pavana Sharma
2020-12-09 23:40                                                           ` Andrew Lunn
2020-12-09 19:37                                                         ` [PATCH v11 0/4] " Jakub Kicinski
2020-12-11 12:44                                                           ` [net-next PATCH v12 " Pavana Sharma
2020-12-11 12:46                                                             ` [net-next PATCH v12 1/4] dt-bindings: net: Add 5GBASER phy interface mode Pavana Sharma
2020-12-14 22:56                                                               ` Rob Herring
2020-12-11 12:46                                                             ` [net-next PATCH v12 2/4] net: phy: Add 5GBASER " Pavana Sharma
2020-12-11 12:49                                                             ` [net-next PATCH v12 3/4] net: dsa: mv88e6xxx: Change serdes lane parameter type from u8 type to int Pavana Sharma
2020-12-11 12:51                                                             ` [net-next PATCH v12 4/4] net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell Pavana Sharma
2021-01-05 12:15                                                               ` Marek Behún
2021-01-06  0:45                                                                 ` Pavana Sharma
2021-01-06 12:20                                                                   ` Marek Behún
2021-01-05 12:37                                                               ` Marek Behún [this message]
2021-01-08  9:47                                                                 ` [net-next PATCH v13 0/4] " Pavana Sharma
2021-01-08  9:48                                                                   ` [net-next PATCH v13 1/4] dt-bindings: net: Add 5GBASER phy interface Pavana Sharma
2021-01-08 13:49                                                                     ` Andrew Lunn
2021-01-08  9:49                                                                   ` [net-next PATCH v13 2/4] net: phy: Add 5GBASER interface mode Pavana Sharma
2021-01-08 13:50                                                                     ` Andrew Lunn
2021-01-08  9:50                                                                   ` [net-next PATCH v13 3/4] net: dsa: mv88e6xxx: Change serdes lane parameter type from u8 type to int Pavana Sharma
2021-01-08  9:50                                                                   ` [net-next PATCH v13 4/4] net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell Pavana Sharma
2021-01-08 13:51                                                                     ` Marek Behún
2021-01-08 14:02                                                                     ` Marek Behún
2021-01-08 14:36                                                                     ` [PATCH] changes for Pavana Marek Behún
2021-01-09 21:31                                                                       ` Marek Behún
2020-11-02  6:43                       ` [PATCH v7 3/4] net: dsa: mv88e6xxx: Change serdes lane parameter from u8 type to int Pavana Sharma
2020-11-02 13:34                         ` Andrew Lunn
2020-11-02 13:40                         ` Andrew Lunn
2020-11-02  6:43                       ` [PATCH v7 4/4] net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell Pavana Sharma
2020-11-02 13:12                       ` [PATCH v7 0/4] " Andrew Lunn
2020-10-29  5:43                 ` [PATCH v6 4/4] net: dsa: mv88e6xxx: Change serdes lane parameter from u8 to int Pavana Sharma
2020-10-29  6:07                 ` [PATCH v6 0/4] Add support for mv88e6393x family of Marvell Marek Behun
2020-10-28 23:12             ` [PATCH v5 3/3] net: dsa: mv88e6xxx: " Jakub Kicinski
2020-10-29  4:25             ` kernel test robot

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