[PATCH devicetree] arm64: dts: ls1028a: set up the real link speed for ENETC port 2

[PATCH devicetree] arm64: dts: ls1028a: set up the real link speed for ENETC port 2

[Vladimir Oltean]

From: Vladimir Oltean <vladimir.oltean@nxp.com>

In NXP LS1028A there is a MAC-to-MAC internal link between enetc_port2
and mscc_felix_port4. This link operates at 2.5Gbps and is described as
such for the mscc_felix_port4 node.

The reason for the discrepancy is a limitation in the PHY library
support for fixed-link nodes. Due to the fact that the PHY library
registers a software PHY which emulates the clause 22 register map, the
drivers/net/phy/fixed_phy.c driver only supports speeds up to 1Gbps.

The mscc_felix_port4 node is probed by DSA, which does not use the PHY
library directly, but phylink, and phylink has a different representation
for fixed-link nodes, one that does not have the limitation of not being
able to represent speeds > 1Gbps.

Since the enetc driver was converted to phylink too as of commit
71b77a7a27a3 ("enetc: Migrate to PHYLINK and PCS_LYNX"), the limitation
has been practically lifted there too, and we can describe the real link
speed in the device tree now.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 262fbad8f0ec..bf60f3858b0f 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -1027,7 +1027,7 @@ enetc_port2: ethernet@0,2 {
 				status = "disabled";
 
 				fixed-link {
-					speed = <1000>;
+					speed = <2500>;
 					full-duplex;
 				};
 			};
-- 
2.25.1

Re: [PATCH devicetree] arm64: dts: ls1028a: set up the real link speed for ENETC port 2

[Shawn Guo]

On Mon, Mar 08, 2021 at 03:08:34PM +0200, Vladimir Oltean wrote:
> From: Vladimir Oltean <vladimir.oltean@nxp.com>
> 
> In NXP LS1028A there is a MAC-to-MAC internal link between enetc_port2
> and mscc_felix_port4. This link operates at 2.5Gbps and is described as
> such for the mscc_felix_port4 node.
> 
> The reason for the discrepancy is a limitation in the PHY library
> support for fixed-link nodes. Due to the fact that the PHY library
> registers a software PHY which emulates the clause 22 register map, the
> drivers/net/phy/fixed_phy.c driver only supports speeds up to 1Gbps.
> 
> The mscc_felix_port4 node is probed by DSA, which does not use the PHY
> library directly, but phylink, and phylink has a different representation
> for fixed-link nodes, one that does not have the limitation of not being
> able to represent speeds > 1Gbps.
> 
> Since the enetc driver was converted to phylink too as of commit
> 71b77a7a27a3 ("enetc: Migrate to PHYLINK and PCS_LYNX"), the limitation
> has been practically lifted there too, and we can describe the real link
> speed in the device tree now.
> 
> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>

Applied, thanks.