From: Ido Schimmel <idosch@idosch.org>
To: netdev@vger.kernel.org
Cc: davem@davemloft.net, kuba@kernel.org, jiri@nvidia.com,
vadimp@nvidia.com, mlxsw@nvidia.com,
Ido Schimmel <idosch@nvidia.com>
Subject: [PATCH net-next 1/3] mlxsw: reg: Add bank number to MCIA register
Date: Mon, 21 Jun 2021 10:50:39 +0300 [thread overview]
Message-ID: <20210621075041.2502416-2-idosch@idosch.org> (raw)
In-Reply-To: <20210621075041.2502416-1-idosch@idosch.org>
From: Ido Schimmel <idosch@nvidia.com>
Add bank number to MCIA (Management Cable Info Access) register in order
to allow access to banked pages on EEPROMs using CMIS (Common Management
Interface Specification) memory map.
Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Reviewed-by: Jiri Pirko <jiri@nvidia.com>
---
drivers/net/ethernet/mellanox/mlxsw/reg.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 93f1db3927af..cd60a0f91933 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -9714,6 +9714,12 @@ MLXSW_ITEM32(reg, mcia, page_number, 0x04, 16, 8);
*/
MLXSW_ITEM32(reg, mcia, device_address, 0x04, 0, 16);
+/* reg_mcia_bank_number
+ * Bank number.
+ * Access: Index
+ */
+MLXSW_ITEM32(reg, mcia, bank_number, 0x08, 16, 8);
+
/* reg_mcia_size
* Number of bytes to read/write (up to 48 bytes).
* Access: RW
--
2.31.1
next prev parent reply other threads:[~2021-06-21 7:51 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-21 7:50 [PATCH net-next 0/3] mlxsw: Add support for module EEPROM read by page Ido Schimmel
2021-06-21 7:50 ` Ido Schimmel [this message]
2021-06-21 7:50 ` [PATCH net-next 2/3] mlxsw: reg: Document possible MCIA status values Ido Schimmel
2021-06-21 7:50 ` [PATCH net-next 3/3] mlxsw: core: Add support for module EEPROM read by page Ido Schimmel
2021-06-21 19:50 ` [PATCH net-next 0/3] mlxsw: " patchwork-bot+netdevbpf
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