From: Josua Mayer <josua@solid-run.com>
To: netdev@vger.kernel.org
Cc: alvaro.karsz@solid-run.com, Josua Mayer <josua@solid-run.com>,
Michael Hennerich <michael.hennerich@analog.com>,
Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>
Subject: [PATCH v2 2/3] net: phy: adin: add support for clock output
Date: Tue, 19 Apr 2022 13:27:08 +0300 [thread overview]
Message-ID: <20220419102709.26432-3-josua@solid-run.com> (raw)
In-Reply-To: <20220419102709.26432-1-josua@solid-run.com>
The ADIN1300 supports generating certain clocks on its GP_CLK pin, as
well as providing the reference clock on CLK25_REF.
Add support for selecting the clock via device-tree properties.
Co-developed-by: Alvaro Karsz <alvaro.karsz@solid-run.com>
Signed-off-by: Alvaro Karsz <alvaro.karsz@solid-run.com>
Signed-off-by: Josua Mayer<josua@solid-run.com>
---
V1 -> V2: revised dts property name for clock(s)
V1 -> V2: implemented all 6 bits in the clock configuration register
drivers/net/phy/adin.c | 44 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c
index 5ce6da62cc8e..e7150a8e34d2 100644
--- a/drivers/net/phy/adin.c
+++ b/drivers/net/phy/adin.c
@@ -99,6 +99,15 @@
#define ADIN1300_GE_SOFT_RESET_REG 0xff0c
#define ADIN1300_GE_SOFT_RESET BIT(0)
+#define ADIN1300_GE_CLK_CFG_REG 0xff1f
+#define ADIN1300_GE_CLK_CFG_MASK GENMASK(5, 0)
+#define ADIN1300_GE_CLK_CFG_RCVR_125 BIT(5)
+#define ADIN1300_GE_CLK_CFG_FREE_125 BIT(4)
+#define ADIN1300_GE_CLK_CFG_REF_EN BIT(3)
+#define ADIN1300_GE_CLK_CFG_HRT_RCVR BIT(2)
+#define ADIN1300_GE_CLK_CFG_HRT_FREE BIT(1)
+#define ADIN1300_GE_CLK_CFG_25 BIT(0)
+
#define ADIN1300_GE_RGMII_CFG_REG 0xff23
#define ADIN1300_GE_RGMII_RX_MSK GENMASK(8, 6)
#define ADIN1300_GE_RGMII_RX_SEL(x) \
@@ -433,6 +442,37 @@ static int adin_set_tunable(struct phy_device *phydev,
}
}
+static int adin_config_clk_out(struct phy_device *phydev)
+{
+ struct device *dev = &phydev->mdio.dev;
+ const char *val = 0;
+ u8 sel = 0;
+
+ device_property_read_string(dev, "adi,phy-output-clock", &val);
+ if(!val) {
+ /* property not present, do not enable GP_CLK pin */
+ } else if(strcmp(val, "25mhz-reference") == 0) {
+ sel |= ADIN1300_GE_CLK_CFG_25;
+ } else if(strcmp(val, "125mhz-free-running") == 0) {
+ sel |= ADIN1300_GE_CLK_CFG_FREE_125;
+ } else if(strcmp(val, "125mhz-recovered") == 0) {
+ sel |= ADIN1300_GE_CLK_CFG_RCVR_125;
+ } else if(strcmp(val, "adaptive-free-running") == 0) {
+ sel |= ADIN1300_GE_CLK_CFG_HRT_FREE;
+ } else if(strcmp(val, "adaptive-recovered") == 0) {
+ sel |= ADIN1300_GE_CLK_CFG_HRT_RCVR;
+ } else {
+ phydev_err(phydev, "invalid adi,phy-output-clock\n");
+ return -EINVAL;
+ }
+
+ if(device_property_read_bool(dev, "adi,phy-output-reference-clock"))
+ sel |= ADIN1300_GE_CLK_CFG_REF_EN;
+
+ return phy_modify_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_CLK_CFG_REG,
+ ADIN1300_GE_CLK_CFG_MASK, sel);
+}
+
static int adin_config_init(struct phy_device *phydev)
{
int rc;
@@ -455,6 +495,10 @@ static int adin_config_init(struct phy_device *phydev)
if (rc < 0)
return rc;
+ rc = adin_config_clk_out(phydev);
+ if (rc < 0)
+ return rc;
+
phydev_dbg(phydev, "PHY is using mode '%s'\n",
phy_modes(phydev->interface));
--
2.34.1
next prev parent reply other threads:[~2022-04-19 10:27 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-10 10:46 [PATCH 0/3] adin: add support for 125MHz clk-out Josua Mayer
2022-04-10 10:46 ` [PATCH 1/3] dt: adin: document clk-out property Josua Mayer
2022-04-10 14:21 ` Krzysztof Kozlowski
2022-04-10 18:41 ` Josua Mayer
2022-04-10 19:01 ` Krzysztof Kozlowski
2022-04-11 7:42 ` Josua Mayer
2022-04-11 20:07 ` Jakub Kicinski
2022-04-11 20:59 ` Andrew Lunn
2022-04-11 21:33 ` Jakub Kicinski
2022-04-12 0:29 ` Andrew Lunn
2022-04-10 10:46 ` [PATCH 2/3] net: phy: adin: add support for 125MHz clk-out Josua Mayer
2022-04-10 10:46 ` [PATCH 3/3] ARM: dts: imx6qdl-sr-som: update phy configuration for som revision 1.9 Josua Mayer
2022-04-19 10:27 ` [PATCH v2 0/3] adin: add support for clock output Josua Mayer
2022-04-19 10:27 ` [PATCH v2 1/3] dt-bindings: net: adin: document phy clock output properties Josua Mayer
2022-04-21 12:24 ` Andrew Lunn
2022-04-19 10:27 ` Josua Mayer [this message]
2022-04-21 6:45 ` [PATCH v2 2/3] net: phy: adin: add support for clock output kernel test robot
2022-04-27 7:06 ` Josua Mayer
2022-04-19 10:27 ` [PATCH v2 3/3] ARM: dts: imx6qdl-sr-som: update phy configuration for som revision 1.9 Josua Mayer
2022-04-21 12:27 ` Andrew Lunn
2022-04-21 13:03 ` Russell King (Oracle)
2022-04-21 13:30 ` Andrew Lunn
2022-04-21 14:20 ` Russell King (Oracle)
2022-04-27 7:15 ` Josua Mayer
2022-05-09 16:01 ` Russell King (Oracle)
2022-04-28 8:28 ` [PATCH v3 0/3] adin: add support for clock output Josua Mayer
2022-04-28 8:28 ` [PATCH v3 1/3] dt-bindings: net: adin: document phy clock output properties Josua Mayer
2022-05-05 15:52 ` Josua Mayer
2022-05-05 20:24 ` Krzysztof Kozlowski
2022-05-08 9:57 ` Josua Mayer
2022-05-09 7:21 ` Krzysztof Kozlowski
2022-05-09 12:36 ` Josua Mayer
2022-04-28 8:28 ` [PATCH v3 2/3] net: phy: adin: add support for clock output Josua Mayer
2022-04-28 12:21 ` Andrew Lunn
2022-04-28 12:52 ` Josua Mayer
2022-04-28 23:34 ` Andrew Lunn
2022-04-28 8:28 ` [PATCH v3 3/3] ARM: dts: imx6qdl-sr-som: update phy configuration for som revision 1.9 Josua Mayer
2022-05-05 1:42 ` Shawn Guo
2022-05-09 14:36 ` [PATCH v4 0/3] adin: add support for clock output Josua Mayer
2022-05-09 14:36 ` [PATCH v4 1/3] dt-bindings: net: adin: document phy clock output properties Josua Mayer
2022-05-10 10:22 ` Krzysztof Kozlowski
2022-05-10 20:39 ` Jakub Kicinski
2022-05-11 12:58 ` [PATCH v4 1/3] dt-bindings: net: adin: document phy clock Michael Walle
2022-05-11 16:11 ` Jakub Kicinski
2022-05-11 17:10 ` Michael Walle
2022-05-11 19:42 ` Jakub Kicinski
2022-05-12 21:20 ` Michael Walle
2022-05-12 22:44 ` Jakub Kicinski
2022-05-15 7:16 ` Josua Mayer
2022-05-16 17:43 ` Jakub Kicinski
2022-05-16 19:48 ` Josua Mayer
2022-05-16 22:40 ` Jakub Kicinski
2022-05-17 8:50 ` Josua Mayer
2022-05-09 14:36 ` [PATCH v4 2/3] net: phy: adin: add support for clock output Josua Mayer
2022-05-09 14:36 ` [PATCH v4 3/3] ARM: dts: imx6qdl-sr-som: update phy configuration for som revision 1.9 Josua Mayer
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