Re: mv88e6321, dual cpu port

[Vladimir Oltean <olteanv@gmail.com>]

On Tue, Jan 24, 2023 at 08:21:35AM +0100, Angelo Dureghello wrote:
> What i need is something as
> 
>         eth0 ->  vlan1 -> port5(rmii)  ->  port 0,1,2
>         eth1 ->  vlan2 -> port6(rgmii) ->  port 3,4
> 
> The custom board i have here is already designed in this way
> (2 fixed-link mac-to-mac connecitons) and trying my best to have
> the above layout working.
> 
> If you have any suggestion on how to proceed, really appreciated.

The way this would have traditionally worked prior to having UAPI for
fine-grained user port to CPU port assignment was to declare in the
device tree that port6(rgmii) is a user port. This makes eth1 see
DSA-untagged traffic. Then you put port6 in a bridge with the other
ports, and isolate just ports 6, 3 and 4 in the VLAN that you desire,
and eth1's packets will be forwarded just to ports 3 and 4. Control
packts (STP, PTP) received over ports 3 and 4 are still trapped to the
CPU port (port5).

For some use cases, on LS1028A we still need to declare one of the CPU
ports as a user port. To achieve that, we take the existing upstream
device tree (which declares both CPU ports as CPU ports) and remove the
"ethernet" property from one of them, dynamically, from the U-Boot shell:

=> tftp $fdt_addr_r fsl-ls1028a-rdb.dtb
=> fdt addr $fdt_addr_r
=> fdt rm /soc/pcie@1f0000000/ethernet-switch@0,5/ports/port@4 ethernet
=> tftp $kernel_addr_r uImage
=> bootm $kernel_addr_r - $fdt_addr_r