* [PATCH 1/9] ARM: dts: renesas: Add compatible properties to KSZ8041 Ethernet PHYs
2021-09-09 8:49 [PATCH 0/9] renesas: Add compatible properties to Ethernet PHY nodes Geert Uytterhoeven
@ 2021-09-09 8:49 ` Geert Uytterhoeven
2021-09-09 8:49 ` [PATCH 2/9] ARM: dts: renesas: Add compatible properties to KSZ8081 " Geert Uytterhoeven
` (8 subsequent siblings)
9 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2021-09-09 8:49 UTC (permalink / raw)
To: Magnus Damm
Cc: Biju Das, Adam Ford, Florian Fainelli, Andrew Lunn,
Heiner Kallweit, Russell King, Grygorii Strashko,
linux-renesas-soc, linux-arm-kernel, netdev, devicetree,
Geert Uytterhoeven
Add compatible values to Ethernet PHY subnodes representing Micrel
KSZ8041 PHYs on RZ/G1 and R-Car Gen2 boards. This allows software to
identify the PHY model at any time, regardless of the state of the PHY
reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7743-sk-rzg1m.dts | 2 ++
arch/arm/boot/dts/r8a7745-sk-rzg1e.dts | 2 ++
arch/arm/boot/dts/r8a7790-lager.dts | 2 ++
arch/arm/boot/dts/r8a7790-stout.dts | 2 ++
arch/arm/boot/dts/r8a7791-koelsch.dts | 2 ++
arch/arm/boot/dts/r8a7791-porter.dts | 2 ++
arch/arm/boot/dts/r8a7793-gose.dts | 2 ++
arch/arm/boot/dts/r8a7794-alt.dts | 2 ++
arch/arm/boot/dts/r8a7794-silk.dts | 2 ++
9 files changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts b/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
index 4ace117470e800f8..ce36cf404fa2b1c4 100644
--- a/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
+++ b/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
@@ -69,6 +69,8 @@ ðer {
status = "okay";
phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id0022.1537",
+ "ethernet-phy-ieee802.3-c22";
reg = <1>;
interrupt-parent = <&irqc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts b/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
index 59d1a9bfab05a27e..4ab6d3fcc857f7db 100644
--- a/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
+++ b/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
@@ -64,6 +64,8 @@ ðer {
status = "okay";
phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id0022.1537",
+ "ethernet-phy-ieee802.3-c22";
reg = <1>;
interrupt-parent = <&irqc>;
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index fa6d986b5d4632cf..57cd2fa722490b08 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -678,6 +678,8 @@ ðer {
status = "okay";
phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id0022.1537",
+ "ethernet-phy-ieee802.3-c22";
reg = <1>;
interrupt-parent = <&irqc0>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm/boot/dts/r8a7790-stout.dts b/arch/arm/boot/dts/r8a7790-stout.dts
index d51f23572d7fc727..c802f9f13c18b837 100644
--- a/arch/arm/boot/dts/r8a7790-stout.dts
+++ b/arch/arm/boot/dts/r8a7790-stout.dts
@@ -199,6 +199,8 @@ ðer {
status = "okay";
phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id0022.1537",
+ "ethernet-phy-ieee802.3-c22";
reg = <1>;
interrupt-parent = <&irqc0>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 2a8b6fd9095cceba..6e691b6cac05cdf4 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -637,6 +637,8 @@ ðer {
status = "okay";
phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id0022.1537",
+ "ethernet-phy-ieee802.3-c22";
reg = <1>;
interrupt-parent = <&irqc0>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index c6ef636965c16f39..38e2ab928707d99e 100644
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -302,6 +302,8 @@ ðer {
status = "okay";
phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id0022.1537",
+ "ethernet-phy-ieee802.3-c22";
reg = <1>;
interrupt-parent = <&irqc0>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
index 479e0fdf0c37311e..c8978f4f62e9f2dc 100644
--- a/arch/arm/boot/dts/r8a7793-gose.dts
+++ b/arch/arm/boot/dts/r8a7793-gose.dts
@@ -595,6 +595,8 @@ ðer {
status = "okay";
phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id0022.1537",
+ "ethernet-phy-ieee802.3-c22";
reg = <1>;
interrupt-parent = <&irqc0>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts
index f330d796a772c394..99d554fe3329eb7a 100644
--- a/arch/arm/boot/dts/r8a7794-alt.dts
+++ b/arch/arm/boot/dts/r8a7794-alt.dts
@@ -383,6 +383,8 @@ ðer {
status = "okay";
phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id0022.1537",
+ "ethernet-phy-ieee802.3-c22";
reg = <1>;
interrupt-parent = <&irqc0>;
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
index cafa3046daa4baf4..92a76164432a8976 100644
--- a/arch/arm/boot/dts/r8a7794-silk.dts
+++ b/arch/arm/boot/dts/r8a7794-silk.dts
@@ -397,6 +397,8 @@ ðer {
status = "okay";
phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id0022.1537",
+ "ethernet-phy-ieee802.3-c22";
reg = <1>;
interrupt-parent = <&irqc0>;
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 2/9] ARM: dts: renesas: Add compatible properties to KSZ8081 Ethernet PHYs
2021-09-09 8:49 [PATCH 0/9] renesas: Add compatible properties to Ethernet PHY nodes Geert Uytterhoeven
2021-09-09 8:49 ` [PATCH 1/9] ARM: dts: renesas: Add compatible properties to KSZ8041 Ethernet PHYs Geert Uytterhoeven
@ 2021-09-09 8:49 ` Geert Uytterhoeven
2021-09-09 8:49 ` [PATCH 3/9] ARM: dts: renesas: Add compatible properties to KSZ9031 " Geert Uytterhoeven
` (7 subsequent siblings)
9 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2021-09-09 8:49 UTC (permalink / raw)
To: Magnus Damm
Cc: Biju Das, Adam Ford, Florian Fainelli, Andrew Lunn,
Heiner Kallweit, Russell King, Grygorii Strashko,
linux-renesas-soc, linux-arm-kernel, netdev, devicetree,
Geert Uytterhoeven
Add compatible values to Ethernet PHY subnodes representing Micrel
KSZ8081 PHYs on RZ/G1 boards. This allows software to identify the PHY
model at any time, regardless of the state of the PHY reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
I could not verify the PHY revision number (least significant nibble of
the ID), due to lack of hardware.
---
arch/arm/boot/dts/r8a7742-iwg21d-q7-dbcm-ca.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7-dbcm-ca.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7-dbcm-ca.dts
index 2bcb229844abc5c2..33db5938f2d45c6e 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7-dbcm-ca.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7-dbcm-ca.dts
@@ -66,6 +66,8 @@ ðer {
status = "okay";
phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id0022.1560",
+ "ethernet-phy-ieee802.3-c22";
reg = <1>;
micrel,led-mode = <1>;
};
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 3/9] ARM: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs
2021-09-09 8:49 [PATCH 0/9] renesas: Add compatible properties to Ethernet PHY nodes Geert Uytterhoeven
2021-09-09 8:49 ` [PATCH 1/9] ARM: dts: renesas: Add compatible properties to KSZ8041 Ethernet PHYs Geert Uytterhoeven
2021-09-09 8:49 ` [PATCH 2/9] ARM: dts: renesas: Add compatible properties to KSZ8081 " Geert Uytterhoeven
@ 2021-09-09 8:49 ` Geert Uytterhoeven
2021-09-23 11:41 ` Biju Das
2021-09-09 8:49 ` [PATCH 4/9] iARM: dts: renesas: Add compatible properties to LAN8710A " Geert Uytterhoeven
` (6 subsequent siblings)
9 siblings, 1 reply; 15+ messages in thread
From: Geert Uytterhoeven @ 2021-09-09 8:49 UTC (permalink / raw)
To: Magnus Damm
Cc: Biju Das, Adam Ford, Florian Fainelli, Andrew Lunn,
Heiner Kallweit, Russell King, Grygorii Strashko,
linux-renesas-soc, linux-arm-kernel, netdev, devicetree,
Geert Uytterhoeven
Add compatible values to Ethernet PHY subnodes representing Micrel
KSZ9031 PHYs on RZ/G1 boards. This allows software to identify the PHY
model at any time, regardless of the state of the PHY reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
I could not verify the PHY revision number (least significant nibble of
the ID), due to lack of hardware.
---
arch/arm/boot/dts/iwg20d-q7-common.dtsi | 2 ++
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 2 ++
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 2 ++
arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 2 ++
4 files changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index bc857676d19104a1..849034a49a3f98e2 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -158,6 +158,8 @@ &avb {
status = "okay";
phy3: ethernet-phy@3 {
+ compatible = "ethernet-phy-id0022.1622",
+ "ethernet-phy-ieee802.3-c22";
reg = <3>;
micrel,led-mode = <1>;
};
diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index 94bf8a116b5242a9..a5a79cdbcd0ee09b 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -175,6 +175,8 @@ &avb {
status = "okay";
phy3: ethernet-phy@3 {
+ compatible = "ethernet-phy-id0022.1622",
+ "ethernet-phy-ieee802.3-c22";
reg = <3>;
micrel,led-mode = <1>;
};
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 73bd62d8a929e5da..c105932f642ea517 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -123,6 +123,8 @@ phy3: ethernet-phy@3 {
* On some older versions of the platform (before R4.0) the phy address
* may be 1 or 3. The address is fixed to 3 for R4.0 onwards.
*/
+ compatible = "ethernet-phy-id0022.1622",
+ "ethernet-phy-ieee802.3-c22";
reg = <3>;
micrel,led-mode = <1>;
};
diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
index 8ac61b50aec03190..b024621c998103b2 100644
--- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
+++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
@@ -79,6 +79,8 @@ &avb {
status = "okay";
phy3: ethernet-phy@3 {
+ compatible = "ethernet-phy-id0022.1622",
+ "ethernet-phy-ieee802.3-c22";
reg = <3>;
interrupt-parent = <&gpio5>;
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* RE: [PATCH 3/9] ARM: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs
2021-09-09 8:49 ` [PATCH 3/9] ARM: dts: renesas: Add compatible properties to KSZ9031 " Geert Uytterhoeven
@ 2021-09-23 11:41 ` Biju Das
0 siblings, 0 replies; 15+ messages in thread
From: Biju Das @ 2021-09-23 11:41 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm
Cc: Adam Ford, Florian Fainelli, Andrew Lunn, Heiner Kallweit,
Russell King, Grygorii Strashko, linux-renesas-soc,
linux-arm-kernel, netdev, devicetree
Hi Geert,
Thanks for the patch. Tested the patch on iWave RZ/G1N board.
Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
Regards,
Biju
> -----Original Message-----
> From: Geert Uytterhoeven <geert+renesas@glider.be>
> Sent: 09 September 2021 09:50
> To: Magnus Damm <magnus.damm@gmail.com>
> Cc: Biju Das <biju.das.jz@bp.renesas.com>; Adam Ford <aford173@gmail.com>;
> Florian Fainelli <f.fainelli@gmail.com>; Andrew Lunn <andrew@lunn.ch>;
> Heiner Kallweit <hkallweit1@gmail.com>; Russell King
> <linux@armlinux.org.uk>; Grygorii Strashko <grygorii.strashko@ti.com>;
> linux-renesas-soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> netdev@vger.kernel.org; devicetree@vger.kernel.org; Geert Uytterhoeven
> <geert+renesas@glider.be>
> Subject: [PATCH 3/9] ARM: dts: renesas: Add compatible properties to
> KSZ9031 Ethernet PHYs
>
> Add compatible values to Ethernet PHY subnodes representing Micrel
> KSZ9031 PHYs on RZ/G1 boards. This allows software to identify the PHY
> model at any time, regardless of the state of the PHY reset line.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> I could not verify the PHY revision number (least significant nibble of
> the ID), due to lack of hardware.
> ---
> arch/arm/boot/dts/iwg20d-q7-common.dtsi | 2 ++
> arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 2 ++
> arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 2 ++
> arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 2 ++
> 4 files changed, 8 insertions(+)
>
> diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
> b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
> index bc857676d19104a1..849034a49a3f98e2 100644
> --- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
> +++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
> @@ -158,6 +158,8 @@ &avb {
> status = "okay";
>
> phy3: ethernet-phy@3 {
> + compatible = "ethernet-phy-id0022.1622",
> + "ethernet-phy-ieee802.3-c22";
> reg = <3>;
> micrel,led-mode = <1>;
> };
> diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
> b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
> index 94bf8a116b5242a9..a5a79cdbcd0ee09b 100644
> --- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
> +++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
> @@ -175,6 +175,8 @@ &avb {
> status = "okay";
>
> phy3: ethernet-phy@3 {
> + compatible = "ethernet-phy-id0022.1622",
> + "ethernet-phy-ieee802.3-c22";
> reg = <3>;
> micrel,led-mode = <1>;
> };
> diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
> b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
> index 73bd62d8a929e5da..c105932f642ea517 100644
> --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
> +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
> @@ -123,6 +123,8 @@ phy3: ethernet-phy@3 {
> * On some older versions of the platform (before R4.0) the phy
> address
> * may be 1 or 3. The address is fixed to 3 for R4.0 onwards.
> */
> + compatible = "ethernet-phy-id0022.1622",
> + "ethernet-phy-ieee802.3-c22";
> reg = <3>;
> micrel,led-mode = <1>;
> };
> diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> index 8ac61b50aec03190..b024621c998103b2 100644
> --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
> @@ -79,6 +79,8 @@ &avb {
> status = "okay";
>
> phy3: ethernet-phy@3 {
> + compatible = "ethernet-phy-id0022.1622",
> + "ethernet-phy-ieee802.3-c22";
> reg = <3>;
> interrupt-parent = <&gpio5>;
> interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
> --
> 2.25.1
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 4/9] iARM: dts: renesas: Add compatible properties to LAN8710A Ethernet PHYs
2021-09-09 8:49 [PATCH 0/9] renesas: Add compatible properties to Ethernet PHY nodes Geert Uytterhoeven
` (2 preceding siblings ...)
2021-09-09 8:49 ` [PATCH 3/9] ARM: dts: renesas: Add compatible properties to KSZ9031 " Geert Uytterhoeven
@ 2021-09-09 8:49 ` Geert Uytterhoeven
2021-09-09 8:49 ` [PATCH 5/9] ARM: dts: renesas: Add compatible properties to RTL8201FL " Geert Uytterhoeven
` (5 subsequent siblings)
9 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2021-09-09 8:49 UTC (permalink / raw)
To: Magnus Damm
Cc: Biju Das, Adam Ford, Florian Fainelli, Andrew Lunn,
Heiner Kallweit, Russell King, Grygorii Strashko,
linux-renesas-soc, linux-arm-kernel, netdev, devicetree,
Geert Uytterhoeven
Add compatible values to Ethernet PHY subnodes representing SMSC
LAN8710A PHYs on RZ/A1 and R-Mobile A1 boards. This allows software to
identify the PHY model at any time, regardless of the state of the PHY
reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
I could not verify the PHY revision number (least significant nibble of
the ID) on gr-peach, due to lack of hardware.
---
arch/arm/boot/dts/r7s72100-gr-peach.dts | 2 ++
arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts
index 2562cc9b53564915..105f9c71f9fd54f4 100644
--- a/arch/arm/boot/dts/r7s72100-gr-peach.dts
+++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts
@@ -129,6 +129,8 @@ ðer {
phy-handle = <&phy0>;
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0007.c0f0",
+ "ethernet-phy-ieee802.3-c22";
reg = <0>;
reset-gpios = <&port4 2 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
index ab7034f2f9fc157c..f052f8bade5d9c78 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
@@ -180,6 +180,8 @@ ðer {
status = "okay";
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0007.c0f1",
+ "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 5/9] ARM: dts: renesas: Add compatible properties to RTL8201FL Ethernet PHYs
2021-09-09 8:49 [PATCH 0/9] renesas: Add compatible properties to Ethernet PHY nodes Geert Uytterhoeven
` (3 preceding siblings ...)
2021-09-09 8:49 ` [PATCH 4/9] iARM: dts: renesas: Add compatible properties to LAN8710A " Geert Uytterhoeven
@ 2021-09-09 8:49 ` Geert Uytterhoeven
2021-09-09 8:49 ` [PATCH 6/9] ARM: dts: renesas: Add compatible properties to uPD6061x " Geert Uytterhoeven
` (4 subsequent siblings)
9 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2021-09-09 8:49 UTC (permalink / raw)
To: Magnus Damm
Cc: Biju Das, Adam Ford, Florian Fainelli, Andrew Lunn,
Heiner Kallweit, Russell King, Grygorii Strashko,
linux-renesas-soc, linux-arm-kernel, netdev, devicetree,
Geert Uytterhoeven
Add compatible values to Ethernet PHY subnodes representing Realtek
RTL8201FL PHYs on RZ/A2 boards. This allows software to identify the
PHY model at any time, regardless of the state of the PHY reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r7s9210-rza2mevb.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/r7s9210-rza2mevb.dts b/arch/arm/boot/dts/r7s9210-rza2mevb.dts
index ececb1bc995a5918..9c0d9686fe01133b 100644
--- a/arch/arm/boot/dts/r7s9210-rza2mevb.dts
+++ b/arch/arm/boot/dts/r7s9210-rza2mevb.dts
@@ -100,6 +100,8 @@ ðer1 {
renesas,no-ether-link;
phy-handle = <&phy1>;
phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id001c.c816",
+ "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 6/9] ARM: dts: renesas: Add compatible properties to uPD6061x Ethernet PHYs
2021-09-09 8:49 [PATCH 0/9] renesas: Add compatible properties to Ethernet PHY nodes Geert Uytterhoeven
` (4 preceding siblings ...)
2021-09-09 8:49 ` [PATCH 5/9] ARM: dts: renesas: Add compatible properties to RTL8201FL " Geert Uytterhoeven
@ 2021-09-09 8:49 ` Geert Uytterhoeven
2021-09-09 8:49 ` [PATCH 7/9] arm64: dts: renesas: Add compatible properties to AR8031 " Geert Uytterhoeven
` (3 subsequent siblings)
9 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2021-09-09 8:49 UTC (permalink / raw)
To: Magnus Damm
Cc: Biju Das, Adam Ford, Florian Fainelli, Andrew Lunn,
Heiner Kallweit, Russell King, Grygorii Strashko,
linux-renesas-soc, linux-arm-kernel, netdev, devicetree,
Geert Uytterhoeven
Add compatible values to Ethernet PHY subnodes representing Renesas
uPD60610 or uPD60611 PHYs on RZ/A1 boards. This allows software to
identify the PHY model at any time, regardless of the state of the PHY
reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r7s72100-genmai.dts | 2 ++
arch/arm/boot/dts/r7s72100-rskrza1.dts | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts
index 07d611d2b7b52756..1e8447176b1051f3 100644
--- a/arch/arm/boot/dts/r7s72100-genmai.dts
+++ b/arch/arm/boot/dts/r7s72100-genmai.dts
@@ -108,6 +108,8 @@ ðer {
renesas,no-ether-link;
phy-handle = <&phy0>;
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-idb824.2814",
+ "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};
diff --git a/arch/arm/boot/dts/r7s72100-rskrza1.dts b/arch/arm/boot/dts/r7s72100-rskrza1.dts
index 8363f5e9a4acc275..9bfa7d8e2888b9ee 100644
--- a/arch/arm/boot/dts/r7s72100-rskrza1.dts
+++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
@@ -193,6 +193,8 @@ ðer {
renesas,no-ether-link;
phy-handle = <&phy0>;
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-idb824.2814",
+ "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 7/9] arm64: dts: renesas: Add compatible properties to AR8031 Ethernet PHYs
2021-09-09 8:49 [PATCH 0/9] renesas: Add compatible properties to Ethernet PHY nodes Geert Uytterhoeven
` (5 preceding siblings ...)
2021-09-09 8:49 ` [PATCH 6/9] ARM: dts: renesas: Add compatible properties to uPD6061x " Geert Uytterhoeven
@ 2021-09-09 8:49 ` Geert Uytterhoeven
2021-09-09 8:49 ` [PATCH 8/9] arm64: dts: renesas: Add compatible properties to KSZ9031 " Geert Uytterhoeven
` (2 subsequent siblings)
9 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2021-09-09 8:49 UTC (permalink / raw)
To: Magnus Damm
Cc: Biju Das, Adam Ford, Florian Fainelli, Andrew Lunn,
Heiner Kallweit, Russell King, Grygorii Strashko,
linux-renesas-soc, linux-arm-kernel, netdev, devicetree,
Geert Uytterhoeven
Add compatible values to Ethernet PHY subnodes representing Atheros
AR8031 PHYs on RZ/G2 boards. This allows software to identify the PHY
model at any time, regardless of the state of the PHY reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
index 090dc9c4f57b5be1..a06cf770c12faa90 100644
--- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
@@ -58,6 +58,8 @@ &avb {
status = "okay";
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id004d.d074",
+ "ethernet-phy-ieee802.3-c22";
reg = <0>;
interrupt-parent = <&gpio2>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 8/9] arm64: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs
2021-09-09 8:49 [PATCH 0/9] renesas: Add compatible properties to Ethernet PHY nodes Geert Uytterhoeven
` (6 preceding siblings ...)
2021-09-09 8:49 ` [PATCH 7/9] arm64: dts: renesas: Add compatible properties to AR8031 " Geert Uytterhoeven
@ 2021-09-09 8:49 ` Geert Uytterhoeven
2021-09-28 7:40 ` Geert Uytterhoeven
2021-09-09 8:49 ` [PATCH 9/9] arm64: dts: renesas: Add compatible properties to RTL8211E " Geert Uytterhoeven
2021-09-23 11:00 ` [PATCH 0/9] renesas: Add compatible properties to Ethernet PHY nodes Geert Uytterhoeven
9 siblings, 1 reply; 15+ messages in thread
From: Geert Uytterhoeven @ 2021-09-09 8:49 UTC (permalink / raw)
To: Magnus Damm
Cc: Biju Das, Adam Ford, Florian Fainelli, Andrew Lunn,
Heiner Kallweit, Russell King, Grygorii Strashko,
linux-renesas-soc, linux-arm-kernel, netdev, devicetree,
Geert Uytterhoeven
Add compatible values to Ethernet PHY subnodes representing Micrel
KSZ9031 PHYs on R-Car Gen3 boards. This allows software to identify the
PHY model at any time, regardless of the state of the PHY reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
I could not verify the PHY revision number (least significant nibble of
the ID) on eagle, v3msk, conder, and v3hsk, due to lack of hardware.
---
arch/arm64/boot/dts/renesas/draak.dtsi | 2 ++
arch/arm64/boot/dts/renesas/ebisu.dtsi | 2 ++
arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 2 ++
arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts | 2 ++
arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 2 ++
arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts | 2 ++
arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts | 2 ++
arch/arm64/boot/dts/renesas/salvator-common.dtsi | 2 ++
arch/arm64/boot/dts/renesas/ulcb.dtsi | 2 ++
9 files changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/draak.dtsi b/arch/arm64/boot/dts/renesas/draak.dtsi
index ff799ab73f8a479d..5f5a0bb2da86cc57 100644
--- a/arch/arm64/boot/dts/renesas/draak.dtsi
+++ b/arch/arm64/boot/dts/renesas/draak.dtsi
@@ -243,6 +243,8 @@ &avb {
status = "okay";
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0022.1622",
+ "ethernet-phy-ieee802.3-c22";
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio5>;
diff --git a/arch/arm64/boot/dts/renesas/ebisu.dtsi b/arch/arm64/boot/dts/renesas/ebisu.dtsi
index 54f88bb7e5920296..0fdfc67cb965afd9 100644
--- a/arch/arm64/boot/dts/renesas/ebisu.dtsi
+++ b/arch/arm64/boot/dts/renesas/ebisu.dtsi
@@ -302,6 +302,8 @@ &avb {
status = "okay";
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0022.1622",
+ "ethernet-phy-ieee802.3-c22";
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio2>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
index d24da54f312b9085..c7451973f8a5b2a7 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
@@ -92,6 +92,8 @@ &avb {
status = "okay";
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0022.1622",
+ "ethernet-phy-ieee802.3-c22";
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio1>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts b/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
index 2426e533128ceb42..2f77ec4ed7e16166 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
@@ -107,6 +107,8 @@ &avb {
status = "okay";
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0022.1622",
+ "ethernet-phy-ieee802.3-c22";
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio1>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
index edf7f2a2f958787c..4cb5bfa6932d5809 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
@@ -132,6 +132,8 @@ &gether {
status = "okay";
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0022.1622",
+ "ethernet-phy-ieee802.3-c22";
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio4>;
diff --git a/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts b/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
index 7838dcee31362705..ca69d1b1d67af047 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
@@ -113,6 +113,8 @@ &gether {
status = "okay";
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0022.1622",
+ "ethernet-phy-ieee802.3-c22";
reg = <0>;
interrupt-parent = <&gpio4>;
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
index dc671ff57ec7678a..e46dc9aa0a43a60f 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
@@ -27,6 +27,8 @@ &avb0 {
status = "okay";
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0022.1622",
+ "ethernet-phy-ieee802.3-c22";
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio4>;
diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index de959f28ad6ce27b..04ba101a711119a4 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -346,6 +346,8 @@ &avb {
status = "okay";
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0022.1622",
+ "ethernet-phy-ieee802.3-c22";
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio2>;
diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index 1f177af3eb9dfa37..7edffe7f8cfa326f 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -154,6 +154,8 @@ &avb {
status = "okay";
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0022.1622",
+ "ethernet-phy-ieee802.3-c22";
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio2>;
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 8/9] arm64: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs
2021-09-09 8:49 ` [PATCH 8/9] arm64: dts: renesas: Add compatible properties to KSZ9031 " Geert Uytterhoeven
@ 2021-09-28 7:40 ` Geert Uytterhoeven
0 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2021-09-28 7:40 UTC (permalink / raw)
To: Magnus Damm
Cc: Biju Das, Adam Ford, Florian Fainelli, Andrew Lunn,
Heiner Kallweit, Russell King, Grygorii Strashko, Linux-Renesas,
Linux ARM, netdev,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Geert Uytterhoeven
On Thu, Sep 9, 2021 at 10:49 AM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
> Add compatible values to Ethernet PHY subnodes representing Micrel
> KSZ9031 PHYs on R-Car Gen3 boards. This allows software to identify the
> PHY model at any time, regardless of the state of the PHY reset line.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> I could not verify the PHY revision number (least significant nibble of
> the ID) on eagle, v3msk, conder, and v3hsk, due to lack of hardware.
In the meantime, I managed to verify the PHY revision number on Eagle.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 9/9] arm64: dts: renesas: Add compatible properties to RTL8211E Ethernet PHYs
2021-09-09 8:49 [PATCH 0/9] renesas: Add compatible properties to Ethernet PHY nodes Geert Uytterhoeven
` (7 preceding siblings ...)
2021-09-09 8:49 ` [PATCH 8/9] arm64: dts: renesas: Add compatible properties to KSZ9031 " Geert Uytterhoeven
@ 2021-09-09 8:49 ` Geert Uytterhoeven
2021-09-23 11:38 ` Biju Das
2021-09-23 11:00 ` [PATCH 0/9] renesas: Add compatible properties to Ethernet PHY nodes Geert Uytterhoeven
9 siblings, 1 reply; 15+ messages in thread
From: Geert Uytterhoeven @ 2021-09-09 8:49 UTC (permalink / raw)
To: Magnus Damm
Cc: Biju Das, Adam Ford, Florian Fainelli, Andrew Lunn,
Heiner Kallweit, Russell King, Grygorii Strashko,
linux-renesas-soc, linux-arm-kernel, netdev, devicetree,
Geert Uytterhoeven
Add compatible values to Ethernet PHY subnodes representing Realtek
RTL8211E PHYs on RZ/G2 boards. This allows software to identify the PHY
model at any time, regardless of the state of the PHY reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm64/boot/dts/renesas/cat875.dtsi | 2 ++
arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/cat875.dtsi b/arch/arm64/boot/dts/renesas/cat875.dtsi
index 801ea54b027c43d9..a69d24e9c61db052 100644
--- a/arch/arm64/boot/dts/renesas/cat875.dtsi
+++ b/arch/arm64/boot/dts/renesas/cat875.dtsi
@@ -21,6 +21,8 @@ &avb {
status = "okay";
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id001c.c915",
+ "ethernet-phy-ieee802.3-c22";
reg = <0>;
interrupt-parent = <&gpio2>;
interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
index dde3a07bc417c690..ad898c6db4e62df6 100644
--- a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
+++ b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
@@ -24,6 +24,8 @@ &avb {
status = "okay";
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id001c.c915",
+ "ethernet-phy-ieee802.3-c22";
reg = <0>;
interrupt-parent = <&gpio2>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* RE: [PATCH 9/9] arm64: dts: renesas: Add compatible properties to RTL8211E Ethernet PHYs
2021-09-09 8:49 ` [PATCH 9/9] arm64: dts: renesas: Add compatible properties to RTL8211E " Geert Uytterhoeven
@ 2021-09-23 11:38 ` Biju Das
0 siblings, 0 replies; 15+ messages in thread
From: Biju Das @ 2021-09-23 11:38 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm
Cc: Adam Ford, Florian Fainelli, Andrew Lunn, Heiner Kallweit,
Russell King, Grygorii Strashko, linux-renesas-soc,
linux-arm-kernel, netdev, devicetree
Hi Geert,
Thanks for the patch. Tested the patch on Hihope RZ/G2M board.
Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
Regards,
Biju
> -----Original Message-----
> From: Geert Uytterhoeven <geert+renesas@glider.be>
> Sent: 09 September 2021 09:50
> To: Magnus Damm <magnus.damm@gmail.com>
> Cc: Biju Das <biju.das.jz@bp.renesas.com>; Adam Ford <aford173@gmail.com>;
> Florian Fainelli <f.fainelli@gmail.com>; Andrew Lunn <andrew@lunn.ch>;
> Heiner Kallweit <hkallweit1@gmail.com>; Russell King
> <linux@armlinux.org.uk>; Grygorii Strashko <grygorii.strashko@ti.com>;
> linux-renesas-soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> netdev@vger.kernel.org; devicetree@vger.kernel.org; Geert Uytterhoeven
> <geert+renesas@glider.be>
> Subject: [PATCH 9/9] arm64: dts: renesas: Add compatible properties to
> RTL8211E Ethernet PHYs
>
> Add compatible values to Ethernet PHY subnodes representing Realtek
> RTL8211E PHYs on RZ/G2 boards. This allows software to identify the PHY
> model at any time, regardless of the state of the PHY reset line.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> arch/arm64/boot/dts/renesas/cat875.dtsi | 2 ++
> arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/cat875.dtsi
> b/arch/arm64/boot/dts/renesas/cat875.dtsi
> index 801ea54b027c43d9..a69d24e9c61db052 100644
> --- a/arch/arm64/boot/dts/renesas/cat875.dtsi
> +++ b/arch/arm64/boot/dts/renesas/cat875.dtsi
> @@ -21,6 +21,8 @@ &avb {
> status = "okay";
>
> phy0: ethernet-phy@0 {
> + compatible = "ethernet-phy-id001c.c915",
> + "ethernet-phy-ieee802.3-c22";
> reg = <0>;
> interrupt-parent = <&gpio2>;
> interrupts = <21 IRQ_TYPE_LEVEL_LOW>; diff --git
> a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
> b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
> index dde3a07bc417c690..ad898c6db4e62df6 100644
> --- a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
> +++ b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
> @@ -24,6 +24,8 @@ &avb {
> status = "okay";
>
> phy0: ethernet-phy@0 {
> + compatible = "ethernet-phy-id001c.c915",
> + "ethernet-phy-ieee802.3-c22";
> reg = <0>;
> interrupt-parent = <&gpio2>;
> interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
> --
> 2.25.1
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 0/9] renesas: Add compatible properties to Ethernet PHY nodes
2021-09-09 8:49 [PATCH 0/9] renesas: Add compatible properties to Ethernet PHY nodes Geert Uytterhoeven
` (8 preceding siblings ...)
2021-09-09 8:49 ` [PATCH 9/9] arm64: dts: renesas: Add compatible properties to RTL8211E " Geert Uytterhoeven
@ 2021-09-23 11:00 ` Geert Uytterhoeven
2021-09-23 14:09 ` Andrew Lunn
9 siblings, 1 reply; 15+ messages in thread
From: Geert Uytterhoeven @ 2021-09-23 11:00 UTC (permalink / raw)
To: Andrew Lunn, Heiner Kallweit, Russell King
Cc: Biju Das, Florian Fainelli, Adam Ford, Grygorii Strashko,
Linux-Renesas, Linux ARM, netdev,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Geert Uytterhoeven
On Thu, Sep 9, 2021 at 10:49 AM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
> If an Ethernet PHY reset is asserted when the Ethernet driver is
> initialized, the PHY cannot be probed:
>
> mdio_bus ee700000.ethernet-ffffffff: MDIO device at address 1 is missing
>
> This happens because the Linux PHY subsystem tries to read the PHY
> Identifier registers before handling PHY reset. Hence if the PHY reset
> was asserted before, identification fails.
>
> An easy way to reproduce this issue is by using kexec to launch a new
> kernel (the PHY reset will be asserted before starting the new kernel),
> or by unbinding and rebinding the Ethernet driver (the PHY reset will be
> asserted during unbind), e.g. on koelsch:
>
> echo ee700000.ethernet > /sys/bus/platform/drivers/sh-eth/unbind
> $ echo ee700000.ethernet > /sys/bus/platform/drivers/sh-eth/bind
>
> The recommended approach[1][2] seems to be working around this issue by
> adding compatible values to all ethernet-phy nodes, so Linux can
> identify the PHY at any time, without reading the PHY ID from the
> device, and regardless of the state of the PHY reset line.
>
> Hence this patch series adds such compatible values to all Ethernet PHY
> subnodes representing PHYs on all boards with Renesas ARM and ARM64
> SoCs. For easier review, I have split the series in one patch per PHY
> model.
>
> On most boards, I could verify the actual PHY ID at runtime[3], on other
> boards I had to resort to schematics.
>
> Kexec and Ethernet driver rebind have been tested on Koelsch and
> Salvator-XS.
>
> I plan to queue these in renesas-devel for v5.16.
>
> Thanks for your comments!
I'd be very grateful for comments (e.g. Acked-by) from the Ethernet
PHY people.
Thanks again!
> [1] "Re: [PATCH] RFC: net: phy: of phys probe/reset issue"
> https://lore.kernel.org/r/ade12434-adf2-6ea7-24ce-ce45ad2e1b5e@gmail.com/
> [2] "PHY reset may still be asserted during MDIO probe"
> https://lore.kernel.org/r/CAMuHMdXno2OUHqsAfO0z43JmGkFehD+FJ2dEjEsr_P53oAAPxA@mail.gmail.com
> [3] The easiest way to obtain the PHY ID is by adding a debug print to
> drivers/net/phy/phy_device.c:get_phy_c22_id(), _before_ applying
> this patch.
>
> Geert Uytterhoeven (9):
> ARM: dts: renesas: Add compatible properties to KSZ8041 Ethernet PHYs
> ARM: dts: renesas: Add compatible properties to KSZ8081 Ethernet PHYs
> ARM: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs
> iARM: dts: renesas: Add compatible properties to LAN8710A Ethernet
> PHYs
> ARM: dts: renesas: Add compatible properties to RTL8201FL Ethernet
> PHYs
> ARM: dts: renesas: Add compatible properties to uPD6061x Ethernet PHYs
> arm64: dts: renesas: Add compatible properties to AR8031 Ethernet PHYs
> arm64: dts: renesas: Add compatible properties to KSZ9031 Ethernet
> PHYs
> arm64: dts: renesas: Add compatible properties to RTL8211E Ethernet
> PHYs
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 0/9] renesas: Add compatible properties to Ethernet PHY nodes
2021-09-23 11:00 ` [PATCH 0/9] renesas: Add compatible properties to Ethernet PHY nodes Geert Uytterhoeven
@ 2021-09-23 14:09 ` Andrew Lunn
0 siblings, 0 replies; 15+ messages in thread
From: Andrew Lunn @ 2021-09-23 14:09 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Heiner Kallweit, Russell King, Biju Das, Florian Fainelli,
Adam Ford, Grygorii Strashko, Linux-Renesas, Linux ARM, netdev,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Geert Uytterhoeven
On Thu, Sep 23, 2021 at 01:00:11PM +0200, Geert Uytterhoeven wrote:
> On Thu, Sep 9, 2021 at 10:49 AM Geert Uytterhoeven
> <geert+renesas@glider.be> wrote:
> > If an Ethernet PHY reset is asserted when the Ethernet driver is
> > initialized, the PHY cannot be probed:
> >
> > mdio_bus ee700000.ethernet-ffffffff: MDIO device at address 1 is missing
> >
> > This happens because the Linux PHY subsystem tries to read the PHY
> > Identifier registers before handling PHY reset. Hence if the PHY reset
> > was asserted before, identification fails.
> >
> > An easy way to reproduce this issue is by using kexec to launch a new
> > kernel (the PHY reset will be asserted before starting the new kernel),
> > or by unbinding and rebinding the Ethernet driver (the PHY reset will be
> > asserted during unbind), e.g. on koelsch:
> >
> > echo ee700000.ethernet > /sys/bus/platform/drivers/sh-eth/unbind
> > $ echo ee700000.ethernet > /sys/bus/platform/drivers/sh-eth/bind
> >
> > The recommended approach[1][2] seems to be working around this issue by
> > adding compatible values to all ethernet-phy nodes, so Linux can
> > identify the PHY at any time, without reading the PHY ID from the
> > device, and regardless of the state of the PHY reset line.
> >
> > Hence this patch series adds such compatible values to all Ethernet PHY
> > subnodes representing PHYs on all boards with Renesas ARM and ARM64
> > SoCs. For easier review, I have split the series in one patch per PHY
> > model.
It is a reasonable approach.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
^ permalink raw reply [flat|nested] 15+ messages in thread