From: Jose Abreu <Jose.Abreu@synopsys.com>
To: David Miller <davem@davemloft.net>,
"Jose.Abreu@synopsys.com" <Jose.Abreu@synopsys.com>
Cc: "thierry.reding@gmail.com" <thierry.reding@gmail.com>,
"peppe.cavallaro@st.com" <peppe.cavallaro@st.com>,
"alexandre.torgue@st.com" <alexandre.torgue@st.com>,
"f.fainelli@gmail.com" <f.fainelli@gmail.com>,
"jonathanh@nvidia.com" <jonathanh@nvidia.com>,
"bbiswas@nvidia.com" <bbiswas@nvidia.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>
Subject: RE: [PATCH v3 0/2] net: stmmac: Enhanced addressing mode for DWMAC 4.10
Date: Wed, 25 Sep 2019 11:46:34 +0000 [thread overview]
Message-ID: <BN8PR12MB32667F9FDDB2161E9B63C1AFD3870@BN8PR12MB3266.namprd12.prod.outlook.com> (raw)
In-Reply-To: <BN8PR12MB3266A2F1F5F3F18F3A80BFC1D3870@BN8PR12MB3266.namprd12.prod.outlook.com>
From: Jose Abreu <joabreu@synopsys.com>
Date: Sep/25/2019, 12:41:04 (UTC+00:00)
> From: David Miller <davem@davemloft.net>
> Date: Sep/25/2019, 12:33:53 (UTC+00:00)
>
> > From: Jose Abreu <Jose.Abreu@synopsys.com>
> > Date: Wed, 25 Sep 2019 10:44:53 +0000
> >
> > > From: David Miller <davem@davemloft.net>
> > > Date: Sep/24/2019, 20:45:08 (UTC+00:00)
> > >
> > >> From: Thierry Reding <thierry.reding@gmail.com>
> > >> Date: Fri, 20 Sep 2019 19:00:34 +0200
> > >>
> > >> Also, you're now writing to the high 32-bits unconditionally, even when
> > >> it will always be zero because of 32-bit addressing. That looks like
> > >> a step backwards to me.
> > >
> > > Don't agree. As per previous discussions and as per my IP knowledge, if
> > > EAME is not enabled / not supported the register can still be written.
> > > This is not fast path and will not impact any remaining operation. Can
> > > you please explain what exactly is the concern about this ?
> > >
> > > Anyway, this is an important feature for performance so I hope Thierry
> > > re-submits this once -next opens and addressing the review comments.
> >
> > Perhaps I misunderstand the context, isn't this code writing the
> > descriptors for every packet?
>
> No, its just setting up the base address for the descriptors which is
> done in open(). The one that's in the fast path is the tail address,
> which is always the lower 32 bits.
Oops, sorry. Indeed it's done in refill operation in function
dwmac4_set_addr() for rx/tx which is fast path so you do have a point
that I was not seeing. Thanks for bringing this up!
Now, the point would be:
a) Is it faster to have an condition check in dwmac4_set_addr(), or
b) Always write to descs the upper 32 bits. Which always exists in the
IP and is a standard write to memory.
---
Thanks,
Jose Miguel Abreu
next prev parent reply other threads:[~2019-09-25 11:47 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-20 17:00 [PATCH v3 0/2] net: stmmac: Enhanced addressing mode for DWMAC 4.10 Thierry Reding
2019-09-20 17:00 ` [PATCH v3 1/2] net: stmmac: Only enable enhanced addressing mode when needed Thierry Reding
2019-09-20 17:00 ` [PATCH v3 2/2] net: stmmac: Support enhanced addressing mode for DWMAC 4.10 Thierry Reding
2019-09-20 17:02 ` [PATCH v3 0/2] net: stmmac: Enhanced " Florian Fainelli
2019-09-21 1:35 ` Thierry Reding
2019-09-24 19:45 ` David Miller
2019-09-25 10:44 ` Jose Abreu
2019-09-25 11:33 ` David Miller
2019-09-25 11:41 ` Jose Abreu
2019-09-25 11:46 ` Jose Abreu [this message]
2019-09-25 17:31 ` Florian Fainelli
2019-09-25 22:46 ` Thierry Reding
2019-09-26 8:22 ` Jose Abreu
2019-09-25 12:01 ` David Miller
2019-09-25 11:17 ` Thierry Reding
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