From: Vladimir Oltean <olteanv@gmail.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Andrew Lunn <andrew@lunn.ch>,
Vivien Didelot <vivien.didelot@gmail.com>,
Florian Fainelli <f.fainelli@gmail.com>,
netdev <netdev@vger.kernel.org>, DENG Qingfang <dqfext@gmail.com>
Subject: Re: [net-next PATCH 1/5] net: dsa: tag_rtl4_a: Implement Realtek 4 byte A tag
Date: Thu, 4 Jun 2020 14:22:49 +0300 [thread overview]
Message-ID: <CA+h21hqNq6Xk5bMBsB884GZdH9h4pALr7nkn8yG+a16cXqfJsg@mail.gmail.com> (raw)
In-Reply-To: <CACRpkdZvf4qnhQK=dqF4Shv0Q0nkVqTFcZS_5Zg8PrO+iCjxoQ@mail.gmail.com>
Hi Linus,
On Thu, 4 Jun 2020 at 12:17, Linus Walleij <linus.walleij@linaro.org> wrote:
>
> On Thu, Jun 4, 2020 at 2:54 AM Andrew Lunn <andrew@lunn.ch> wrote:
>
> > If spanning tree is performed in the ASIC, i don't see why there would
> > be registers to control the port status. It would do it all itself,
> > and not export these controls.
> >
> > So i would not give up on spanning tree as a way to reverse engineer
> > this.
>
> Hm I guess I have to take out the textbooks and refresh my lacking
> knowledge about spanning tree :)
>
> What I have for "documentation" is the code drop inside DD Wrt:
> https://svn.dd-wrt.com//browser/src/linux/universal/linux-3.2/drivers/net/ethernet/raeth/rb
>
> The code is a bit messy and seems hacked up by Realtek, also
> at one point apparently the ASIC was closely related to RTL8368s
> and then renamed to RTL8366RB...
>
> The code accessing the ASIC is here (under the name RTL8368s):
> https://svn.dd-wrt.com/browser/src/linux/universal/linux-3.2/drivers/net/ethernet/raeth/rb/rtl8368s_asicdrv.c
>
> I'm hacking on it but a bit stuck :/
>
> Yours,
> Linus Walleij
In the code you pointed to, there is a potentially relevant comment:
1532//CPU tag: Realtek Ethertype==0x8899(2 bytes)+protocol==0x9(4
MSB)+priority(2 bits)+reserved(4 bits)+portmask(6 LSB)
https://svn.dd-wrt.com/browser/src/linux/universal/linux-3.2/drivers/net/ethernet/raeth/rb/rtl_multicast_snooping.c#L1527
https://svn.dd-wrt.com/browser/src/linux/universal/linux-3.2/drivers/net/ethernet/raeth/rb/rtl_multicast_snooping.c#L5224
This strongly indicates to me that the insertion tag is the same as
the extraction tag.
It is completely opaque to me why in patch "[net-next PATCH 2/5] net:
dsa: rtl8366rb: Support the CPU DSA tag" you are _disabling_ the
injection of these tags via RTL8368RB_CPU_INSTAG. I think it's natural
that the switch drops these packets when CPU tag insertion is
disabled.
Thanks,
-Vladimir
next prev parent reply other threads:[~2020-06-04 11:23 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-02 20:54 [net-next PATCH 1/5] net: dsa: tag_rtl4_a: Implement Realtek 4 byte A tag Linus Walleij
2020-06-02 20:54 ` [net-next PATCH 2/5] net: dsa: rtl8366rb: Support the CPU DSA tag Linus Walleij
2020-06-02 20:54 ` [net-next PATCH 3/5] net: dsa: rtl8366: Split out default VLAN config Linus Walleij
2020-06-02 20:54 ` [net-next PATCH 4/5] net: dsa: rtl8366: VLAN 0 as disable tagging Linus Walleij
2020-06-02 20:54 ` [net-next PATCH 5/5] net: dsa: rtl8366: Use top VLANs for default Linus Walleij
2020-06-03 2:19 ` DENG Qingfang
2020-06-03 8:33 ` Linus Walleij
2020-06-02 22:48 ` [net-next PATCH 1/5] net: dsa: tag_rtl4_a: Implement Realtek 4 byte A tag David Miller
2020-06-03 8:32 ` Linus Walleij
2020-06-03 13:52 ` Andrew Lunn
2020-06-03 22:01 ` Linus Walleij
2020-06-04 0:54 ` Andrew Lunn
2020-06-04 7:52 ` Linus Walleij
2020-06-04 11:22 ` Vladimir Oltean [this message]
2020-06-17 8:06 ` Linus Walleij
2020-06-18 3:17 ` DENG Qingfang
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