[PATCH net] net: lan743x: Add set RFE read fifo threshold for PCI1x1x chips

[PATCH net] net: lan743x: Add set RFE read fifo threshold for PCI1x1x chips

[Raju Lakkaraju]

The RFE (Receive Filtering Engine) read fifo threshold hardware default should
be overwritten to 3 for PCI1x1x Rev B0 devices to prevent lockup during some
stress tests using frames that include VLAN tags.
Rev C0 and later hardware already defaults to 3.

Fixes: bb4f6bffe33c ("net: lan743x: Add PCI11010 / PCI11414 device IDs")
Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microchip.com>
---
 drivers/net/ethernet/microchip/lan743x_main.c | 17 +++++++++++++++++
 drivers/net/ethernet/microchip/lan743x_main.h |  5 +++++
 2 files changed, 22 insertions(+)

diff --git a/drivers/net/ethernet/microchip/lan743x_main.c b/drivers/net/ethernet/microchip/lan743x_main.c
index 45e209a7d083..aec2d100ab87 100644
--- a/drivers/net/ethernet/microchip/lan743x_main.c
+++ b/drivers/net/ethernet/microchip/lan743x_main.c
@@ -3272,6 +3272,22 @@ static void lan743x_full_cleanup(struct lan743x_adapter *adapter)
 	lan743x_pci_cleanup(adapter);
 }
 
+static int pci11x1x_set_rfe_rd_fifo_threshold(struct lan743x_adapter *adapter)
+{
+	u16 rev = adapter->csr.id_rev & ID_REV_CHIP_REV_MASK_;
+
+	if (rev == ID_REV_CHIP_REV_PCI11X1X_B0_) {
+		int misc_ctl;
+
+		misc_ctl = lan743x_csr_read(adapter, MISC_CTL_0);
+		misc_ctl &= ~MISC_CTL_0_RFE_READ_FIFO_MASK_;
+		misc_ctl |= (0x3 << MISC_CTL_0_RFE_READ_FIFO_SHIFT_);
+		lan743x_csr_write(adapter, MISC_CTL_0, misc_ctl);
+	}
+
+	return 0;
+}
+
 static int lan743x_hardware_init(struct lan743x_adapter *adapter,
 				 struct pci_dev *pdev)
 {
@@ -3287,6 +3303,7 @@ static int lan743x_hardware_init(struct lan743x_adapter *adapter,
 		pci11x1x_strap_get_status(adapter);
 		spin_lock_init(&adapter->eth_syslock_spinlock);
 		mutex_init(&adapter->sgmii_rw_lock);
+		pci11x1x_set_rfe_rd_fifo_threshold(adapter);
 	} else {
 		adapter->max_tx_channels = LAN743X_MAX_TX_CHANNELS;
 		adapter->used_tx_channels = LAN743X_USED_TX_CHANNELS;
diff --git a/drivers/net/ethernet/microchip/lan743x_main.h b/drivers/net/ethernet/microchip/lan743x_main.h
index be79cb0ae5af..be0fe52e2ae1 100644
--- a/drivers/net/ethernet/microchip/lan743x_main.h
+++ b/drivers/net/ethernet/microchip/lan743x_main.h
@@ -26,6 +26,7 @@
 #define ID_REV_CHIP_REV_MASK_		(0x0000FFFF)
 #define ID_REV_CHIP_REV_A0_		(0x00000000)
 #define ID_REV_CHIP_REV_B0_		(0x00000010)
+#define ID_REV_CHIP_REV_PCI11X1X_B0_	(0x000000B0)
 
 #define FPGA_REV			(0x04)
 #define FPGA_REV_GET_MINOR_(fpga_rev)	(((fpga_rev) >> 8) & 0x000000FF)
@@ -311,6 +312,10 @@
 #define SGMII_CTL_LINK_STATUS_SOURCE_	BIT(8)
 #define SGMII_CTL_SGMII_POWER_DN_	BIT(1)
 
+#define MISC_CTL_0			(0x920)
+#define MISC_CTL_0_RFE_READ_FIFO_MASK_	GENMASK(6, 4)
+#define MISC_CTL_0_RFE_READ_FIFO_SHIFT_	(4)
+
 /* Vendor Specific SGMII MMD details */
 #define SR_VSMMD_PCS_ID1		0x0004
 #define SR_VSMMD_PCS_ID2		0x0005
-- 
2.34.1

Re: [PATCH net] net: lan743x: Add set RFE read fifo threshold for PCI1x1x chips

[Simon Horman]

On Thu, Mar 07, 2024 at 02:28:23PM +0530, Raju Lakkaraju wrote:
> The RFE (Receive Filtering Engine) read fifo threshold hardware default should
> be overwritten to 3 for PCI1x1x Rev B0 devices to prevent lockup during some
> stress tests using frames that include VLAN tags.
> Rev C0 and later hardware already defaults to 3.
> 
> Fixes: bb4f6bffe33c ("net: lan743x: Add PCI11010 / PCI11414 device IDs")
> Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microchip.com>
> ---
>  drivers/net/ethernet/microchip/lan743x_main.c | 17 +++++++++++++++++
>  drivers/net/ethernet/microchip/lan743x_main.h |  5 +++++
>  2 files changed, 22 insertions(+)
> 
> diff --git a/drivers/net/ethernet/microchip/lan743x_main.c b/drivers/net/ethernet/microchip/lan743x_main.c
> index 45e209a7d083..aec2d100ab87 100644
> --- a/drivers/net/ethernet/microchip/lan743x_main.c
> +++ b/drivers/net/ethernet/microchip/lan743x_main.c
> @@ -3272,6 +3272,22 @@ static void lan743x_full_cleanup(struct lan743x_adapter *adapter)
>  	lan743x_pci_cleanup(adapter);
>  }
>  
> +static int pci11x1x_set_rfe_rd_fifo_threshold(struct lan743x_adapter *adapter)
> +{
> +	u16 rev = adapter->csr.id_rev & ID_REV_CHIP_REV_MASK_;
> +
> +	if (rev == ID_REV_CHIP_REV_PCI11X1X_B0_) {
> +		int misc_ctl;
> +
> +		misc_ctl = lan743x_csr_read(adapter, MISC_CTL_0);
> +		misc_ctl &= ~MISC_CTL_0_RFE_READ_FIFO_MASK_;
> +		misc_ctl |= (0x3 << MISC_CTL_0_RFE_READ_FIFO_SHIFT_);
> +		lan743x_csr_write(adapter, MISC_CTL_0, misc_ctl);

Hi Raju,

Some minor nits from my side:

- misc_ctl could be an unsigned integer
- The above could probably use FIELD_PREP, which in turn
  probably means that MISC_CTL_0_RFE_READ_FIFO_SHIFT_ isn't needed
- 0x3 could be a #define - what does it mean?

> +	}
> +
> +	return 0;
> +}
> +
>  static int lan743x_hardware_init(struct lan743x_adapter *adapter,
>  				 struct pci_dev *pdev)
>  {

...

RE: [PATCH net] net: lan743x: Add set RFE read fifo threshold for PCI1x1x chips

[Raju.Lakkaraju]

Hi Simon Horman,

Thank you for review comments.

> -----Original Message-----
> From: Simon Horman <horms@kernel.org>
> Sent: Saturday, March 9, 2024 12:58 AM
> To: Raju Lakkaraju - I30499 <Raju.Lakkaraju@microchip.com>
> Cc: netdev@vger.kernel.org; davem@davemloft.net; kuba@kernel.org;
> pabeni@redhat.com; edumazet@google.com; linux-kernel@vger.kernel.org;
> Bryan Whitehead - C21958 <Bryan.Whitehead@microchip.com>;
> UNGLinuxDriver <UNGLinuxDriver@microchip.com>
> Subject: Re: [PATCH net] net: lan743x: Add set RFE read fifo threshold for
> PCI1x1x chips
> 
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
> 
> On Thu, Mar 07, 2024 at 02:28:23PM +0530, Raju Lakkaraju wrote:
> > The RFE (Receive Filtering Engine) read fifo threshold hardware
> > default should be overwritten to 3 for PCI1x1x Rev B0 devices to
> > prevent lockup during some stress tests using frames that include VLAN
> tags.
> > Rev C0 and later hardware already defaults to 3.
> >
> > Fixes: bb4f6bffe33c ("net: lan743x: Add PCI11010 / PCI11414 device
> > IDs")
> > Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microchip.com>
> > ---
> >  drivers/net/ethernet/microchip/lan743x_main.c | 17 +++++++++++++++++
> > drivers/net/ethernet/microchip/lan743x_main.h |  5 +++++
> >  2 files changed, 22 insertions(+)
> >
> > diff --git a/drivers/net/ethernet/microchip/lan743x_main.c
> > b/drivers/net/ethernet/microchip/lan743x_main.c
> > index 45e209a7d083..aec2d100ab87 100644
> > --- a/drivers/net/ethernet/microchip/lan743x_main.c
> > +++ b/drivers/net/ethernet/microchip/lan743x_main.c
> > @@ -3272,6 +3272,22 @@ static void lan743x_full_cleanup(struct
> lan743x_adapter *adapter)
> >       lan743x_pci_cleanup(adapter);
> >  }
> >
> > +static int pci11x1x_set_rfe_rd_fifo_threshold(struct lan743x_adapter
> > +*adapter) {
> > +     u16 rev = adapter->csr.id_rev & ID_REV_CHIP_REV_MASK_;
> > +
> > +     if (rev == ID_REV_CHIP_REV_PCI11X1X_B0_) {
> > +             int misc_ctl;
> > +
> > +             misc_ctl = lan743x_csr_read(adapter, MISC_CTL_0);
> > +             misc_ctl &= ~MISC_CTL_0_RFE_READ_FIFO_MASK_;
> > +             misc_ctl |= (0x3 << MISC_CTL_0_RFE_READ_FIFO_SHIFT_);
> > +             lan743x_csr_write(adapter, MISC_CTL_0, misc_ctl);
> 
> Hi Raju,
> 
> Some minor nits from my side:
> 
> - misc_ctl could be an unsigned integer

Ok.

> - The above could probably use FIELD_PREP, which in turn
>   probably means that MISC_CTL_0_RFE_READ_FIFO_SHIFT_ isn't needed

Ok. I will change

> - 0x3 could be a #define - what does it mean?
0x3 is empirical value of "Receive Filtering Engine read fifo threshold" hardware value for PCI11X1X Rev B0 chips
I will add the same comment there.

> 
> > +     }
> > +
> > +     return 0;
> > +}
> > +
> >  static int lan743x_hardware_init(struct lan743x_adapter *adapter,
> >                                struct pci_dev *pdev)  {
> 
> ...

Thanks,
Raju