From: Sergey Shtylyov <s.shtylyov@omp.ru>
To: Phil Edworthy <phil.edworthy@renesas.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
<netdev@vger.kernel.org>, <linux-renesas-soc@vger.kernel.org>
Subject: Re: [PATCH 4/9] ravb: Separate handling of irq enable/disable regs into feature
Date: Wed, 4 May 2022 22:54:30 +0300 [thread overview]
Message-ID: <d260937a-63bd-e3af-a032-c0b8848a4025@omp.ru> (raw)
In-Reply-To: <20220504145454.71287-5-phil.edworthy@renesas.com>
On 5/4/22 5:54 PM, Phil Edworthy wrote:
> Currently, when the HW has a single interrupt, the driver uses the
> TIC, RIC0 registers to enable and disable RX/TX interrupts. When
> the HW has multiple interrupts, it uses the TIE, TID, RIE0, RID0
> registers.
>
> However, other devices, e.g. RZ/V2M, have multiple irqs and use
> the TIC, RIC0 registers.
s/use/have only/?
> Therefore, split this into a separate feature.
>
> Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> drivers/net/ethernet/renesas/ravb.h | 1 +
> drivers/net/ethernet/renesas/ravb_main.c | 5 +++--
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h
> index 15aa09d93ff0..67a240665cd2 100644
> --- a/drivers/net/ethernet/renesas/ravb.h
> +++ b/drivers/net/ethernet/renesas/ravb.h
> @@ -1027,6 +1027,7 @@ struct ravb_hw_info {
> unsigned tx_counters:1; /* E-MAC has TX counters */
> unsigned carrier_counters:1; /* E-MAC has carrier counters */
> unsigned multi_irqs:1; /* AVB-DMAC and E-MAC has multiple irqs */
> + unsigned irq_en_dis_regs:1; /* Has separate irq enable and disable regs */
Perhaps just irq_en_dis?
> unsigned gptp:1; /* AVB-DMAC has gPTP support */
> unsigned ccc_gac:1; /* AVB-DMAC has gPTP support active in config mode */
> unsigned gptp_ptm_gic:1; /* gPTP enables Presentation Time Match irq via GIC */
[...]
MBR, Sergey
next prev parent reply other threads:[~2022-05-04 19:54 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-04 14:54 [PATCH 0/9] Add Renesas RZ/V2M Ethernet support Phil Edworthy
2022-05-04 14:54 ` [PATCH 2/9] dt-bindings: net: renesas,etheravb: Document RZ/V2M SoC Phil Edworthy
2022-05-07 18:21 ` Sergey Shtylyov
2022-05-09 8:15 ` Phil Edworthy
2022-05-04 14:54 ` [PATCH 3/9] ravb: Separate use of GIC reg for PTME from multi_irqs Phil Edworthy
2022-05-04 20:40 ` Sergey Shtylyov
2022-05-05 8:26 ` Phil Edworthy
2022-05-04 14:54 ` [PATCH 4/9] ravb: Separate handling of irq enable/disable regs into feature Phil Edworthy
2022-05-04 19:54 ` Sergey Shtylyov [this message]
2022-05-05 8:12 ` Phil Edworthy
2022-05-04 14:54 ` [PATCH 5/9] ravb: Support separate Line0 (Desc), Line1 (Err) and Line2 (Mgmt) irqs Phil Edworthy
2022-05-05 19:40 ` Sergey Shtylyov
2022-05-09 8:00 ` Phil Edworthy
2022-05-04 14:54 ` [PATCH 6/9] ravb: Use separate clock for gPTP Phil Edworthy
2022-05-05 18:13 ` Sergey Shtylyov
2022-05-04 14:54 ` [PATCH 7/9] ravb: Add support for RZ/V2M Phil Edworthy
2022-05-05 20:18 ` Sergey Shtylyov
2022-05-09 7:01 ` Phil Edworthy
2022-05-05 0:57 ` [PATCH 0/9] Add Renesas RZ/V2M Ethernet support Jakub Kicinski
2022-05-05 6:59 ` Geert Uytterhoeven
2022-05-05 9:14 ` Phil Edworthy
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