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From: Liang Xu <lxu@maxlinear.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: "hkallweit1@gmail.com" <hkallweit1@gmail.com>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	"davem@davemloft.net" <davem@davemloft.net>,
	"kuba@kernel.org" <kuba@kernel.org>,
	"vee.khee.wong@linux.intel.com" <vee.khee.wong@linux.intel.com>,
	"linux@armlinux.org.uk" <linux@armlinux.org.uk>,
	Hauke Mehrtens <hmehrtens@maxlinear.com>,
	Thomas Mohren <tmohren@maxlinear.com>
Subject: Re: [PATCH v2] net: phy: add Maxlinear GPY115/21x/24x driver
Date: Mon, 7 Jun 2021 04:04:38 +0000	[thread overview]
Message-ID: <f329dca8-9962-0b43-eaa7-cbed838d5dc0@maxlinear.com> (raw)
In-Reply-To: <YLuMDyg2IIpalOIo@lunn.ch>

On 5/6/2021 10:37 pm, Andrew Lunn wrote:
> This email was sent from outside of MaxLinear.
>
>
> On Sat, Jun 05, 2021 at 03:46:18AM +0000, Liang Xu wrote:
>> On 5/6/2021 4:39 am, Andrew Lunn wrote:
>>> This email was sent from outside of MaxLinear.
>>>
>>>
>>> On Fri, Jun 04, 2021 at 12:52:02PM +0000, Liang Xu wrote:
>>>> On 4/6/2021 8:15 pm, Andrew Lunn wrote:
>>>>> This email was sent from outside of MaxLinear.
>>>>>
>>>>>
>>>>>> +config MXL_GPHY
>>>>>> +     tristate "Maxlinear PHYs"
>>>>>> +     help
>>>>>> +       Support for the Maxlinear GPY115, GPY211, GPY212, GPY215,
>>>>>> +       GPY241, GPY245 PHYs.
>>>>> Do these PHYs have unique IDs in register 2 and 3? What is the format
>>>>> of these IDs?
>>>>>
>>>>> The OUI is fixed. But often the rest is split into two. The higher
>>>>> part indicates the product, and the lower part is the revision. We
>>>>> then have a struct phy_driver for each product, and the mask is used
>>>>> to match on all the revisions of the product.
>>>>>
>>>>>         Andrew
>>>>>
>>>> Register 2, Register 3 bit 10~15 - OUI
>>>>
>>>> Register 3 bit 4~9 - product number
>>>>
>>>> Register 3 bit 0~3 - revision number
>>>>
>> These PHYs have same ID and no difference OUI, product number, revision
>> number.
> Are you saying GPY115, GPY211, GPY212, GPY215, GPY241, GPY245 all have
> the same product number?
>
> Normally, each PHY has its own product ID, and so we have:
>
> /* Vitesse 82xx */
> static struct phy_driver vsc82xx_driver[] = {
> {
>          .phy_id         = PHY_ID_VSC8234,
>          .name           = "Vitesse VSC8234",
>          .phy_id_mask    = 0x000ffff0,
>          /* PHY_GBIT_FEATURES */
>          .config_init    = &vsc824x_config_init,
>          .config_aneg    = &vsc82x4_config_aneg,
>          .config_intr    = &vsc82xx_config_intr,
>          .handle_interrupt = &vsc82xx_handle_interrupt,
> }, {
>          .phy_id         = PHY_ID_VSC8244,
>          .name           = "Vitesse VSC8244",
>          .phy_id_mask    = 0x000fffc0,
>          /* PHY_GBIT_FEATURES */
>          .config_init    = &vsc824x_config_init,
>          .config_aneg    = &vsc82x4_config_aneg,
>          .config_intr    = &vsc82xx_config_intr,
>          .handle_interrupt = &vsc82xx_handle_interrupt,
> }, {
>          .phy_id         = PHY_ID_VSC8572,
>          .name           = "Vitesse VSC8572",
>          .phy_id_mask    = 0x000ffff0,
>          /* PHY_GBIT_FEATURES */
>          .config_init    = &vsc824x_config_init,
>          .config_aneg    = &vsc82x4_config_aneg,
>          .config_intr    = &vsc82xx_config_intr,
>          .handle_interrupt = &vsc82xx_handle_interrupt,
> }, {
>
> one entry to describe one PHY.
>
>      Andrew
>
Yes, they all have same product number.

They are one IP.

The difference is feature set it's enabled by fusing in silicon.

For example, GPY115 has 10/100/1000Mbps support, so in the ability 
register 2.5G capable is 0.

GPY211 has 10/100/1000/2500Mbps support, so in the capability register 
2.5G capable is 1.



  reply	other threads:[~2021-06-07  4:04 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-03  7:34 [PATCH v2] net: phy: add Maxlinear GPY115/21x/24x driver Xu Liang
2021-06-03  9:17 ` Russell King (Oracle)
2021-06-03 10:36   ` Liang Xu
2021-06-03 15:10   ` Liang Xu
2021-06-03 15:21     ` Andrew Lunn
2021-06-03 15:32       ` Liang Xu
2021-06-03 17:05         ` Andrew Lunn
2021-06-03 17:54           ` Liang Xu
2021-06-04 12:09             ` Andrew Lunn
2021-06-04 12:39               ` Liang Xu
2021-06-04 12:15 ` Andrew Lunn
2021-06-04 12:52   ` Liang Xu
2021-06-04 20:39     ` Andrew Lunn
2021-06-05  3:46       ` Liang Xu
2021-06-05 14:37         ` Andrew Lunn
2021-06-07  4:04           ` Liang Xu [this message]
2021-06-07 12:15             ` Andrew Lunn
2021-06-07 13:28               ` Liang Xu

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