* [PATCH linux dev-4.17] ARM: dts: aspeed-g4: Expose SuperIO scratch registers
@ 2018-07-12 6:17 Joel Stanley
2018-07-12 6:25 ` Andrew Jeffery
0 siblings, 1 reply; 2+ messages in thread
From: Joel Stanley @ 2018-07-12 6:17 UTC (permalink / raw)
To: openbmc; +Cc: Andrew Jeffery
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
arch/arm/boot/dts/aspeed-g4.dtsi | 87 ++++++++++++++++++++++++++++++++
1 file changed, 87 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index e86fa80712e5..6af12872ee74 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -316,6 +316,10 @@
interrupts = <8>;
};
+ sio_regs: regs {
+ compatible = "aspeed,bmc-misc";
+ };
+
mbox: mbox@180 {
compatible = "aspeed,ast2400-mbox";
reg = <0x180 0x5c>;
@@ -1366,3 +1370,86 @@
groups = "WDTRST2";
};
};
+
+&sio_regs {
+ sio_2b {
+ offset = <0xf0>;
+ bit-mask = <0xff>;
+ bit-shift = <24>;
+ };
+ sio_2a {
+ offset = <0xf0>;
+ bit-mask = <0xff>;
+ bit-shift = <16>;
+ };
+ sio_29 {
+ offset = <0xf0>;
+ bit-mask = <0xff>;
+ bit-shift = <8>;
+ };
+ sio_28 {
+ offset = <0xf0>;
+ bit-mask = <0xff>;
+ bit-shift = <0>;
+ };
+ sio_2f {
+ offset = <0xf4>;
+ bit-mask = <0xff>;
+ bit-shift = <24>;
+ };
+ sio_2e {
+ offset = <0xf4>;
+ bit-mask = <0xff>;
+ bit-shift = <16>;
+ };
+ sio_2d {
+ offset = <0xf4>;
+ bit-mask = <0xff>;
+ bit-shift = <8>;
+ };
+ sio_2c {
+ offset = <0xf4>;
+ bit-mask = <0xff>;
+ bit-shift = <0>;
+ };
+ sio_23 {
+ offset = <0xf8>;
+ bit-mask = <0xff>;
+ bit-shift = <24>;
+ };
+ sio_22 {
+ offset = <0xf8>;
+ bit-mask = <0xff>;
+ bit-shift = <16>;
+ };
+ sio_21 {
+ offset = <0xf8>;
+ bit-mask = <0xff>;
+ bit-shift = <8>;
+ };
+ sio_20 {
+ offset = <0xf8>;
+ bit-mask = <0xff>;
+ bit-shift = <0>;
+ };
+ sio_27 {
+ offset = <0xfc>;
+ bit-mask = <0xff>;
+ bit-shift = <24>;
+ };
+ sio_26 {
+ offset = <0xfc>;
+ bit-mask = <0xff>;
+ bit-shift = <16>;
+ };
+ sio_25 {
+ offset = <0xfc>;
+ bit-mask = <0xff>;
+ bit-shift = <8>;
+ };
+ sio_24 {
+ offset = <0xfc>;
+ bit-mask = <0xff>;
+ bit-shift = <0>;
+ };
+};
--
2.17.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH linux dev-4.17] ARM: dts: aspeed-g4: Expose SuperIO scratch registers
2018-07-12 6:17 [PATCH linux dev-4.17] ARM: dts: aspeed-g4: Expose SuperIO scratch registers Joel Stanley
@ 2018-07-12 6:25 ` Andrew Jeffery
0 siblings, 0 replies; 2+ messages in thread
From: Andrew Jeffery @ 2018-07-12 6:25 UTC (permalink / raw)
To: Joel Stanley, openbmc
On Thu, 12 Jul 2018, at 15:47, Joel Stanley wrote:
> Signed-off-by: Joel Stanley <joel@jms.id.au>
I'm breaking this with what I'm proposing upstream, but we'll work around that given the g5 already has this gunk.
Acked-by: Andrew Jeffery <andrew@aj.id.au>
> ---
> arch/arm/boot/dts/aspeed-g4.dtsi | 87 ++++++++++++++++++++++++++++++++
> 1 file changed, 87 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
> index e86fa80712e5..6af12872ee74 100644
> --- a/arch/arm/boot/dts/aspeed-g4.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi
> @@ -316,6 +316,10 @@
> interrupts = <8>;
> };
>
> + sio_regs: regs {
> + compatible = "aspeed,bmc-misc";
> + };
> +
> mbox: mbox@180 {
> compatible = "aspeed,ast2400-mbox";
> reg = <0x180 0x5c>;
> @@ -1366,3 +1370,86 @@
> groups = "WDTRST2";
> };
> };
> +
> +&sio_regs {
> + sio_2b {
> + offset = <0xf0>;
> + bit-mask = <0xff>;
> + bit-shift = <24>;
> + };
> + sio_2a {
> + offset = <0xf0>;
> + bit-mask = <0xff>;
> + bit-shift = <16>;
> + };
> + sio_29 {
> + offset = <0xf0>;
> + bit-mask = <0xff>;
> + bit-shift = <8>;
> + };
> + sio_28 {
> + offset = <0xf0>;
> + bit-mask = <0xff>;
> + bit-shift = <0>;
> + };
> + sio_2f {
> + offset = <0xf4>;
> + bit-mask = <0xff>;
> + bit-shift = <24>;
> + };
> + sio_2e {
> + offset = <0xf4>;
> + bit-mask = <0xff>;
> + bit-shift = <16>;
> + };
> + sio_2d {
> + offset = <0xf4>;
> + bit-mask = <0xff>;
> + bit-shift = <8>;
> + };
> + sio_2c {
> + offset = <0xf4>;
> + bit-mask = <0xff>;
> + bit-shift = <0>;
> + };
> + sio_23 {
> + offset = <0xf8>;
> + bit-mask = <0xff>;
> + bit-shift = <24>;
> + };
> + sio_22 {
> + offset = <0xf8>;
> + bit-mask = <0xff>;
> + bit-shift = <16>;
> + };
> + sio_21 {
> + offset = <0xf8>;
> + bit-mask = <0xff>;
> + bit-shift = <8>;
> + };
> + sio_20 {
> + offset = <0xf8>;
> + bit-mask = <0xff>;
> + bit-shift = <0>;
> + };
> + sio_27 {
> + offset = <0xfc>;
> + bit-mask = <0xff>;
> + bit-shift = <24>;
> + };
> + sio_26 {
> + offset = <0xfc>;
> + bit-mask = <0xff>;
> + bit-shift = <16>;
> + };
> + sio_25 {
> + offset = <0xfc>;
> + bit-mask = <0xff>;
> + bit-shift = <8>;
> + };
> + sio_24 {
> + offset = <0xfc>;
> + bit-mask = <0xff>;
> + bit-shift = <0>;
> + };
> +};
> --
> 2.17.1
>
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