[PATCHv2 linux dev-4.17 0/7] mmc/host: Add Aspeed SDIO driver

[PATCHv2 linux dev-4.17 0/7] mmc/host: Add Aspeed SDIO driver

[Ryan Chen]

This series implements Aspeed SDIO driver. In Aspeed SDIO controller
with two slots and have a global register for interrupt status and other
general information.

v2 
Change irqchip driver(irq-aspeed-sdhci-ic.c) to aspeed sdhci core driver
aspeed-sdhci-core.c

v0
For implements this, it will have have irq-aspeed-sdhci-ic.c for sdhci
each slot irq dispatch, and then go to sdhci driver handle (sdhci.c).

Another is sdhci-of-aspeed.c for specific function call.


Ryan Chen


Ryan Chen (7):
  clk: Aspeed: Modify clk-aspeed.c driver probe sequence
  clk: Aspeed: Add sdhci reset and clock
  mmc: Aspeed: Add Aspeed sdhci core driver
  mmc: Aspeed: Add driver for Aspeed sdhci
  dts: Aspeed: Add devicetree for Aspeed sdhci
  Documentation: mmc: add aspeed sdhci binding document
  configs: Aspeed: enable mmc host in defconfig

 .../bindings/mmc/aspeed,aspeed-sdhci.txt           |  54 +++++++
 arch/arm/boot/dts/aspeed-ast2500-evb.dts           |  14 ++
 arch/arm/boot/dts/aspeed-g4.dtsi                   |  40 +++++
 arch/arm/boot/dts/aspeed-g5.dtsi                   |  40 +++++
 arch/arm/configs/aspeed_g5_defconfig               |   6 +
 drivers/clk/clk-aspeed.c                           |  51 +++---
 drivers/irqchip/Makefile                           |   2 +-
 drivers/mmc/host/Kconfig                           |  12 ++
 drivers/mmc/host/Makefile                          |   1 +
 drivers/mmc/host/aspeed-sdhci-core.c               | 147 +++++++++++++++++
 drivers/mmc/host/sdhci-of-aspeed.c                 | 178 +++++++++++++++++++++
 include/dt-bindings/clock/aspeed-clock.h           |   2 +-
 include/linux/mmc/sdhci-aspeed-data.h              |  28 ++++
 13 files changed, 553 insertions(+), 22 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mmc/aspeed,aspeed-sdhci.txt
 create mode 100644 drivers/mmc/host/aspeed-sdhci-core.c
 create mode 100644 drivers/mmc/host/sdhci-of-aspeed.c
 create mode 100644 include/linux/mmc/sdhci-aspeed-data.h

-- 
2.7.4

[PATCH linux dev-4.17 1/7] clk: Aspeed: Modify clk-aspeed.c driver probe sequence

[Ryan Chen]

In Aspeed's SoC, all IP clk gating and pll parameter is in scu
controller, before IP driver probe, scu driver need prepare for it.
So buildin_platform_driver to core_initcall.

Signed-off-by: Ryan Chen <ryanchen.aspeed@gmail.com>
---
 drivers/clk/clk-aspeed.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/clk-aspeed.c b/drivers/clk/clk-aspeed.c
index 8796b8a..9e55743 100644
--- a/drivers/clk/clk-aspeed.c
+++ b/drivers/clk/clk-aspeed.c
@@ -573,7 +573,12 @@ static struct platform_driver aspeed_clk_driver = {
 		.suppress_bind_attrs = true,
 	},
 };
-builtin_platform_driver(aspeed_clk_driver);
+
+static int __init aspeed_clk_init(void)
+{
+	return platform_driver_register(&aspeed_clk_driver);
+}
+core_initcall(aspeed_clk_init);
 
 static void __init aspeed_ast2400_cc(struct regmap *map)
 {
-- 
2.7.4

[PATCH linux dev-4.17 2/7] clk: Aspeed: Add sdhci reset and clock

[Ryan Chen]

1.Add Aspeed sdhci reset for SCU04 bit 16
2.Aspeed sdhci have two clock one is for controller clock,
another is for SD card clock. so when enable sdhci need enable
both.

v0->V2
Use aspeed_resets[ASPEED_RESET_SDHCI] replace the maginc number 16
move aspeed_resets in front of aspeed_clk_enable function

Signed-off-by: Ryan Chen <ryanchen.aspeed@gmail.com>
---
 drivers/clk/clk-aspeed.c                 | 44 ++++++++++++++++++--------------
 include/dt-bindings/clock/aspeed-clock.h |  2 +-
 2 files changed, 26 insertions(+), 20 deletions(-)

diff --git a/drivers/clk/clk-aspeed.c b/drivers/clk/clk-aspeed.c
index 9e55743..f399da2 100644
--- a/drivers/clk/clk-aspeed.c
+++ b/drivers/clk/clk-aspeed.c
@@ -20,6 +20,7 @@
 
 #define ASPEED_RESET_CTRL	0x04
 #define ASPEED_CLK_SELECTION	0x08
+#define  ASPEED_SDIO_CLK_EN BIT(15)
 #define ASPEED_CLK_STOP_CTRL	0x0c
 #define ASPEED_MPLL_PARAM	0x20
 #define ASPEED_HPLL_PARAM	0x24
@@ -208,6 +209,25 @@ static const struct aspeed_clk_soc_data ast2400_data = {
 	.calc_pll = aspeed_ast2400_calc_pll,
 };
 
+static const u8 aspeed_resets[] = {
+	/* SCU04 resets */
+	[ASPEED_RESET_XDMA]	= 25,
+	[ASPEED_RESET_MCTP]	= 24,
+	[ASPEED_RESET_ADC]	= 23,
+	[ASPEED_RESET_JTAG_MASTER] = 22,
+	[ASPEED_RESET_MIC]	= 18,
+	[ASPEED_RESET_PWM]	=  9,
+	[ASPEED_RESET_PECI]	= 10,
+	[ASPEED_RESET_I2C]	=  2,
+	[ASPEED_RESET_AHB]	=  1,
+	[ASPEED_RESET_SDHCI]	= 16,
+	/*
+	 * SCUD4 resets start at an offset to separate them from
+	 * the SCU04 resets.
+	 */
+	[ASPEED_RESET_CRT1]	= ASPEED_RESET2_OFFSET + 5,
+};
+
 static int aspeed_clk_is_enabled(struct clk_hw *hw)
 {
 	struct aspeed_clk_gate *gate = to_aspeed_clk_gate(hw);
@@ -260,6 +280,11 @@ static int aspeed_clk_enable(struct clk_hw *hw)
 	enval = (gate->flags & CLK_GATE_SET_TO_DISABLE) ? 0 : clk;
 	regmap_update_bits(gate->map, ASPEED_CLK_STOP_CTRL, clk, enval);
 
+	/* sd ext clk */
+	if (gate->reset_idx == aspeed_resets[ASPEED_RESET_SDHCI]) {
+		regmap_update_bits(gate->map, ASPEED_CLK_SELECTION, ASPEED_SDIO_CLK_EN, ASPEED_SDIO_CLK_EN);
+	}
+
 	if (gate->reset_idx >= 0) {
 		/* A delay of 10ms is specified by the ASPEED docs */
 		mdelay(10);
@@ -306,25 +331,6 @@ struct aspeed_reset {
 
 #define to_aspeed_reset(p) container_of((p), struct aspeed_reset, rcdev)
 
-static const u8 aspeed_resets[] = {
-	/* SCU04 resets */
-	[ASPEED_RESET_XDMA]	= 25,
-	[ASPEED_RESET_MCTP]	= 24,
-	[ASPEED_RESET_ADC]	= 23,
-	[ASPEED_RESET_JTAG_MASTER] = 22,
-	[ASPEED_RESET_MIC]	= 18,
-	[ASPEED_RESET_PWM]	=  9,
-	[ASPEED_RESET_PECI]	= 10,
-	[ASPEED_RESET_I2C]	=  2,
-	[ASPEED_RESET_AHB]	=  1,
-
-	/*
-	 * SCUD4 resets start at an offset to separate them from
-	 * the SCU04 resets.
-	 */
-	[ASPEED_RESET_CRT1]	= ASPEED_RESET2_OFFSET + 5,
-};
-
 static int aspeed_reset_deassert(struct reset_controller_dev *rcdev,
 				 unsigned long id)
 {
diff --git a/include/dt-bindings/clock/aspeed-clock.h b/include/dt-bindings/clock/aspeed-clock.h
index 4476184..088553f 100644
--- a/include/dt-bindings/clock/aspeed-clock.h
+++ b/include/dt-bindings/clock/aspeed-clock.h
@@ -50,5 +50,5 @@
 #define ASPEED_RESET_I2C		7
 #define ASPEED_RESET_AHB		8
 #define ASPEED_RESET_CRT1		9
-
+#define ASPEED_RESET_SDHCI		10
 #endif
-- 
2.7.4

[PATCH linux dev-4.17 3/7] mmc: Aspeed: Add Aspeed sdhci core driver

[Ryan Chen]

In Aspeed SoC's sdhci have two slots and have a interrupt status and
general information in top for register. add sdhci core driver
defore sdhci driver probe

V0->V1
move irqchip/irq-aspeed-sdhci-ic.c to drivers/mmc/host/aspeed-sdhci-core.c

Signed-off-by: Ryan Chen <ryanchen.aspeed@gmail.com>
---
 drivers/irqchip/Makefile              |   2 +-
 drivers/mmc/host/Makefile             |   1 +
 drivers/mmc/host/aspeed-sdhci-core.c  | 147 ++++++++++++++++++++++++++++++++++
 include/linux/mmc/sdhci-aspeed-data.h |  28 +++++++
 4 files changed, 177 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mmc/host/aspeed-sdhci-core.c
 create mode 100644 include/linux/mmc/sdhci-aspeed-data.h

diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 5ed465a..d99cb1d 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -78,7 +78,7 @@ obj-$(CONFIG_MVEBU_ODMI)		+= irq-mvebu-odmi.o
 obj-$(CONFIG_MVEBU_PIC)			+= irq-mvebu-pic.o
 obj-$(CONFIG_LS_SCFG_MSI)		+= irq-ls-scfg-msi.o
 obj-$(CONFIG_EZNPS_GIC)			+= irq-eznps.o
-obj-$(CONFIG_ARCH_ASPEED)		+= irq-aspeed-vic.o irq-aspeed-i2c-ic.o
+obj-$(CONFIG_ARCH_ASPEED)		+= irq-aspeed-vic.o irq-aspeed-i2c-ic.o 
 obj-$(CONFIG_STM32_EXTI) 		+= irq-stm32-exti.o
 obj-$(CONFIG_QCOM_IRQ_COMBINER)		+= qcom-irq-combiner.o
 obj-$(CONFIG_IRQ_UNIPHIER_AIDET)	+= irq-uniphier-aidet.o
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index 6aead24..c3e5a1f 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -78,6 +78,7 @@ obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX)	+= sdhci-esdhc-imx.o
 obj-$(CONFIG_MMC_SDHCI_DOVE)		+= sdhci-dove.o
 obj-$(CONFIG_MMC_SDHCI_TEGRA)		+= sdhci-tegra.o
 obj-$(CONFIG_MMC_SDHCI_OF_ARASAN)	+= sdhci-of-arasan.o
+obj-$(CONFIG_MMC_SDHCI_OF_ASPEED)	+= aspeed-sdhci-core.o
 obj-$(CONFIG_MMC_SDHCI_OF_AT91)		+= sdhci-of-at91.o
 obj-$(CONFIG_MMC_SDHCI_OF_ESDHC)	+= sdhci-of-esdhc.o
 obj-$(CONFIG_MMC_SDHCI_OF_HLWD)		+= sdhci-of-hlwd.o
diff --git a/drivers/mmc/host/aspeed-sdhci-core.c b/drivers/mmc/host/aspeed-sdhci-core.c
new file mode 100644
index 0000000..c3d9d45
--- /dev/null
+++ b/drivers/mmc/host/aspeed-sdhci-core.c
@@ -0,0 +1,147 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * SDHCI IRQCHIP driver for the Aspeed SoC
+ *
+ * Copyright (C) ASPEED Technology Inc.
+ * Ryan Chen <ryan_chen@aspeedtech.com>
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/irqchip.h>
+#include <linux/irqchip/chained_irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/mmc/sdhci-aspeed-data.h>
+
+#define ASPEED_SDHCI_SLOT_NUM			2
+
+static void aspeed_sdhci_irq_handler(struct irq_desc *desc)
+{
+	struct aspeed_sdhci_irq *sdhci_irq = irq_desc_get_handler_data(desc);
+	struct irq_chip *chip = irq_desc_get_chip(desc);
+	unsigned long bit, status;
+	unsigned int slot_irq;
+
+	chained_irq_enter(chip, desc);
+	status = readl(sdhci_irq->regs + ASPEED_SDHCI_ISR);
+	for_each_set_bit(bit, &status, ASPEED_SDHCI_SLOT_NUM) {
+		slot_irq = irq_find_mapping(sdhci_irq->irq_domain, bit);
+		generic_handle_irq(slot_irq);
+	}
+	chained_irq_exit(chip, desc);
+}
+
+static void noop(struct irq_data *data) { }
+
+static unsigned int noop_ret(struct irq_data *data)
+{
+	return 0;
+}
+
+struct irq_chip sdhci_irq_chip = {
+	.name		= "sdhci-ic",
+	.irq_startup	= noop_ret,
+	.irq_shutdown	= noop,
+	.irq_enable	= noop,
+	.irq_disable	= noop,
+	.irq_ack	= noop,
+	.irq_mask	= noop,
+	.irq_unmask	= noop,
+	.flags		= IRQCHIP_SKIP_SET_WAKE,
+};
+
+static int ast_sdhci_map_irq_domain(struct irq_domain *domain,
+				    unsigned int irq, irq_hw_number_t hwirq)
+{
+	irq_set_chip_and_handler(irq, &sdhci_irq_chip, handle_simple_irq);
+	irq_set_chip_data(irq, domain->host_data);
+
+	return 0;
+}
+
+static const struct irq_domain_ops aspeed_sdhci_irq_domain_ops = {
+	.map = ast_sdhci_map_irq_domain,
+};
+
+static int irq_aspeed_sdhci_probe(struct platform_device *pdev)
+{
+	struct aspeed_sdhci_irq *sdhci_irq;
+	struct clk *sdclk;
+
+	sdhci_irq = kzalloc(sizeof(*sdhci_irq), GFP_KERNEL);
+	if (!sdhci_irq)
+		return -ENOMEM;
+
+	platform_set_drvdata(pdev, sdhci_irq);
+	//node->data = sdhci_irq;
+	pdev->dev.of_node->data = sdhci_irq;
+
+	sdhci_irq->regs = of_iomap(pdev->dev.of_node, 0);
+	if (IS_ERR(sdhci_irq->regs))
+		return PTR_ERR(sdhci_irq->regs);
+
+	sdclk = devm_clk_get(&pdev->dev, NULL);
+	if (IS_ERR(sdclk)) {
+		dev_err(&pdev->dev, "no sdclk clock defined\n");
+		return PTR_ERR(sdclk);
+	}
+
+	clk_prepare_enable(sdclk);
+
+	sdhci_irq->parent_irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
+	if (sdhci_irq->parent_irq < 0)
+		return sdhci_irq->parent_irq;
+
+	sdhci_irq->irq_domain = irq_domain_add_linear(
+					pdev->dev.of_node, ASPEED_SDHCI_SLOT_NUM,
+					&aspeed_sdhci_irq_domain_ops, NULL);
+	if (!sdhci_irq->irq_domain)
+		return -ENOMEM;
+
+	sdhci_irq->irq_domain->name = "aspeed-sdhci-irq";
+
+	irq_set_chained_handler_and_data(sdhci_irq->parent_irq,
+					 aspeed_sdhci_irq_handler, sdhci_irq);
+
+	pr_info("sdhci irq controller registered, irq %d\n", sdhci_irq->parent_irq);
+
+	return 0;
+}
+
+static const struct of_device_id irq_aspeed_sdhci_dt_ids[] = {
+	{ .compatible = "aspeed,aspeed-sdhci-irq", },
+	{},
+};
+MODULE_DEVICE_TABLE(of, irq_aspeed_sdhci_dt_ids);
+
+static struct platform_driver irq_aspeed_sdhci_device_driver = {
+	.probe		= irq_aspeed_sdhci_probe,
+	.driver		= {
+		.name   = KBUILD_MODNAME,
+		.of_match_table	= irq_aspeed_sdhci_dt_ids,
+	}
+};
+
+static int __init irq_aspeed_sdhci_init(void)
+{
+	return platform_driver_register(&irq_aspeed_sdhci_device_driver);
+}
+core_initcall(irq_aspeed_sdhci_init);
+
+MODULE_AUTHOR("Ryan Chen");
+MODULE_DESCRIPTION("ASPEED SOC SDHCI IRQ Driver");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/mmc/sdhci-aspeed-data.h b/include/linux/mmc/sdhci-aspeed-data.h
new file mode 100644
index 0000000..fba2bf2
--- /dev/null
+++ b/include/linux/mmc/sdhci-aspeed-data.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef LINUX_MMC_SDHCI_ASPEED_DATA_H
+#define LINUX_MMC_SDHCI_ASPEED_DATA_H
+
+#include <linux/io.h>
+
+#define ASPEED_SDHCI_INFO			0x00
+#define  ASPEED_SDHCI_S1MMC8			BIT(25)
+#define  ASPEED_SDHCI_S0MMC8			BIT(24)
+#define ASPEED_SDHCI_BLOCK			0x04
+#define ASPEED_SDHCI_CTRL			0xF0
+#define ASPEED_SDHCI_ISR			0xFC
+
+struct aspeed_sdhci_irq {
+	void __iomem *regs;
+	int parent_irq;
+	struct irq_domain *irq_domain;
+};
+
+static inline void aspeed_sdhci_set_8bit_mode(struct aspeed_sdhci_irq *sdhci_irq, int mode)
+{
+	if (mode)
+		writel(ASPEED_SDHCI_S0MMC8 | readl(sdhci_irq->regs), sdhci_irq->regs);
+	else
+		writel(~ASPEED_SDHCI_S0MMC8 & readl(sdhci_irq->regs), sdhci_irq->regs);
+}
+
+#endif
-- 
2.7.4

Re: [PATCH linux dev-4.17 3/7] mmc: Aspeed: Add Aspeed sdhci core driver

[Benjamin Herrenschmidt]

On Tue, 2018-07-17 at 15:26 +0800, Ryan Chen wrote:
> In Aspeed SoC's sdhci have two slots and have a interrupt status and
> general information in top for register. add sdhci core driver
> defore sdhci driver probe
> 
> V0->V1
> move irqchip/irq-aspeed-sdhci-ic.c to drivers/mmc/host/aspeed-sdhci-core.c
> 
> Signed-off-by: Ryan Chen <ryanchen.aspeed@gmail.com>
> ---
>  drivers/irqchip/Makefile              |   2 +-
>  drivers/mmc/host/Makefile             |   1 +
>  drivers/mmc/host/aspeed-sdhci-core.c  | 147 ++++++++++++++++++++++++++++++++++
>  include/linux/mmc/sdhci-aspeed-data.h |  28 +++++++
>  4 files changed, 177 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/mmc/host/aspeed-sdhci-core.c
>  create mode 100644 include/linux/mmc/sdhci-aspeed-data.h
> 
> diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
> index 5ed465a..d99cb1d 100644
> --- a/drivers/irqchip/Makefile
> +++ b/drivers/irqchip/Makefile
> @@ -78,7 +78,7 @@ obj-$(CONFIG_MVEBU_ODMI)		+= irq-mvebu-odmi.o
>  obj-$(CONFIG_MVEBU_PIC)			+= irq-mvebu-pic.o
>  obj-$(CONFIG_LS_SCFG_MSI)		+= irq-ls-scfg-msi.o
>  obj-$(CONFIG_EZNPS_GIC)			+= irq-eznps.o
> -obj-$(CONFIG_ARCH_ASPEED)		+= irq-aspeed-vic.o irq-aspeed-i2c-ic.o
> +obj-$(CONFIG_ARCH_ASPEED)		+= irq-aspeed-vic.o irq-aspeed-i2c-ic.o 
>  obj-$(CONFIG_STM32_EXTI) 		+= irq-stm32-exti.o
>  obj-$(CONFIG_QCOM_IRQ_COMBINER)		+= qcom-irq-combiner.o
>  obj-$(CONFIG_IRQ_UNIPHIER_AIDET)	+= irq-uniphier-aidet.o
> diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
> index 6aead24..c3e5a1f 100644
> --- a/drivers/mmc/host/Makefile
> +++ b/drivers/mmc/host/Makefile
> @@ -78,6 +78,7 @@ obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX)	+= sdhci-esdhc-imx.o
>  obj-$(CONFIG_MMC_SDHCI_DOVE)		+= sdhci-dove.o
>  obj-$(CONFIG_MMC_SDHCI_TEGRA)		+= sdhci-tegra.o
>  obj-$(CONFIG_MMC_SDHCI_OF_ARASAN)	+= sdhci-of-arasan.o
> +obj-$(CONFIG_MMC_SDHCI_OF_ASPEED)	+= aspeed-sdhci-core.o
>  obj-$(CONFIG_MMC_SDHCI_OF_AT91)		+= sdhci-of-at91.o
>  obj-$(CONFIG_MMC_SDHCI_OF_ESDHC)	+= sdhci-of-esdhc.o
>  obj-$(CONFIG_MMC_SDHCI_OF_HLWD)		+= sdhci-of-hlwd.o
> diff --git a/drivers/mmc/host/aspeed-sdhci-core.c b/drivers/mmc/host/aspeed-sdhci-core.c
> new file mode 100644
> index 0000000..c3d9d45
> --- /dev/null
> +++ b/drivers/mmc/host/aspeed-sdhci-core.c
> @@ -0,0 +1,147 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * SDHCI IRQCHIP driver for the Aspeed SoC
> + *
> + * Copyright (C) ASPEED Technology Inc.
> + * Ryan Chen <ryan_chen@aspeedtech.com>
> + *
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or (at
> + * your option) any later version.
> + *
> + */
> +
> +#include <linux/platform_device.h>
> +#include <linux/module.h>
> +#include <linux/delay.h>
> +#include <linux/irq.h>
> +#include <linux/irqchip.h>
> +#include <linux/irqchip/chained_irq.h>
> +#include <linux/irqdomain.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <linux/of.h>
> +#include <linux/io.h>
> +#include <linux/clk.h>
> +#include <linux/mmc/sdhci-aspeed-data.h>
> +
> +#define ASPEED_SDHCI_SLOT_NUM			2
> 

Change the "irq" prefixes on the functions.. Dont' do a chained
handler, that will be too much overhead for no benefit. Your SoC aren't
very fast and you want to avoid that overhead.

Just do a normal interrupt handler, and have it call each port
interrupts.

This isn't really an interrupt controller, it has no
enable/disable/masking ability, I would just create the ports directly
from the same driver and process the interrupts.

I don't think there's benefit in keeping the ports as separate drivers.

> +static void aspeed_sdhci_irq_handler(struct irq_desc *desc)
> +{
> +	struct aspeed_sdhci_irq *sdhci_irq = irq_desc_get_handler_data(desc);
> +	struct irq_chip *chip = irq_desc_get_chip(desc);
> +	unsigned long bit, status;
> +	unsigned int slot_irq;
> +
> +	chained_irq_enter(chip, desc);
> +	status = readl(sdhci_irq->regs + ASPEED_SDHCI_ISR);
> +	for_each_set_bit(bit, &status, ASPEED_SDHCI_SLOT_NUM) {
> +		slot_irq = irq_find_mapping(sdhci_irq->irq_domain, bit);
> +		generic_handle_irq(slot_irq);
> +	}
> +	chained_irq_exit(chip, desc);
> +}
> +
> +static void noop(struct irq_data *data) { }
> +
> +static unsigned int noop_ret(struct irq_data *data)
> +{
> +	return 0;
> +}
> +
> +struct irq_chip sdhci_irq_chip = {
> +	.name		= "sdhci-ic",
> +	.irq_startup	= noop_ret,
> +	.irq_shutdown	= noop,
> +	.irq_enable	= noop,
> +	.irq_disable	= noop,
> +	.irq_ack	= noop,
> +	.irq_mask	= noop,
> +	.irq_unmask	= noop,
> +	.flags		= IRQCHIP_SKIP_SET_WAKE,
> +};
> +
> +static int ast_sdhci_map_irq_domain(struct irq_domain *domain,
> +				    unsigned int irq, irq_hw_number_t hwirq)
> +{
> +	irq_set_chip_and_handler(irq, &sdhci_irq_chip, handle_simple_irq);
> +	irq_set_chip_data(irq, domain->host_data);
> +
> +	return 0;
> +}
> +
> +static const struct irq_domain_ops aspeed_sdhci_irq_domain_ops = {
> +	.map = ast_sdhci_map_irq_domain,
> +};
> +
> +static int irq_aspeed_sdhci_probe(struct platform_device *pdev)
> +{
> +	struct aspeed_sdhci_irq *sdhci_irq;
> +	struct clk *sdclk;
> +
> +	sdhci_irq = kzalloc(sizeof(*sdhci_irq), GFP_KERNEL);
> +	if (!sdhci_irq)
> +		return -ENOMEM;
> +
> +	platform_set_drvdata(pdev, sdhci_irq);
> +	//node->data = sdhci_irq;
> +	pdev->dev.of_node->data = sdhci_irq;
> +
> +	sdhci_irq->regs = of_iomap(pdev->dev.of_node, 0);
> +	if (IS_ERR(sdhci_irq->regs))
> +		return PTR_ERR(sdhci_irq->regs);
> +
> +	sdclk = devm_clk_get(&pdev->dev, NULL);
> +	if (IS_ERR(sdclk)) {
> +		dev_err(&pdev->dev, "no sdclk clock defined\n");
> +		return PTR_ERR(sdclk);
> +	}
> +
> +	clk_prepare_enable(sdclk);
> +
> +	sdhci_irq->parent_irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
> +	if (sdhci_irq->parent_irq < 0)
> +		return sdhci_irq->parent_irq;
> +
> +	sdhci_irq->irq_domain = irq_domain_add_linear(
> +					pdev->dev.of_node, ASPEED_SDHCI_SLOT_NUM,
> +					&aspeed_sdhci_irq_domain_ops, NULL);
> +	if (!sdhci_irq->irq_domain)
> +		return -ENOMEM;
> +
> +	sdhci_irq->irq_domain->name = "aspeed-sdhci-irq";
> +
> +	irq_set_chained_handler_and_data(sdhci_irq->parent_irq,
> +					 aspeed_sdhci_irq_handler, sdhci_irq);
> +
> +	pr_info("sdhci irq controller registered, irq %d\n", sdhci_irq->parent_irq);
> +
> +	return 0;
> +}
> +
> +static const struct of_device_id irq_aspeed_sdhci_dt_ids[] = {
> +	{ .compatible = "aspeed,aspeed-sdhci-irq", },
> +	{},
> +};

You should call this aspeed,ast2{4,5}00-sdhci-core. I would change your
device-tree representation as follow (add back all the reg &
properties):

	sdhci-core {
		reg = <common regs>
		ranges = either empty prop or the 2 ranges goign to the children
		compatible = <aspeed,ast2400-sdhci-core>;

		sdhci-slot@xxx {
			compatible = <aspeed,ast2400-sdhci-slot>;
		};

		sdhci-slot@yyy {
			compatible = <aspeed,ast2400-sdhci-slot>;
		};
	}

> +MODULE_DEVICE_TABLE(of, irq_aspeed_sdhci_dt_ids);
> +
> +static struct platform_driver irq_aspeed_sdhci_device_driver = {
> +	.probe		= irq_aspeed_sdhci_probe,
> +	.driver		= {
> +		.name   = KBUILD_MODNAME,
> +		.of_match_table	= irq_aspeed_sdhci_dt_ids,
> +	}
> +};
> +
> +static int __init irq_aspeed_sdhci_init(void)
> +{
> +	return platform_driver_register(&irq_aspeed_sdhci_device_driver);
> +}
> +core_initcall(irq_aspeed_sdhci_init);

This should be a normal device init call, thus module_platform_driver
is all you need here.

> +
> +MODULE_AUTHOR("Ryan Chen");
> +MODULE_DESCRIPTION("ASPEED SOC SDHCI IRQ Driver");
> +MODULE_LICENSE("GPL v2");
> diff --git a/include/linux/mmc/sdhci-aspeed-data.h b/include/linux/mmc/sdhci-aspeed-data.h
> new file mode 100644
> index 0000000..fba2bf2
> --- /dev/null
> +++ b/include/linux/mmc/sdhci-aspeed-data.h
> @@ -0,0 +1,28 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef LINUX_MMC_SDHCI_ASPEED_DATA_H
> +#define LINUX_MMC_SDHCI_ASPEED_DATA_H
> +
> +#include <linux/io.h>
> +
> +#define ASPEED_SDHCI_INFO			0x00
> +#define  ASPEED_SDHCI_S1MMC8			BIT(25)
> +#define  ASPEED_SDHCI_S0MMC8			BIT(24)
> +#define ASPEED_SDHCI_BLOCK			0x04
> +#define ASPEED_SDHCI_CTRL			0xF0
> +#define ASPEED_SDHCI_ISR			0xFC
> +
> +struct aspeed_sdhci_irq {
> +	void __iomem *regs;
> +	int parent_irq;
> +	struct irq_domain *irq_domain;
> +};
> +
> +static inline void aspeed_sdhci_set_8bit_mode(struct aspeed_sdhci_irq *sdhci_irq, int mode)
> +{
> +	if (mode)
> +		writel(ASPEED_SDHCI_S0MMC8 | readl(sdhci_irq->regs), sdhci_irq->regs);
> +	else
> +		writel(~ASPEED_SDHCI_S0MMC8 & readl(sdhci_irq->regs), sdhci_irq->regs);
> +}
> +
> +#endif

Re: [PATCH linux dev-4.17 3/7] mmc: Aspeed: Add Aspeed sdhci core driver

[Benjamin Herrenschmidt]

On Thu, 2018-07-26 at 11:41 +1000, Benjamin Herrenschmidt wrote:
> Change the "irq" prefixes on the functions.. Dont' do a chained
> handler, that will be too much overhead for no benefit. Your SoC aren't
> very fast and you want to avoid that overhead.
> 
> Just do a normal interrupt handler, and have it call each port
> interrupts.
> 
> This isn't really an interrupt controller, it has no
> enable/disable/masking ability, I would just create the ports directly
> from the same driver and process the interrupts.
> 
> I don't think there's benefit in keeping the ports as separate drivers.

Look at how shdci-pci does it, sdhci-acpi as well, they have multiple
slots. You can just register multiple slots from a single driver
I think. You can still use device-tree sub-nodes and iterate them
from the core driver to create the slots if you want, in case you may
add slots in the future, but it's not even that a big deal.

Ben.

Re: [PATCH linux dev-4.17 3/7] mmc: Aspeed: Add Aspeed sdhci core driver

[Ryan Chen]

On Thu, Jul 26, 2018 at 11:47:40AM +1000, Benjamin Herrenschmidt wrote:
> On Thu, 2018-07-26 at 11:41 +1000, Benjamin Herrenschmidt wrote:
> > Change the "irq" prefixes on the functions.. Dont' do a chained
> > handler, that will be too much overhead for no benefit. Your SoC aren't
> > very fast and you want to avoid that overhead.
> > 
> > Just do a normal interrupt handler, and have it call each port
> > interrupts.
> > 
> > This isn't really an interrupt controller, it has no
> > enable/disable/masking ability, I would just create the ports directly
> > from the same driver and process the interrupts.
> > 
> > I don't think there's benefit in keeping the ports as separate drivers.
> 
> Look at how shdci-pci does it, sdhci-acpi as well, they have multiple
> slots. You can just register multiple slots from a single driver
> I think. You can still use device-tree sub-nodes and iterate them
> from the core driver to create the slots if you want, in case you may
> add slots in the future, but it's not even that a big deal.
> 
> Ben.
> 
>
Thanks, after look into sdhci-pci, it should only request one pci_irq, 
But, i am wondering where is the slot dispatch. could you help me point out it?

Re: [PATCH linux dev-4.17 3/7] mmc: Aspeed: Add Aspeed sdhci core driver

[Benjamin Herrenschmidt]

On Thu, 2018-07-26 at 11:07 +0800, Ryan Chen wrote:
> On Thu, Jul 26, 2018 at 11:47:40AM +1000, Benjamin Herrenschmidt wrote:
> > On Thu, 2018-07-26 at 11:41 +1000, Benjamin Herrenschmidt wrote:
> > > Change the "irq" prefixes on the functions.. Dont' do a chained
> > > handler, that will be too much overhead for no benefit. Your SoC aren't
> > > very fast and you want to avoid that overhead.
> > > 
> > > Just do a normal interrupt handler, and have it call each port
> > > interrupts.
> > > 
> > > This isn't really an interrupt controller, it has no
> > > enable/disable/masking ability, I would just create the ports directly
> > > from the same driver and process the interrupts.
> > > 
> > > I don't think there's benefit in keeping the ports as separate drivers.
> > 
> > Look at how shdci-pci does it, sdhci-acpi as well, they have multiple
> > slots. You can just register multiple slots from a single driver
> > I think. You can still use device-tree sub-nodes and iterate them
> > from the core driver to create the slots if you want, in case you may
> > add slots in the future, but it's not even that a big deal.
> > 
> > Ben.
> > 
> > 
> 
> Thanks, after look into sdhci-pci, it should only request one pci_irq, 
> But, i am wondering where is the slot dispatch. could you help me point out it?

So the PCI one just uses the same IRQ number for all the slots in
sdhci_pci_probe_slot(), so the IRQ ends up shared.

So on every irq it will jsut check all slots.

Not sure if that's a problem. Due to how sdhci is organized, if you
really want to make sure it only accesses the one slot, then you indeed
do have to use a cascaded interrupt controller as you are doing, but
I'm not sure it's really worthwhile.

Cheers,
Ben.

Re: [PATCH linux dev-4.17 3/7] mmc: Aspeed: Add Aspeed sdhci core driver

[Ryan Chen]

On Thu, Jul 26, 2018 at 01:14:58PM +1000, Benjamin Herrenschmidt wrote:
> On Thu, 2018-07-26 at 11:07 +0800, Ryan Chen wrote:
> > On Thu, Jul 26, 2018 at 11:47:40AM +1000, Benjamin Herrenschmidt wrote:
> > > On Thu, 2018-07-26 at 11:41 +1000, Benjamin Herrenschmidt wrote:
> > > > Change the "irq" prefixes on the functions.. Dont' do a chained
> > > > handler, that will be too much overhead for no benefit. Your SoC aren't
> > > > very fast and you want to avoid that overhead.
> > > > 
> > > > Just do a normal interrupt handler, and have it call each port
> > > > interrupts.
> > > > 
> > > > This isn't really an interrupt controller, it has no
> > > > enable/disable/masking ability, I would just create the ports directly
> > > > from the same driver and process the interrupts.
> > > > 
> > > > I don't think there's benefit in keeping the ports as separate drivers.
> > > 
> > > Look at how shdci-pci does it, sdhci-acpi as well, they have multiple
> > > slots. You can just register multiple slots from a single driver
> > > I think. You can still use device-tree sub-nodes and iterate them
> > > from the core driver to create the slots if you want, in case you may
> > > add slots in the future, but it's not even that a big deal.
> > > 
> > > Ben.
> > > 
> > > 
> > 
> > Thanks, after look into sdhci-pci, it should only request one pci_irq, 
> > But, i am wondering where is the slot dispatch. could you help me point out it?
> 
> So the PCI one just uses the same IRQ number for all the slots in
> sdhci_pci_probe_slot(), so the IRQ ends up shared.
> 
> So on every irq it will jsut check all slots.
> 
> Not sure if that's a problem. Due to how sdhci is organized, if you
> really want to make sure it only accesses the one slot, then you indeed
> do have to use a cascaded interrupt controller as you are doing, but
> I'm not sure it's really worthwhile.
> 
> Cheers,
> Ben.
> 
> 
Yes, there is two way, to handle irq.
One is use share irq, so my sdhci driver have following outcome when share 
irq, 
	cat /proc/interrupt
	----------
	34:         82      AVIC  26 Edge      mmc0, mmc1
	---------
when use cascaded interrupt. 
	.........
	292:         35  sdhci-ic   0 Edge      mmc0
	293:         42  sdhci-ic   1 Edge      mmc1
	---------
use separate slot (actually it is) interrupt, it have advantage for each slot 
debug. if use share. the debug will not easy.

Re: [PATCH linux dev-4.17 3/7] mmc: Aspeed: Add Aspeed sdhci core driver

[Benjamin Herrenschmidt]

On Thu, 2018-07-26 at 11:26 +0800, Ryan Chen wrote:
> > 
> > 
> 
> Yes, there is two way, to handle irq.
> One is use share irq, so my sdhci driver have following outcome when share 
> irq, 
>         cat /proc/interrupt
>         ----------
>         34:         82      AVIC  26 Edge      mmc0, mmc1
>         ---------
> when use cascaded interrupt. 
>         .........
>         292:         35  sdhci-ic   0 Edge      mmc0
>         293:         42  sdhci-ic   1 Edge      mmc1
>         ---------
> use separate slot (actually it is) interrupt, it have advantage for each slot 
> debug. if use share. the debug will not easy.

I see ... well, you can then continue doing a cascaded controller if
you wish then. I sitll don't think you need to have separate drivers
however, but that's up to you.

You definitely don't want to use core initcalls. Also having a single
driver might make it easier to implement the card detect stuff which is
done by the "common" part, isn't it ?

Cheers,
Ben.

Re: [PATCH linux dev-4.17 3/7] mmc: Aspeed: Add Aspeed sdhci core driver

[Ryan Chen]

On Thu, Jul 26, 2018 at 11:41:49AM +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2018-07-17 at 15:26 +0800, Ryan Chen wrote:
> > In Aspeed SoC's sdhci have two slots and have a interrupt status and
> > general information in top for register. add sdhci core driver
> > defore sdhci driver probe
> > 
> > V0->V1
> > move irqchip/irq-aspeed-sdhci-ic.c to drivers/mmc/host/aspeed-sdhci-core.c
> > 
> > Signed-off-by: Ryan Chen <ryanchen.aspeed@gmail.com>
> > ---
> >  drivers/irqchip/Makefile              |   2 +-
> >  drivers/mmc/host/Makefile             |   1 +
> >  drivers/mmc/host/aspeed-sdhci-core.c  | 147 ++++++++++++++++++++++++++++++++++
> >  include/linux/mmc/sdhci-aspeed-data.h |  28 +++++++
> >  4 files changed, 177 insertions(+), 1 deletion(-)
> >  create mode 100644 drivers/mmc/host/aspeed-sdhci-core.c
> >  create mode 100644 include/linux/mmc/sdhci-aspeed-data.h
> > 
> > diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
> > index 5ed465a..d99cb1d 100644
> > --- a/drivers/irqchip/Makefile
> > +++ b/drivers/irqchip/Makefile
> > @@ -78,7 +78,7 @@ obj-$(CONFIG_MVEBU_ODMI)		+= irq-mvebu-odmi.o
> >  obj-$(CONFIG_MVEBU_PIC)			+= irq-mvebu-pic.o
> >  obj-$(CONFIG_LS_SCFG_MSI)		+= irq-ls-scfg-msi.o
> >  obj-$(CONFIG_EZNPS_GIC)			+= irq-eznps.o
> > -obj-$(CONFIG_ARCH_ASPEED)		+= irq-aspeed-vic.o irq-aspeed-i2c-ic.o
> > +obj-$(CONFIG_ARCH_ASPEED)		+= irq-aspeed-vic.o irq-aspeed-i2c-ic.o 
> >  obj-$(CONFIG_STM32_EXTI) 		+= irq-stm32-exti.o
> >  obj-$(CONFIG_QCOM_IRQ_COMBINER)		+= qcom-irq-combiner.o
> >  obj-$(CONFIG_IRQ_UNIPHIER_AIDET)	+= irq-uniphier-aidet.o
> > diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
> > index 6aead24..c3e5a1f 100644
> > --- a/drivers/mmc/host/Makefile
> > +++ b/drivers/mmc/host/Makefile
> > @@ -78,6 +78,7 @@ obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX)	+= sdhci-esdhc-imx.o
> >  obj-$(CONFIG_MMC_SDHCI_DOVE)		+= sdhci-dove.o
> >  obj-$(CONFIG_MMC_SDHCI_TEGRA)		+= sdhci-tegra.o
> >  obj-$(CONFIG_MMC_SDHCI_OF_ARASAN)	+= sdhci-of-arasan.o
> > +obj-$(CONFIG_MMC_SDHCI_OF_ASPEED)	+= aspeed-sdhci-core.o
> >  obj-$(CONFIG_MMC_SDHCI_OF_AT91)		+= sdhci-of-at91.o
> >  obj-$(CONFIG_MMC_SDHCI_OF_ESDHC)	+= sdhci-of-esdhc.o
> >  obj-$(CONFIG_MMC_SDHCI_OF_HLWD)		+= sdhci-of-hlwd.o
> > diff --git a/drivers/mmc/host/aspeed-sdhci-core.c b/drivers/mmc/host/aspeed-sdhci-core.c
> > new file mode 100644
> > index 0000000..c3d9d45
> > --- /dev/null
> > +++ b/drivers/mmc/host/aspeed-sdhci-core.c
> > @@ -0,0 +1,147 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * SDHCI IRQCHIP driver for the Aspeed SoC
> > + *
> > + * Copyright (C) ASPEED Technology Inc.
> > + * Ryan Chen <ryan_chen@aspeedtech.com>
> > + *
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation; either version 2 of the License, or (at
> > + * your option) any later version.
> > + *
> > + */
> > +
> > +#include <linux/platform_device.h>
> > +#include <linux/module.h>
> > +#include <linux/delay.h>
> > +#include <linux/irq.h>
> > +#include <linux/irqchip.h>
> > +#include <linux/irqchip/chained_irq.h>
> > +#include <linux/irqdomain.h>
> > +#include <linux/of_address.h>
> > +#include <linux/of_irq.h>
> > +#include <linux/of.h>
> > +#include <linux/io.h>
> > +#include <linux/clk.h>
> > +#include <linux/mmc/sdhci-aspeed-data.h>
> > +
> > +#define ASPEED_SDHCI_SLOT_NUM			2
> > 
> 
> Change the "irq" prefixes on the functions.. Dont' do a chained
> handler, that will be too much overhead for no benefit. Your SoC aren't
> very fast and you want to avoid that overhead.
> 
> Just do a normal interrupt handler, and have it call each port
> interrupts.
> 
> This isn't really an interrupt controller, it has no
> enable/disable/masking ability, I would just create the ports directly
> from the same driver and process the interrupts.
> 
> I don't think there's benefit in keeping the ports as separate drivers.
> 
> > +static void aspeed_sdhci_irq_handler(struct irq_desc *desc)
> > +{
> > +	struct aspeed_sdhci_irq *sdhci_irq = irq_desc_get_handler_data(desc);
> > +	struct irq_chip *chip = irq_desc_get_chip(desc);
> > +	unsigned long bit, status;
> > +	unsigned int slot_irq;
> > +
> > +	chained_irq_enter(chip, desc);
> > +	status = readl(sdhci_irq->regs + ASPEED_SDHCI_ISR);
> > +	for_each_set_bit(bit, &status, ASPEED_SDHCI_SLOT_NUM) {
> > +		slot_irq = irq_find_mapping(sdhci_irq->irq_domain, bit);
> > +		generic_handle_irq(slot_irq);
> > +	}
> > +	chained_irq_exit(chip, desc);
> > +}
> > +
> > +static void noop(struct irq_data *data) { }
> > +
> > +static unsigned int noop_ret(struct irq_data *data)
> > +{
> > +	return 0;
> > +}
> > +
> > +struct irq_chip sdhci_irq_chip = {
> > +	.name		= "sdhci-ic",
> > +	.irq_startup	= noop_ret,
> > +	.irq_shutdown	= noop,
> > +	.irq_enable	= noop,
> > +	.irq_disable	= noop,
> > +	.irq_ack	= noop,
> > +	.irq_mask	= noop,
> > +	.irq_unmask	= noop,
> > +	.flags		= IRQCHIP_SKIP_SET_WAKE,
> > +};
> > +
> > +static int ast_sdhci_map_irq_domain(struct irq_domain *domain,
> > +				    unsigned int irq, irq_hw_number_t hwirq)
> > +{
> > +	irq_set_chip_and_handler(irq, &sdhci_irq_chip, handle_simple_irq);
> > +	irq_set_chip_data(irq, domain->host_data);
> > +
> > +	return 0;
> > +}
> > +
> > +static const struct irq_domain_ops aspeed_sdhci_irq_domain_ops = {
> > +	.map = ast_sdhci_map_irq_domain,
> > +};
> > +
> > +static int irq_aspeed_sdhci_probe(struct platform_device *pdev)
> > +{
> > +	struct aspeed_sdhci_irq *sdhci_irq;
> > +	struct clk *sdclk;
> > +
> > +	sdhci_irq = kzalloc(sizeof(*sdhci_irq), GFP_KERNEL);
> > +	if (!sdhci_irq)
> > +		return -ENOMEM;
> > +
> > +	platform_set_drvdata(pdev, sdhci_irq);
> > +	//node->data = sdhci_irq;
> > +	pdev->dev.of_node->data = sdhci_irq;
> > +
> > +	sdhci_irq->regs = of_iomap(pdev->dev.of_node, 0);
> > +	if (IS_ERR(sdhci_irq->regs))
> > +		return PTR_ERR(sdhci_irq->regs);
> > +
> > +	sdclk = devm_clk_get(&pdev->dev, NULL);
> > +	if (IS_ERR(sdclk)) {
> > +		dev_err(&pdev->dev, "no sdclk clock defined\n");
> > +		return PTR_ERR(sdclk);
> > +	}
> > +
> > +	clk_prepare_enable(sdclk);
> > +
> > +	sdhci_irq->parent_irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
> > +	if (sdhci_irq->parent_irq < 0)
> > +		return sdhci_irq->parent_irq;
> > +
> > +	sdhci_irq->irq_domain = irq_domain_add_linear(
> > +					pdev->dev.of_node, ASPEED_SDHCI_SLOT_NUM,
> > +					&aspeed_sdhci_irq_domain_ops, NULL);
> > +	if (!sdhci_irq->irq_domain)
> > +		return -ENOMEM;
> > +
> > +	sdhci_irq->irq_domain->name = "aspeed-sdhci-irq";
> > +
> > +	irq_set_chained_handler_and_data(sdhci_irq->parent_irq,
> > +					 aspeed_sdhci_irq_handler, sdhci_irq);
> > +
> > +	pr_info("sdhci irq controller registered, irq %d\n", sdhci_irq->parent_irq);
> > +
> > +	return 0;
> > +}
> > +
> > +static const struct of_device_id irq_aspeed_sdhci_dt_ids[] = {
> > +	{ .compatible = "aspeed,aspeed-sdhci-irq", },
> > +	{},
> > +};
> 
> You should call this aspeed,ast2{4,5}00-sdhci-core. I would change your
> device-tree representation as follow (add back all the reg &
> properties):
> 
> 	sdhci-core {
> 		reg = <common regs>
> 		ranges = either empty prop or the 2 ranges goign to the children
> 		compatible = <aspeed,ast2400-sdhci-core>;
> 
> 		sdhci-slot@xxx {
> 			compatible = <aspeed,ast2400-sdhci-slot>;
> 		};
> 
> 		sdhci-slot@yyy {
> 			compatible = <aspeed,ast2400-sdhci-slot>;
> 		};
> 	}
> 

If i keep the interrupt controller for dispatch slot. 
Is the following is compromise way for dts? 
Each slot need interrupt-parent.

&sdhci {

	sdhci_core: interrupt-controller@0 {
		#interrupt-cells = <1>;
		compatible = "aspeed,ast2500-sdhci-core";
		reg = <0x0 0x100>;
		interrupts = <26>;
		interrupt-controller;
		clocks = <&syscon ASPEED_CLK_GATE_SDCLKCLK>;
	};

	sdhci_slot0: sdhci_slot@100 {
		compatible = "aspeed,ast2500-sdhci-slot";
		reg = <0x100 0x100>;
		interrupts = <0>;
		interrupt-parent = <&sdhci_core>;
		sdhci,auto-cmd12;
		clocks = <&syscon ASPEED_CLK_SDIO>;
		status = "disabled";
	};

	sdhci_slot1: sdhci_slot@200 {
		compatible = "aspeed,ast2500-sdhci-slot";
		reg = <0x200 0x100>;
		interrupts = <1>;
		interrupt-parent = <&sdhci_core>;
		sdhci,auto-cmd12;
		clocks = <&syscon ASPEED_CLK_SDIO>;
		status = "disabled";
	};

};



> > +MODULE_DEVICE_TABLE(of, irq_aspeed_sdhci_dt_ids);
> > +
> > +static struct platform_driver irq_aspeed_sdhci_device_driver = {
> > +	.probe		= irq_aspeed_sdhci_probe,
> > +	.driver		= {
> > +		.name   = KBUILD_MODNAME,
> > +		.of_match_table	= irq_aspeed_sdhci_dt_ids,
> > +	}
> > +};
> > +
> > +static int __init irq_aspeed_sdhci_init(void)
> > +{
> > +	return platform_driver_register(&irq_aspeed_sdhci_device_driver);
> > +}
> > +core_initcall(irq_aspeed_sdhci_init);
> 
> This should be a normal device init call, thus module_platform_driver
> is all you need here.
> 
> > +
> > +MODULE_AUTHOR("Ryan Chen");
> > +MODULE_DESCRIPTION("ASPEED SOC SDHCI IRQ Driver");
> > +MODULE_LICENSE("GPL v2");
> > diff --git a/include/linux/mmc/sdhci-aspeed-data.h b/include/linux/mmc/sdhci-aspeed-data.h
> > new file mode 100644
> > index 0000000..fba2bf2
> > --- /dev/null
> > +++ b/include/linux/mmc/sdhci-aspeed-data.h
> > @@ -0,0 +1,28 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +#ifndef LINUX_MMC_SDHCI_ASPEED_DATA_H
> > +#define LINUX_MMC_SDHCI_ASPEED_DATA_H
> > +
> > +#include <linux/io.h>
> > +
> > +#define ASPEED_SDHCI_INFO			0x00
> > +#define  ASPEED_SDHCI_S1MMC8			BIT(25)
> > +#define  ASPEED_SDHCI_S0MMC8			BIT(24)
> > +#define ASPEED_SDHCI_BLOCK			0x04
> > +#define ASPEED_SDHCI_CTRL			0xF0
> > +#define ASPEED_SDHCI_ISR			0xFC
> > +
> > +struct aspeed_sdhci_irq {
> > +	void __iomem *regs;
> > +	int parent_irq;
> > +	struct irq_domain *irq_domain;
> > +};
> > +
> > +static inline void aspeed_sdhci_set_8bit_mode(struct aspeed_sdhci_irq *sdhci_irq, int mode)
> > +{
> > +	if (mode)
> > +		writel(ASPEED_SDHCI_S0MMC8 | readl(sdhci_irq->regs), sdhci_irq->regs);
> > +	else
> > +		writel(~ASPEED_SDHCI_S0MMC8 & readl(sdhci_irq->regs), sdhci_irq->regs);
> > +}
> > +
> > +#endif
> 

Re: [PATCH linux dev-4.17 3/7] mmc: Aspeed: Add Aspeed sdhci core driver

[Benjamin Herrenschmidt]

On Thu, 2018-07-26 at 17:10 +0800, Ryan Chen wrote:
> On
> 
> If i keep the interrupt controller for dispatch slot. 
> Is the following is compromise way for dts? 
> Each slot need interrupt-parent.
> 
> &sdhci {
> 
> 	sdhci_core: interrupt-controller@0 {
> 		#interrupt-cells = <1>;
> 		compatible = "aspeed,ast2500-sdhci-core";
> 		reg = <0x0 0x100>;
> 		interrupts = <26>;
> 		interrupt-controller;
> 		clocks = <&syscon ASPEED_CLK_GATE_SDCLKCLK>;
> 	};
> 
> 	sdhci_slot0: sdhci_slot@100 {
> 		compatible = "aspeed,ast2500-sdhci-slot";
> 		reg = <0x100 0x100>;
> 		interrupts = <0>;
> 		interrupt-parent = <&sdhci_core>;
> 		sdhci,auto-cmd12;
> 		clocks = <&syscon ASPEED_CLK_SDIO>;
> 		status = "disabled";
> 	};
> 
> 	sdhci_slot1: sdhci_slot@200 {
> 		compatible = "aspeed,ast2500-sdhci-slot";
> 		reg = <0x200 0x100>;
> 		interrupts = <1>;
> 		interrupt-parent = <&sdhci_core>;
> 		sdhci,auto-cmd12;
> 		clocks = <&syscon ASPEED_CLK_SDIO>;
> 		status = "disabled";
> 	};

I think the "core" is more than just the interrupt controller. The
slots should be the children of it.

You don't necessarily need to treat the slots as being matched by a
separate driver, it complicates things imho, but up to you.

Ben.

> };
> 
> 
> 
> > > +MODULE_DEVICE_TABLE(of, irq_aspeed_sdhci_dt_ids);
> > > +
> > > +static struct platform_driver irq_aspeed_sdhci_device_driver = {
> > > +	.probe		= irq_aspeed_sdhci_probe,
> > > +	.driver		= {
> > > +		.name   = KBUILD_MODNAME,
> > > +		.of_match_table	= irq_aspeed_sdhci_dt_ids,
> > > +	}
> > > +};
> > > +
> > > +static int __init irq_aspeed_sdhci_init(void)
> > > +{
> > > +	return platform_driver_register(&irq_aspeed_sdhci_device_driver);
> > > +}
> > > +core_initcall(irq_aspeed_sdhci_init);
> > 
> > This should be a normal device init call, thus module_platform_driver
> > is all you need here.
> > 
> > > +
> > > +MODULE_AUTHOR("Ryan Chen");
> > > +MODULE_DESCRIPTION("ASPEED SOC SDHCI IRQ Driver");
> > > +MODULE_LICENSE("GPL v2");
> > > diff --git a/include/linux/mmc/sdhci-aspeed-data.h b/include/linux/mmc/sdhci-aspeed-data.h
> > > new file mode 100644
> > > index 0000000..fba2bf2
> > > --- /dev/null
> > > +++ b/include/linux/mmc/sdhci-aspeed-data.h
> > > @@ -0,0 +1,28 @@
> > > +/* SPDX-License-Identifier: GPL-2.0 */
> > > +#ifndef LINUX_MMC_SDHCI_ASPEED_DATA_H
> > > +#define LINUX_MMC_SDHCI_ASPEED_DATA_H
> > > +
> > > +#include <linux/io.h>
> > > +
> > > +#define ASPEED_SDHCI_INFO			0x00
> > > +#define  ASPEED_SDHCI_S1MMC8			BIT(25)
> > > +#define  ASPEED_SDHCI_S0MMC8			BIT(24)
> > > +#define ASPEED_SDHCI_BLOCK			0x04
> > > +#define ASPEED_SDHCI_CTRL			0xF0
> > > +#define ASPEED_SDHCI_ISR			0xFC
> > > +
> > > +struct aspeed_sdhci_irq {
> > > +	void __iomem *regs;
> > > +	int parent_irq;
> > > +	struct irq_domain *irq_domain;
> > > +};
> > > +
> > > +static inline void aspeed_sdhci_set_8bit_mode(struct aspeed_sdhci_irq *sdhci_irq, int mode)
> > > +{
> > > +	if (mode)
> > > +		writel(ASPEED_SDHCI_S0MMC8 | readl(sdhci_irq->regs), sdhci_irq->regs);
> > > +	else
> > > +		writel(~ASPEED_SDHCI_S0MMC8 & readl(sdhci_irq->regs), sdhci_irq->regs);
> > > +}
> > > +
> > > +#endif

[PATCH linux dev-4.17 4/7] mmc: Aspeed: Add driver for Aspeed sdhci

[Ryan Chen]

Add a driver for Aspeed's sdhci controller core.

Signed-off-by: Ryan Chen <ryanchen.aspeed@gmail.com>
---
 drivers/mmc/host/Kconfig           |  12 +++
 drivers/mmc/host/Makefile          |   2 +-
 drivers/mmc/host/sdhci-of-aspeed.c | 178 +++++++++++++++++++++++++++++++++++++
 3 files changed, 191 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mmc/host/sdhci-of-aspeed.c

diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 9589f9c..5056e6e 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -142,6 +142,18 @@ config MMC_SDHCI_OF_ARASAN
 
 	  If unsure, say N.
 
+config MMC_SDHCI_OF_ASPEED
+	tristate "SDHCI OF support for the ASPEED SDHCI controller"
+	depends on MMC_SDHCI_PLTFM
+	depends on OF
+	help
+	  This selects the ASPEED Secure Digital Host Controller Interface.
+
+	  If you have a controller with this interface, say Y or M here. You
+	  also need to enable an appropriate bus interface.
+
+	  If unsure, say N.
+
 config MMC_SDHCI_OF_AT91
 	tristate "SDHCI OF support for the Atmel SDMMC controller"
 	depends on MMC_SDHCI_PLTFM
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index c3e5a1f..6214d11 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -78,7 +78,7 @@ obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX)	+= sdhci-esdhc-imx.o
 obj-$(CONFIG_MMC_SDHCI_DOVE)		+= sdhci-dove.o
 obj-$(CONFIG_MMC_SDHCI_TEGRA)		+= sdhci-tegra.o
 obj-$(CONFIG_MMC_SDHCI_OF_ARASAN)	+= sdhci-of-arasan.o
-obj-$(CONFIG_MMC_SDHCI_OF_ASPEED)	+= aspeed-sdhci-core.o
+obj-$(CONFIG_MMC_SDHCI_OF_ASPEED)	+= aspeed-sdhci-core.o sdhci-of-aspeed.o
 obj-$(CONFIG_MMC_SDHCI_OF_AT91)		+= sdhci-of-at91.o
 obj-$(CONFIG_MMC_SDHCI_OF_ESDHC)	+= sdhci-of-esdhc.o
 obj-$(CONFIG_MMC_SDHCI_OF_HLWD)		+= sdhci-of-hlwd.o
diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of-aspeed.c
new file mode 100644
index 0000000..8e609e1
--- /dev/null
+++ b/drivers/mmc/host/sdhci-of-aspeed.c
@@ -0,0 +1,178 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ASPEED Secure Digital Host Controller Interface.
+ * Copyright (C) ASPEED Technology Inc.
+ * Ryan Chen <ryan_chen@aspeedtech.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ *
+ */
+
+#include <linux/dma-mapping.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/mmc/host.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/mmc/sdhci-aspeed-data.h>
+#include <linux/reset.h>
+#include "sdhci-pltfm.h"
+
+static void sdhci_aspeed_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+	int div;
+	u16 clk;
+	unsigned long timeout;
+
+	if (clock == host->clock)
+		return;
+
+	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
+
+	if (clock == 0)
+		goto out;
+
+	for (div = 1; div < 256; div *= 2) {
+		if ((host->max_clk / div) <= clock)
+			break;
+	}
+	div >>= 1;
+
+	clk = div << SDHCI_DIVIDER_SHIFT;
+	clk |= SDHCI_CLOCK_INT_EN;
+	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+
+	/* Wait max 20 ms */
+	timeout = 20;
+	while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
+		 & SDHCI_CLOCK_INT_STABLE)) {
+		if (timeout == 0) {
+			pr_err("%s: Internal clock never stabilised.\n",
+			       mmc_hostname(host->mmc));
+			return;
+		}
+		timeout--;
+		mdelay(1);
+	}
+
+	clk |= SDHCI_CLOCK_CARD_EN;
+	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+
+out:
+	host->clock = clock;
+}
+
+static void sdhci_aspeed_set_bus_width(struct sdhci_host *host, int width)
+{
+	struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
+	struct aspeed_sdhci_irq *sdhci_irq = sdhci_pltfm_priv(pltfm_priv);
+
+	u8 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
+
+	if (sdhci_irq->regs) {
+		if (width == MMC_BUS_WIDTH_8)
+			aspeed_sdhci_set_8bit_mode(sdhci_irq, 1);
+		else
+			aspeed_sdhci_set_8bit_mode(sdhci_irq, 0);
+	}
+	if (width == MMC_BUS_WIDTH_4)
+		ctrl |= SDHCI_CTRL_4BITBUS;
+	else
+		ctrl &= ~SDHCI_CTRL_4BITBUS;
+
+	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
+
+}
+
+static struct sdhci_ops  sdhci_aspeed_ops = {
+	.set_clock = sdhci_aspeed_set_clock,
+	.get_max_clock = sdhci_pltfm_clk_get_max_clock,
+	.set_bus_width = sdhci_aspeed_set_bus_width,
+	.get_timeout_clock = sdhci_pltfm_clk_get_max_clock,
+	.reset = sdhci_reset,
+	.set_uhs_signaling = sdhci_set_uhs_signaling,
+};
+
+static struct sdhci_pltfm_data sdhci_aspeed_pdata = {
+	.ops = &sdhci_aspeed_ops,
+	.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
+	.quirks2 = SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
+};
+
+static int sdhci_aspeed_probe(struct platform_device *pdev)
+{
+	struct sdhci_host *host;
+	struct device_node *pnode;
+	struct device_node *np = pdev->dev.of_node;
+	struct sdhci_pltfm_host *pltfm_host;
+	struct aspeed_sdhci_irq *sdhci_irq;
+
+	int ret;
+
+	host = sdhci_pltfm_init(pdev, &sdhci_aspeed_pdata, sizeof(struct aspeed_sdhci_irq));
+	if (IS_ERR(host))
+		return PTR_ERR(host);
+
+	pltfm_host = sdhci_priv(host);
+	sdhci_irq = sdhci_pltfm_priv(pltfm_host);
+
+	sdhci_get_of_property(pdev);
+
+	pltfm_host->clk = devm_clk_get(&pdev->dev, NULL);
+
+	pnode = of_parse_phandle(np, "interrupt-parent", 0);
+	if (pnode)
+		memcpy(sdhci_irq, pnode->data, sizeof(struct aspeed_sdhci_irq));
+
+	ret = mmc_of_parse(host->mmc);
+	if (ret)
+		goto err_sdhci_add;
+
+	ret = sdhci_add_host(host);
+	if (ret)
+		goto err_sdhci_add;
+
+	return 0;
+
+err_sdhci_add:
+	sdhci_pltfm_free(pdev);
+	return ret;
+}
+
+static int sdhci_aspeed_remove(struct platform_device *pdev)
+{
+	struct sdhci_host	*host = platform_get_drvdata(pdev);
+	int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
+
+	sdhci_remove_host(host, dead);
+	sdhci_pltfm_free(pdev);
+	return 0;
+}
+
+static const struct of_device_id sdhci_aspeed_of_match[] = {
+	{ .compatible = "aspeed,sdhci-ast2400", .data = &sdhci_aspeed_pdata },
+	{ .compatible = "aspeed,sdhci-ast2500", .data = &sdhci_aspeed_pdata },
+	{}
+};
+
+MODULE_DEVICE_TABLE(of, sdhci_aspeed_of_match);
+
+static struct platform_driver sdhci_aspeed_driver = {
+	.driver		= {
+		.name	= "sdhci-aspeed",
+		.pm	= &sdhci_pltfm_pmops,
+		.of_match_table = sdhci_aspeed_of_match,
+	},
+	.probe		= sdhci_aspeed_probe,
+	.remove		= sdhci_aspeed_remove,
+};
+
+module_platform_driver(sdhci_aspeed_driver);
+
+MODULE_DESCRIPTION("Driver for the ASPEED SDHCI Controller");
+MODULE_AUTHOR("Ryan Chen <ryan_chen@aspeedtech.com>");
+MODULE_LICENSE("GPL v2");
-- 
2.7.4

[PATCH linux dev-4.17 5/7] dts: Aspeed: Add devicetree for Aspeed sdhci

[Ryan Chen]

Add devicetree for Aspeed's sdhci

V0->V1
separete patch toe device tree and binding document

Signed-off-by: Ryan Chen <ryanchen.aspeed@gmail.com>
---
 arch/arm/boot/dts/aspeed-ast2500-evb.dts | 14 +++++++++++
 arch/arm/boot/dts/aspeed-g4.dtsi         | 40 ++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/aspeed-g5.dtsi         | 40 ++++++++++++++++++++++++++++++++
 3 files changed, 94 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
index 5dbb33c..5578ae0 100644
--- a/arch/arm/boot/dts/aspeed-ast2500-evb.dts
+++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
@@ -97,6 +97,20 @@
 	};
 };
 
+&sdhci_slot0 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_sd1_default>;
+};
+
+&sdhci_slot1 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_sd2_default>;
+};
+
 /*
  * Enable port A as device (via the virtual hub) and port B as
  * host by default on the eval board. This can be easily changed
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index e86fa80..f4a8d7d 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -190,6 +190,13 @@
 				reg = <0x1e720000 0x8000>;	// 32K
 			};
 
+			sdhci: sdhci@1e740000 {
+				compatible = "simple-bus";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0 0x1e740000 0x1000>;
+			};
+
 			gpio: gpio@1e780000 {
 				#gpio-cells = <2>;
 				gpio-controller;
@@ -369,6 +376,39 @@
 	};
 };
 
+&sdhci {
+
+	sdhci_ic: interrupt-controller@0 {
+		#interrupt-cells = <1>;
+		compatible = "aspeed,aspeed-sdhci-irq";
+		reg = <0x0 0x100>;
+		interrupts = <26>;
+		interrupt-controller;
+		clocks = <&syscon ASPEED_CLK_GATE_SDCLKCLK>;
+	};
+
+	sdhci_slot0: sdhci_slot0@100 {
+		compatible = "aspeed,sdhci-ast2400";
+		reg = <0x100 0x100>;
+		interrupts = <0>;
+		interrupt-parent = <&sdhci_ic>;
+		sdhci,auto-cmd12;
+		clocks = <&syscon ASPEED_CLK_SDIO>;
+		status = "disabled";
+	};
+
+	sdhci_slot1: sdhci_slot1@200 {
+		compatible = "aspeed,sdhci-ast2400";
+		reg = <0x200 0x100>;
+		interrupts = <1>;
+		interrupt-parent = <&sdhci_ic>;
+		sdhci,auto-cmd12;
+		clocks = <&syscon ASPEED_CLK_SDIO>;
+		status = "disabled";
+	};
+
+};
+
 &i2c {
 	i2c_ic: interrupt-controller@0 {
 		#interrupt-cells = <1>;
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index d92f047..effe631 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -256,6 +256,13 @@
 				reg = <0x1e720000 0x9000>;	// 36K
 			};
 
+			sdhci: sdhci@1e740000 {
+				compatible = "simple-bus";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0 0x1e740000 0x1000>;
+			};
+
 			gpio: gpio@1e780000 {
 				#gpio-cells = <2>;
 				gpio-controller;
@@ -446,6 +453,39 @@
 	};
 };
 
+&sdhci {
+
+	sdhci_ic: interrupt-controller@0 {
+		#interrupt-cells = <1>;
+		compatible = "aspeed,aspeed-sdhci-irq";
+		reg = <0x0 0x100>;
+		interrupts = <26>;
+		interrupt-controller;
+		clocks = <&syscon ASPEED_CLK_GATE_SDCLKCLK>;
+	};
+
+	sdhci_slot0: sdhci_slot0@100 {
+		compatible = "aspeed,sdhci-ast2500";
+		reg = <0x100 0x100>;
+		interrupts = <0>;
+		interrupt-parent = <&sdhci_ic>;
+		sdhci,auto-cmd12;
+		clocks = <&syscon ASPEED_CLK_SDIO>;
+		status = "disabled";
+	};
+
+	sdhci_slot1: sdhci_slot1@200 {
+		compatible = "aspeed,sdhci-ast2500";
+		reg = <0x200 0x100>;
+		interrupts = <1>;
+		interrupt-parent = <&sdhci_ic>;
+		sdhci,auto-cmd12;
+		clocks = <&syscon ASPEED_CLK_SDIO>;
+		status = "disabled";
+	};
+
+};
+
 &i2c {
 	i2c_ic: interrupt-controller@0 {
 		#interrupt-cells = <1>;
-- 
2.7.4

[PATCH linux dev-4.17 6/7] Documentation: mmc: add aspeed sdhci binding document

[Ryan Chen]

add aspeed sdhci binding document

V0->V1
add independent patch for binding document

Signed-off-by: Ryan Chen <ryanchen.aspeed@gmail.com>
---
 .../bindings/mmc/aspeed,aspeed-sdhci.txt           | 54 ++++++++++++++++++++++
 1 file changed, 54 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mmc/aspeed,aspeed-sdhci.txt

diff --git a/Documentation/devicetree/bindings/mmc/aspeed,aspeed-sdhci.txt b/Documentation/devicetree/bindings/mmc/aspeed,aspeed-sdhci.txt
new file mode 100644
index 0000000..6ad30e5
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/aspeed,aspeed-sdhci.txt
@@ -0,0 +1,54 @@
+Device Tree Bindings for the Aspeed SoC SDHCI Controller
+
+This file documents differences between the core properties in mmc.txt
+and the properties present in the Aspeed SDHCI
+Aspeed SD/SDIO Host controller have have general information in front of controller.
+In ast25xx/ast24xx have two slots, and each slot have own register.
+
+Required properties:
+- compatible : should be "aspeed,ast2500-sdhci" or "aspeed,ast2400-sdhci"
+- clocks : phandle + clock specifier pair of the external clock
+- interrupts : interrupt number
+- interrupt-parent : interrupt controller for bus, should reference a
+                     aspeed,aspeed-sdhci-ic interrupt controller
+
+Example:
+
+sdhci {
+	compatible = "simple-bus";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	ranges = <0 0x1e740000 0x1000>;
+
+	sdhci_ic: interrupt-controller@0 {
+		#interrupt-cells = <1>;
+		compatible = "aspeed,aspeed-sdhci-irq";
+		reg = <0x0 0x100>;
+		interrupts = <26>;
+		interrupt-controller;
+		clocks = <&syscon ASPEED_CLK_GATE_SDCLKCLK>;
+	};
+
+	sdhci_slot0: sdhci_slot0@100 {
+		compatible = "aspeed,sdhci-ast2500";
+		reg = <0x100 0x100>;
+		interrupts = <0>;
+		interrupt-parent = <&sdhci_ic>;
+		slot = <0>;
+		sdhci,auto-cmd12;
+		clocks = <&syscon ASPEED_CLK_SDIO>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_sd1_default>;
+	};
+
+	sdhci_slot1: sdhci_slot1@200 {
+		compatible = "aspeed,sdhci-ast2500";
+		reg = <0x200 0x100>;
+		interrupts = <1>;
+		interrupt-parent = <&sdhci_ic>;
+		sdhci,auto-cmd12;
+		clocks = <&syscon ASPEED_CLK_SDIO>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_sd2_default>;
+	};
+};
-- 
2.7.4

[PATCH linux dev-4.17 7/7] configs: Aspeed: enable mmc host in defconfig

[Ryan Chen]

Enable mmc host in aspeed_g5_defconfig

Signed-off-by: Ryan Chen <ryanchen.aspeed@gmail.com>
---
 arch/arm/configs/aspeed_g5_defconfig | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/configs/aspeed_g5_defconfig b/arch/arm/configs/aspeed_g5_defconfig
index b7f8fa1..7b99aa9 100644
--- a/arch/arm/configs/aspeed_g5_defconfig
+++ b/arch/arm/configs/aspeed_g5_defconfig
@@ -197,6 +197,12 @@ CONFIG_USB_CONFIGFS_F_LB_SS=y
 CONFIG_USB_CONFIGFS_F_FS=y
 CONFIG_USB_CONFIGFS_F_HID=y
 CONFIG_USB_CONFIGFS_F_PRINTER=y
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=8
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_ASPEED=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
 CONFIG_LEDS_CLASS_FLASH=y
-- 
2.7.4

Re: [PATCHv2 linux dev-4.17 0/7] mmc/host: Add Aspeed SDIO driver

[Benjamin Herrenschmidt]

On Tue, 2018-07-17 at 15:26 +0800, Ryan Chen wrote:
> This series implements Aspeed SDIO driver. In Aspeed SDIO controller
> with two slots and have a global register for interrupt status and other
> general information.
> 
> v2 
> Change irqchip driver(irq-aspeed-sdhci-ic.c) to aspeed sdhci core driver
> aspeed-sdhci-core.c

Thanks, that's much better I think.

Cheers,
Ben.

> 
> v0
> For implements this, it will have have irq-aspeed-sdhci-ic.c for sdhci
> each slot irq dispatch, and then go to sdhci driver handle (sdhci.c).
> 
> Another is sdhci-of-aspeed.c for specific function call.
> 
> 
> Ryan Chen
> 
> 
> Ryan Chen (7):
>   clk: Aspeed: Modify clk-aspeed.c driver probe sequence
>   clk: Aspeed: Add sdhci reset and clock
>   mmc: Aspeed: Add Aspeed sdhci core driver
>   mmc: Aspeed: Add driver for Aspeed sdhci
>   dts: Aspeed: Add devicetree for Aspeed sdhci
>   Documentation: mmc: add aspeed sdhci binding document
>   configs: Aspeed: enable mmc host in defconfig
> 
>  .../bindings/mmc/aspeed,aspeed-sdhci.txt           |  54 +++++++
>  arch/arm/boot/dts/aspeed-ast2500-evb.dts           |  14 ++
>  arch/arm/boot/dts/aspeed-g4.dtsi                   |  40 +++++
>  arch/arm/boot/dts/aspeed-g5.dtsi                   |  40 +++++
>  arch/arm/configs/aspeed_g5_defconfig               |   6 +
>  drivers/clk/clk-aspeed.c                           |  51 +++---
>  drivers/irqchip/Makefile                           |   2 +-
>  drivers/mmc/host/Kconfig                           |  12 ++
>  drivers/mmc/host/Makefile                          |   1 +
>  drivers/mmc/host/aspeed-sdhci-core.c               | 147 +++++++++++++++++
>  drivers/mmc/host/sdhci-of-aspeed.c                 | 178 +++++++++++++++++++++
>  include/dt-bindings/clock/aspeed-clock.h           |   2 +-
>  include/linux/mmc/sdhci-aspeed-data.h              |  28 ++++
>  13 files changed, 553 insertions(+), 22 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/mmc/aspeed,aspeed-sdhci.txt
>  create mode 100644 drivers/mmc/host/aspeed-sdhci-core.c
>  create mode 100644 drivers/mmc/host/sdhci-of-aspeed.c
>  create mode 100644 include/linux/mmc/sdhci-aspeed-data.h
> 

Re: [PATCHv2 linux dev-4.17 0/7] mmc/host: Add Aspeed SDIO driver

[Alexander Amelkin]

[-- Attachment #1.1: Type: text/plain, Size: 2410 bytes --]

Guys, what's the fate of this patch set?
Is going to be merged into openbmc linux?
We have an SD card slot on our BMC card and so would like to know whether or not to await arrival of SDIO support from upstream or import this patch set locally.

Thank you.

17.07.2018 10:26, Ryan Chen wrote:
> This series implements Aspeed SDIO driver. In Aspeed SDIO controller
> with two slots and have a global register for interrupt status and other
> general information.
>
> v2 
> Change irqchip driver(irq-aspeed-sdhci-ic.c) to aspeed sdhci core driver
> aspeed-sdhci-core.c
>
> v0
> For implements this, it will have have irq-aspeed-sdhci-ic.c for sdhci
> each slot irq dispatch, and then go to sdhci driver handle (sdhci.c).
>
> Another is sdhci-of-aspeed.c for specific function call.
>
>
> Ryan Chen
>
>
> Ryan Chen (7):
>   clk: Aspeed: Modify clk-aspeed.c driver probe sequence
>   clk: Aspeed: Add sdhci reset and clock
>   mmc: Aspeed: Add Aspeed sdhci core driver
>   mmc: Aspeed: Add driver for Aspeed sdhci
>   dts: Aspeed: Add devicetree for Aspeed sdhci
>   Documentation: mmc: add aspeed sdhci binding document
>   configs: Aspeed: enable mmc host in defconfig
>
>  .../bindings/mmc/aspeed,aspeed-sdhci.txt           |  54 +++++++
>  arch/arm/boot/dts/aspeed-ast2500-evb.dts           |  14 ++
>  arch/arm/boot/dts/aspeed-g4.dtsi                   |  40 +++++
>  arch/arm/boot/dts/aspeed-g5.dtsi                   |  40 +++++
>  arch/arm/configs/aspeed_g5_defconfig               |   6 +
>  drivers/clk/clk-aspeed.c                           |  51 +++---
>  drivers/irqchip/Makefile                           |   2 +-
>  drivers/mmc/host/Kconfig                           |  12 ++
>  drivers/mmc/host/Makefile                          |   1 +
>  drivers/mmc/host/aspeed-sdhci-core.c               | 147 +++++++++++++++++
>  drivers/mmc/host/sdhci-of-aspeed.c                 | 178 +++++++++++++++++++++
>  include/dt-bindings/clock/aspeed-clock.h           |   2 +-
>  include/linux/mmc/sdhci-aspeed-data.h              |  28 ++++
>  13 files changed, 553 insertions(+), 22 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/mmc/aspeed,aspeed-sdhci.txt
>  create mode 100644 drivers/mmc/host/aspeed-sdhci-core.c
>  create mode 100644 drivers/mmc/host/sdhci-of-aspeed.c
>  create mode 100644 include/linux/mmc/sdhci-aspeed-data.h
>


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RE: [PATCHv2 linux dev-4.17 0/7] mmc/host: Add Aspeed SDIO driver

[Ryan Chen]

Hello,
	I got some feedback from maintainer. I will modify for new architecture, hopeful, I will apply new patch at March.  

Rayn

-----Original Message-----
From: openbmc [mailto:openbmc-bounces+ryan_chen=aspeedtech.com@lists.ozlabs.org] On Behalf Of Alexander Amelkin
Sent: Friday, February 15, 2019 6:36 PM
To: openbmc@lists.ozlabs.org
Subject: Re: [PATCHv2 linux dev-4.17 0/7] mmc/host: Add Aspeed SDIO driver

Guys, what's the fate of this patch set?
Is going to be merged into openbmc linux?
We have an SD card slot on our BMC card and so would like to know whether or not to await arrival of SDIO support from upstream or import this patch set locally.

Thank you.

17.07.2018 10:26, Ryan Chen wrote:
> This series implements Aspeed SDIO driver. In Aspeed SDIO controller 
> with two slots and have a global register for interrupt status and 
> other general information.
>
> v2
> Change irqchip driver(irq-aspeed-sdhci-ic.c) to aspeed sdhci core 
> driver aspeed-sdhci-core.c
>
> v0
> For implements this, it will have have irq-aspeed-sdhci-ic.c for sdhci 
> each slot irq dispatch, and then go to sdhci driver handle (sdhci.c).
>
> Another is sdhci-of-aspeed.c for specific function call.
>
>
> Ryan Chen
>
>
> Ryan Chen (7):
>   clk: Aspeed: Modify clk-aspeed.c driver probe sequence
>   clk: Aspeed: Add sdhci reset and clock
>   mmc: Aspeed: Add Aspeed sdhci core driver
>   mmc: Aspeed: Add driver for Aspeed sdhci
>   dts: Aspeed: Add devicetree for Aspeed sdhci
>   Documentation: mmc: add aspeed sdhci binding document
>   configs: Aspeed: enable mmc host in defconfig
>
>  .../bindings/mmc/aspeed,aspeed-sdhci.txt           |  54 +++++++
>  arch/arm/boot/dts/aspeed-ast2500-evb.dts           |  14 ++
>  arch/arm/boot/dts/aspeed-g4.dtsi                   |  40 +++++
>  arch/arm/boot/dts/aspeed-g5.dtsi                   |  40 +++++
>  arch/arm/configs/aspeed_g5_defconfig               |   6 +
>  drivers/clk/clk-aspeed.c                           |  51 +++---
>  drivers/irqchip/Makefile                           |   2 +-
>  drivers/mmc/host/Kconfig                           |  12 ++
>  drivers/mmc/host/Makefile                          |   1 +
>  drivers/mmc/host/aspeed-sdhci-core.c               | 147 +++++++++++++++++
>  drivers/mmc/host/sdhci-of-aspeed.c                 | 178 +++++++++++++++++++++
>  include/dt-bindings/clock/aspeed-clock.h           |   2 +-
>  include/linux/mmc/sdhci-aspeed-data.h              |  28 ++++
>  13 files changed, 553 insertions(+), 22 deletions(-)  create mode 
> 100644 Documentation/devicetree/bindings/mmc/aspeed,aspeed-sdhci.txt
>  create mode 100644 drivers/mmc/host/aspeed-sdhci-core.c
>  create mode 100644 drivers/mmc/host/sdhci-of-aspeed.c
>  create mode 100644 include/linux/mmc/sdhci-aspeed-data.h
>

Re: [PATCHv2 linux dev-4.17 0/7] mmc/host: Add Aspeed SDIO driver

[Alexander Amelkin]

[-- Attachment #1.1: Type: text/plain, Size: 3310 bytes --]

Hi, Ryan!

How is it going? We've tried the original version of your patch and it didn't apply for us due to a typo. We've fixed the typo, but it still doesn't work. We're not sure yet why. Have you verified that old patch on any real hardware? When do you think you'll be able to come up with the new version of the patch?

Thank you.

Alexander.

16.02.2019 9:20, Ryan Chen wrote:
> Hello,
> 	I got some feedback from maintainer. I will modify for new architecture, hopeful, I will apply new patch at March.  
>
> Rayn
>
> -----Original Message-----
> From: openbmc [mailto:openbmc-bounces+ryan_chen=aspeedtech.com@lists.ozlabs.org] On Behalf Of Alexander Amelkin
> Sent: Friday, February 15, 2019 6:36 PM
> To: openbmc@lists.ozlabs.org
> Subject: Re: [PATCHv2 linux dev-4.17 0/7] mmc/host: Add Aspeed SDIO driver
>
> Guys, what's the fate of this patch set?
> Is going to be merged into openbmc linux?
> We have an SD card slot on our BMC card and so would like to know whether or not to await arrival of SDIO support from upstream or import this patch set locally.
>
> Thank you.
>
> 17.07.2018 10:26, Ryan Chen wrote:
>> This series implements Aspeed SDIO driver. In Aspeed SDIO controller 
>> with two slots and have a global register for interrupt status and 
>> other general information.
>>
>> v2
>> Change irqchip driver(irq-aspeed-sdhci-ic.c) to aspeed sdhci core 
>> driver aspeed-sdhci-core.c
>>
>> v0
>> For implements this, it will have have irq-aspeed-sdhci-ic.c for sdhci 
>> each slot irq dispatch, and then go to sdhci driver handle (sdhci.c).
>>
>> Another is sdhci-of-aspeed.c for specific function call.
>>
>>
>> Ryan Chen
>>
>>
>> Ryan Chen (7):
>>   clk: Aspeed: Modify clk-aspeed.c driver probe sequence
>>   clk: Aspeed: Add sdhci reset and clock
>>   mmc: Aspeed: Add Aspeed sdhci core driver
>>   mmc: Aspeed: Add driver for Aspeed sdhci
>>   dts: Aspeed: Add devicetree for Aspeed sdhci
>>   Documentation: mmc: add aspeed sdhci binding document
>>   configs: Aspeed: enable mmc host in defconfig
>>
>>  .../bindings/mmc/aspeed,aspeed-sdhci.txt           |  54 +++++++
>>  arch/arm/boot/dts/aspeed-ast2500-evb.dts           |  14 ++
>>  arch/arm/boot/dts/aspeed-g4.dtsi                   |  40 +++++
>>  arch/arm/boot/dts/aspeed-g5.dtsi                   |  40 +++++
>>  arch/arm/configs/aspeed_g5_defconfig               |   6 +
>>  drivers/clk/clk-aspeed.c                           |  51 +++---
>>  drivers/irqchip/Makefile                           |   2 +-
>>  drivers/mmc/host/Kconfig                           |  12 ++
>>  drivers/mmc/host/Makefile                          |   1 +
>>  drivers/mmc/host/aspeed-sdhci-core.c               | 147 +++++++++++++++++
>>  drivers/mmc/host/sdhci-of-aspeed.c                 | 178 +++++++++++++++++++++
>>  include/dt-bindings/clock/aspeed-clock.h           |   2 +-
>>  include/linux/mmc/sdhci-aspeed-data.h              |  28 ++++
>>  13 files changed, 553 insertions(+), 22 deletions(-)  create mode 
>> 100644 Documentation/devicetree/bindings/mmc/aspeed,aspeed-sdhci.txt
>>  create mode 100644 drivers/mmc/host/aspeed-sdhci-core.c
>>  create mode 100644 drivers/mmc/host/sdhci-of-aspeed.c
>>  create mode 100644 include/linux/mmc/sdhci-aspeed-data.h
>>


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RE: [PATCHv2 linux dev-4.17 0/7] mmc/host: Add Aspeed SDIO driver

[Ryan Chen]

Hello Alexander,
		The original version is patch on v4.17.4, it can build with the patch. Does there have any message? 
		Currently I am ongoing on new version SOC chip also with new adhci, and will apply patch at June. 
Ryan

>>How is it going? We've tried the original version of your patch and it didn't apply for us due to a typo. We've fixed the typo, but it still doesn't work. >>We're not sure yet why. Have you verified that old patch on any real hardware? When do you think you'll be able to come up with the new version of >>the patch?

>>Thank you.

>>Alexander.

16.02.2019 9:20, Ryan Chen wrote:
> Hello,
> 	I got some feedback from maintainer. I will modify for new architecture, hopeful, I will apply new patch at March.  
>
> Rayn
>
> -----Original Message-----
> From: openbmc 
> [mailto:openbmc-bounces+ryan_chen=aspeedtech.com@lists.ozlabs.org] On 
> Behalf Of Alexander Amelkin
> Sent: Friday, February 15, 2019 6:36 PM
> To: openbmc@lists.ozlabs.org
> Subject: Re: [PATCHv2 linux dev-4.17 0/7] mmc/host: Add Aspeed SDIO 
> driver
>
> Guys, what's the fate of this patch set?
> Is going to be merged into openbmc linux?
> We have an SD card slot on our BMC card and so would like to know whether or not to await arrival of SDIO support from upstream or import this patch set locally.
>
> Thank you.
>
> 17.07.2018 10:26, Ryan Chen wrote:
>> This series implements Aspeed SDIO driver. In Aspeed SDIO controller 
>> with two slots and have a global register for interrupt status and 
>> other general information.
>>
>> v2
>> Change irqchip driver(irq-aspeed-sdhci-ic.c) to aspeed sdhci core 
>> driver aspeed-sdhci-core.c
>>
>> v0
>> For implements this, it will have have irq-aspeed-sdhci-ic.c for 
>> sdhci each slot irq dispatch, and then go to sdhci driver handle (sdhci.c).
>>
>> Another is sdhci-of-aspeed.c for specific function call.
>>
>>
>> Ryan Chen
>>
>>
>> Ryan Chen (7):
>>   clk: Aspeed: Modify clk-aspeed.c driver probe sequence
>>   clk: Aspeed: Add sdhci reset and clock
>>   mmc: Aspeed: Add Aspeed sdhci core driver
>>   mmc: Aspeed: Add driver for Aspeed sdhci
>>   dts: Aspeed: Add devicetree for Aspeed sdhci
>>   Documentation: mmc: add aspeed sdhci binding document
>>   configs: Aspeed: enable mmc host in defconfig
>>
>>  .../bindings/mmc/aspeed,aspeed-sdhci.txt           |  54 +++++++
>>  arch/arm/boot/dts/aspeed-ast2500-evb.dts           |  14 ++
>>  arch/arm/boot/dts/aspeed-g4.dtsi                   |  40 +++++
>>  arch/arm/boot/dts/aspeed-g5.dtsi                   |  40 +++++
>>  arch/arm/configs/aspeed_g5_defconfig               |   6 +
>>  drivers/clk/clk-aspeed.c                           |  51 +++---
>>  drivers/irqchip/Makefile                           |   2 +-
>>  drivers/mmc/host/Kconfig                           |  12 ++
>>  drivers/mmc/host/Makefile                          |   1 +
>>  drivers/mmc/host/aspeed-sdhci-core.c               | 147 +++++++++++++++++
>>  drivers/mmc/host/sdhci-of-aspeed.c                 | 178 +++++++++++++++++++++
>>  include/dt-bindings/clock/aspeed-clock.h           |   2 +-
>>  include/linux/mmc/sdhci-aspeed-data.h              |  28 ++++
>>  13 files changed, 553 insertions(+), 22 deletions(-)  create mode
>> 100644 Documentation/devicetree/bindings/mmc/aspeed,aspeed-sdhci.txt
>>  create mode 100644 drivers/mmc/host/aspeed-sdhci-core.c
>>  create mode 100644 drivers/mmc/host/sdhci-of-aspeed.c
>>  create mode 100644 include/linux/mmc/sdhci-aspeed-data.h
>>

Re: [PATCHv2 linux dev-4.17 0/7] mmc/host: Add Aspeed SDIO driver

[Alexander Amelkin]

[-- Attachment #1.1: Type: text/plain, Size: 4016 bytes --]

Thanks Ryan.

After fixing a typo in your patch (ASPEED_CLK_GATE_SDCLKLK instead of ASPEED_CLK_GATE_SDCLK) and building the driver,
we've found a minor hardware issue in our design that prevented the driver from working with our board.
We've fixed it and it works for us now. Anyway, it would be great to see the driver upstreamed.

Alexander.

13.03.2019 3:29, Ryan Chen wrote:
> Hello Alexander,
> 		The original version is patch on v4.17.4, it can build with the patch. Does there have any message? 
> 		Currently I am ongoing on new version SOC chip also with new adhci, and will apply patch at June. 
> Ryan
>
>>> How is it going? We've tried the original version of your patch and it didn't apply for us due to a typo. We've fixed the typo, but it still doesn't work. >>We're not sure yet why. Have you verified that old patch on any real hardware? When do you think you'll be able to come up with the new version of >>the patch?
>>> Thank you.
>>> Alexander.
> 16.02.2019 9:20, Ryan Chen wrote:
>> Hello,
>> 	I got some feedback from maintainer. I will modify for new architecture, hopeful, I will apply new patch at March.  
>>
>> Rayn
>>
>> -----Original Message-----
>> From: openbmc 
>> [mailto:openbmc-bounces+ryan_chen=aspeedtech.com@lists.ozlabs.org] On 
>> Behalf Of Alexander Amelkin
>> Sent: Friday, February 15, 2019 6:36 PM
>> To: openbmc@lists.ozlabs.org
>> Subject: Re: [PATCHv2 linux dev-4.17 0/7] mmc/host: Add Aspeed SDIO 
>> driver
>>
>> Guys, what's the fate of this patch set?
>> Is going to be merged into openbmc linux?
>> We have an SD card slot on our BMC card and so would like to know whether or not to await arrival of SDIO support from upstream or import this patch set locally.
>>
>> Thank you.
>>
>> 17.07.2018 10:26, Ryan Chen wrote:
>>> This series implements Aspeed SDIO driver. In Aspeed SDIO controller 
>>> with two slots and have a global register for interrupt status and 
>>> other general information.
>>>
>>> v2
>>> Change irqchip driver(irq-aspeed-sdhci-ic.c) to aspeed sdhci core 
>>> driver aspeed-sdhci-core.c
>>>
>>> v0
>>> For implements this, it will have have irq-aspeed-sdhci-ic.c for 
>>> sdhci each slot irq dispatch, and then go to sdhci driver handle (sdhci.c).
>>>
>>> Another is sdhci-of-aspeed.c for specific function call.
>>>
>>>
>>> Ryan Chen
>>>
>>>
>>> Ryan Chen (7):
>>>   clk: Aspeed: Modify clk-aspeed.c driver probe sequence
>>>   clk: Aspeed: Add sdhci reset and clock
>>>   mmc: Aspeed: Add Aspeed sdhci core driver
>>>   mmc: Aspeed: Add driver for Aspeed sdhci
>>>   dts: Aspeed: Add devicetree for Aspeed sdhci
>>>   Documentation: mmc: add aspeed sdhci binding document
>>>   configs: Aspeed: enable mmc host in defconfig
>>>
>>>  .../bindings/mmc/aspeed,aspeed-sdhci.txt           |  54 +++++++
>>>  arch/arm/boot/dts/aspeed-ast2500-evb.dts           |  14 ++
>>>  arch/arm/boot/dts/aspeed-g4.dtsi                   |  40 +++++
>>>  arch/arm/boot/dts/aspeed-g5.dtsi                   |  40 +++++
>>>  arch/arm/configs/aspeed_g5_defconfig               |   6 +
>>>  drivers/clk/clk-aspeed.c                           |  51 +++---
>>>  drivers/irqchip/Makefile                           |   2 +-
>>>  drivers/mmc/host/Kconfig                           |  12 ++
>>>  drivers/mmc/host/Makefile                          |   1 +
>>>  drivers/mmc/host/aspeed-sdhci-core.c               | 147 +++++++++++++++++
>>>  drivers/mmc/host/sdhci-of-aspeed.c                 | 178 +++++++++++++++++++++
>>>  include/dt-bindings/clock/aspeed-clock.h           |   2 +-
>>>  include/linux/mmc/sdhci-aspeed-data.h              |  28 ++++
>>>  13 files changed, 553 insertions(+), 22 deletions(-)  create mode
>>> 100644 Documentation/devicetree/bindings/mmc/aspeed,aspeed-sdhci.txt
>>>  create mode 100644 drivers/mmc/host/aspeed-sdhci-core.c
>>>  create mode 100644 drivers/mmc/host/sdhci-of-aspeed.c
>>>  create mode 100644 include/linux/mmc/sdhci-aspeed-data.h
>>>


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Re: [PATCHv2 linux dev-4.17 0/7] mmc/host: Add Aspeed SDIO driver

[Joel Stanley]

On Fri, 22 Mar 2019 at 23:00, Alexander Amelkin <a.amelkin@yadro.com> wrote:
> After fixing a typo in your patch (ASPEED_CLK_GATE_SDCLKLK instead of ASPEED_CLK_GATE_SDCLK) and building the driver,
> we've found a minor hardware issue in our design that prevented the driver from working with our board.
> We've fixed it and it works for us now. Anyway, it would be great to see the driver upstreamed.

We can apply it to the openbmc tree if that would help. I can't seem
to find Ryan's v2.

Alexander, if you want to post the version that you tested to the
openbmc list I can apply that.

Cheers,

Joel

[PATCHv2-modified dev-4.19 0/7] Add support for ASPEED SDHCI controller

[Alexander Amelkin]

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11.04.2019 15:33, Joel Stanley wrote:
> Alexander, if you want to post the version that you tested to the
> openbmc list I can apply that.

Sure, Joel, that would be great!

This series of patches is based on the original patchwork submitted
by Ryan Chen here: https://patchwork.ozlabs.org/cover/942313/

The patch set has been updated by YADRO to cleanly apply and build
for dev-4.19 branch of OpenBMC linux kernel.

This patch works fine for us with our AST2400 BMC on VESNIN.

With best regards,
Alexander Amelkin,
Leading BMC Software Engineer,
YADRO, https://yadro.com

Original cover letter:
----------------------------
This series implements Aspeed SDIO driver. In Aspeed SDIO controller
with two slots and have a global register for interrupt status and other
general information.

For implements this, it will have have irq-aspeed-sdhci-ic.c for sdhci
each slot irq dispatch, and then go to sdhci driver handle (sdhci.c).

Another is sdhci-of-aspeed.c for specific function call.

Ryan Chen
----------------------------


Ryan Chen (7):
  clk: Aspeed: Modify clk-aspeed.c driver probe sequence
  clk: Aspeed: Add sdhci reset and clock
  irqchip: Aspeed: Add Aspeed sdhci irq driver
  dts: Aspeed: Add Aspeed sdhci dts document
  mmc: Aspeed: Add driver for Aspeed sdhci
  dts: Aspeed: Add devicetree for Aspeed sdhci
  configs: Aspeed: enable mmc host in defconfig

 .../aspeed,aspeed-sdhci-ic.txt                     |  25 +++
 .../bindings/mmc/aspeed,aspeed-sdhci.txt           |  42 +++++
 arch/arm/boot/dts/aspeed-ast2500-evb.dts           |  14 ++
 arch/arm/boot/dts/aspeed-g4.dtsi                   |  40 +++++
 arch/arm/boot/dts/aspeed-g5.dtsi                   |  40 +++++
 arch/arm/configs/aspeed_g5_defconfig               |   6 +
 drivers/clk/clk-aspeed.c                           |  15 +-
 drivers/irqchip/Makefile                           |   2 +-
 drivers/irqchip/irq-aspeed-sdhci-ic.c              | 147 +++++++++++++++++
 drivers/mmc/host/Kconfig                           |  12 ++
 drivers/mmc/host/Makefile                          |   1 +
 drivers/mmc/host/sdhci-of-aspeed.c                 | 178 +++++++++++++++++++++
 include/dt-bindings/clock/aspeed-clock.h           |   2 +-
 include/linux/mmc/sdhci-aspeed-data.h              |  28 ++++
 14 files changed, 548 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,aspeed-sdhci-ic.txt
 create mode 100644 Documentation/devicetree/bindings/mmc/aspeed,aspeed-sdhci.txt
 create mode 100644 drivers/irqchip/irq-aspeed-sdhci-ic.c
 create mode 100644 drivers/mmc/host/sdhci-of-aspeed.c
 create mode 100644 include/linux/mmc/sdhci-aspeed-data.h

-- 
2.7.4



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Re: [PATCHv2-modified dev-4.19 0/7] Add support for ASPEED SDHCI controller

[Andrew Jeffery]

On Tue, 16 Apr 2019, at 20:34, Alexander Amelkin wrote:
> 11.04.2019 15:33, Joel Stanley wrote:
> > Alexander, if you want to post the version that you tested to the
> > openbmc list I can apply that.
> 
> Sure, Joel, that would be great!
> 
> This series of patches is based on the original patchwork submitted
> by Ryan Chen here: https://patchwork.ozlabs.org/cover/942313/
> 
> The patch set has been updated by YADRO to cleanly apply and build
> for dev-4.19 branch of OpenBMC linux kernel.
> 
> This patch works fine for us with our AST2400 BMC on VESNIN.

Thanks for posting the tested series.

Any chance you can rebase on dev-5.0?

Andrew

> 
> With best regards,
> Alexander Amelkin,
> Leading BMC Software Engineer,
> YADRO, https://yadro.com
> 
> Original cover letter:
> ----------------------------
> This series implements Aspeed SDIO driver. In Aspeed SDIO controller
> with two slots and have a global register for interrupt status and other
> general information.
> 
> For implements this, it will have have irq-aspeed-sdhci-ic.c for sdhci
> each slot irq dispatch, and then go to sdhci driver handle (sdhci.c).
> 
> Another is sdhci-of-aspeed.c for specific function call.
> 
> Ryan Chen
> ----------------------------
> 
> 
> Ryan Chen (7):
>   clk: Aspeed: Modify clk-aspeed.c driver probe sequence
>   clk: Aspeed: Add sdhci reset and clock
>   irqchip: Aspeed: Add Aspeed sdhci irq driver
>   dts: Aspeed: Add Aspeed sdhci dts document
>   mmc: Aspeed: Add driver for Aspeed sdhci
>   dts: Aspeed: Add devicetree for Aspeed sdhci
>   configs: Aspeed: enable mmc host in defconfig
> 
>  .../aspeed,aspeed-sdhci-ic.txt                     |  25 +++
>  .../bindings/mmc/aspeed,aspeed-sdhci.txt           |  42 +++++
>  arch/arm/boot/dts/aspeed-ast2500-evb.dts           |  14 ++
>  arch/arm/boot/dts/aspeed-g4.dtsi                   |  40 +++++
>  arch/arm/boot/dts/aspeed-g5.dtsi                   |  40 +++++
>  arch/arm/configs/aspeed_g5_defconfig               |   6 +
>  drivers/clk/clk-aspeed.c                           |  15 +-
>  drivers/irqchip/Makefile                           |   2 +-
>  drivers/irqchip/irq-aspeed-sdhci-ic.c              | 147 
> +++++++++++++++++
>  drivers/mmc/host/Kconfig                           |  12 ++
>  drivers/mmc/host/Makefile                          |   1 +
>  drivers/mmc/host/sdhci-of-aspeed.c                 | 178 
> +++++++++++++++++++++
>  include/dt-bindings/clock/aspeed-clock.h           |   2 +-
>  include/linux/mmc/sdhci-aspeed-data.h              |  28 ++++
>  14 files changed, 548 insertions(+), 4 deletions(-)
>  create mode 100644 
> Documentation/devicetree/bindings/interrupt-controller/aspeed,aspeed-sdhci-ic.txt
>  create mode 100644 
> Documentation/devicetree/bindings/mmc/aspeed,aspeed-sdhci.txt
>  create mode 100644 drivers/irqchip/irq-aspeed-sdhci-ic.c
>  create mode 100644 drivers/mmc/host/sdhci-of-aspeed.c
>  create mode 100644 include/linux/mmc/sdhci-aspeed-data.h
> 
> -- 
> 2.7.4
> 
> 
> 
> Attachments:
> * signature.asc