* [PATCH linux dev-5.10 1/2] soc: aspeed: Re-enable FWH2AHB on AST2600
2021-06-29 7:35 [PATCH linux dev-5.10 0/2] soc: aspeed: Reenable devices Joel Stanley
@ 2021-06-29 7:35 ` Joel Stanley
2021-06-29 7:35 ` [PATCH linux dev-5.10 2/2] soc: aspeed: Re-enable XDMA " Joel Stanley
1 sibling, 0 replies; 4+ messages in thread
From: Joel Stanley @ 2021-06-29 7:35 UTC (permalink / raw)
To: Andrew Jeffery; +Cc: openbmc, Eddie James
Recent builds of the vendor u-boot tree disable features of the
BMC that may allow unwanted access if not correctly configured. This
includes the firmware hub to ahb bridge (FWH2AHB), which is used by this
driver.
The bit to "un-disable" it is in the SCU. Set it only when the ioctl is
called and we are running on the ast2600, as to not open up the
'backdoor' unless there's userspace trying to use it.
Fixes: deb50313ba83 ("soc: aspeed-lpc-ctrl: LPC to AHB mapping on ast2600")
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
drivers/soc/aspeed/aspeed-lpc-ctrl.c | 29 ++++++++++++++++++++++------
1 file changed, 23 insertions(+), 6 deletions(-)
diff --git a/drivers/soc/aspeed/aspeed-lpc-ctrl.c b/drivers/soc/aspeed/aspeed-lpc-ctrl.c
index c557ffd0992c..3ba4cee037f1 100644
--- a/drivers/soc/aspeed/aspeed-lpc-ctrl.c
+++ b/drivers/soc/aspeed/aspeed-lpc-ctrl.c
@@ -37,6 +37,7 @@ struct aspeed_lpc_ctrl {
u32 pnor_size;
u32 pnor_base;
bool fwh2ahb;
+ struct regmap *scu;
};
static struct aspeed_lpc_ctrl *file_aspeed_lpc_ctrl(struct file *file)
@@ -183,13 +184,22 @@ static long aspeed_lpc_ctrl_ioctl(struct file *file, unsigned int cmd,
/*
* Switch to FWH2AHB mode, AST2600 only.
- *
- * The other bits in this register are interrupt status bits
- * that are cleared by writing 1. As we don't want to clear
- * them, set only the bit of interest.
*/
- if (lpc_ctrl->fwh2ahb)
+ if (lpc_ctrl->fwh2ahb) {
+ /*
+ * Enable FWH2AHB in SCU debug control register 2. This
+ * does not turn it on, but makes it available for it
+ * to be configured in HICR6.
+ */
+ regmap_update_bits(lpc_ctrl->scu, 0x0D8, BIT(2), 0);
+
+ /*
+ * The other bits in this register are interrupt status bits
+ * that are cleared by writing 1. As we don't want to clear
+ * them, set only the bit of interest.
+ */
regmap_write(lpc_ctrl->regmap, HICR6, SW_FWH2AHB);
+ }
/*
* Enable LPC FHW cycles. This is required for the host to
@@ -296,9 +306,16 @@ static int aspeed_lpc_ctrl_probe(struct platform_device *pdev)
return rc;
}
- if (of_device_is_compatible(dev->of_node, "aspeed,ast2600-lpc-ctrl"))
+ if (of_device_is_compatible(dev->of_node, "aspeed,ast2600-lpc-ctrl")) {
lpc_ctrl->fwh2ahb = true;
+ lpc_ctrl->scu = syscon_regmap_lookup_by_compatible("aspeed,ast2600-scu");
+ if (IS_ERR(lpc_ctrl->scu)) {
+ dev_err(dev, "couldn't find scu\n");
+ return PTR_ERR(lpc_ctrl->scu);
+ }
+ }
+
lpc_ctrl->miscdev.minor = MISC_DYNAMIC_MINOR;
lpc_ctrl->miscdev.name = DEVICE_NAME;
lpc_ctrl->miscdev.fops = &aspeed_lpc_ctrl_fops;
--
2.32.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH linux dev-5.10 2/2] soc: aspeed: Re-enable XDMA on AST2600
2021-06-29 7:35 [PATCH linux dev-5.10 0/2] soc: aspeed: Reenable devices Joel Stanley
2021-06-29 7:35 ` [PATCH linux dev-5.10 1/2] soc: aspeed: Re-enable FWH2AHB on AST2600 Joel Stanley
@ 2021-06-29 7:35 ` Joel Stanley
2021-06-30 1:29 ` Eddie James
1 sibling, 1 reply; 4+ messages in thread
From: Joel Stanley @ 2021-06-29 7:35 UTC (permalink / raw)
To: Andrew Jeffery; +Cc: openbmc, Eddie James
Recent builds of the vendor u-boot tree disable features of the
BMC that may allow unwanted access if not correctly configured. This
includes the PCIe DMA (XDMA) functionality.
The bit to "un-disable" it is in the SCU. It does not appear to matter
when it is cleared, as long as it is cleared before attempting a
transfer.
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
drivers/soc/aspeed/aspeed-xdma.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/aspeed/aspeed-xdma.c b/drivers/soc/aspeed/aspeed-xdma.c
index e6b4744bda64..48cfe30c90ad 100644
--- a/drivers/soc/aspeed/aspeed-xdma.c
+++ b/drivers/soc/aspeed/aspeed-xdma.c
@@ -34,6 +34,9 @@
#define SCU_AST2600_MISC_CTRL 0x0c0
#define SCU_AST2600_MISC_CTRL_XDMA_BMC BIT(8)
+#define SCU_AST2600_DEBUG_CTRL 0x0c8
+#define DEBUG_CTRL_XDMA_DISABLE BIT(2)
+
#define SCU_AST2500_PCIE_CONF 0x180
#define SCU_AST2600_PCIE_CONF 0xc20
#define SCU_PCIE_CONF_VGA_EN BIT(0)
@@ -831,10 +834,15 @@ static int aspeed_xdma_init_scu(struct aspeed_xdma *ctx, struct device *dev)
regmap_update_bits(scu, ctx->chip->scu_pcie_conf, bmc | vga,
selection);
- if (ctx->chip->scu_misc_ctrl)
+ if (ctx->chip->scu_misc_ctrl) {
regmap_update_bits(scu, ctx->chip->scu_misc_ctrl,
SCU_AST2600_MISC_CTRL_XDMA_BMC,
SCU_AST2600_MISC_CTRL_XDMA_BMC);
+
+ /* Allow XDMA to be used on AST2600 */
+ regmap_update_bits(scu, SCU_AST2600_DEBUG_CTRL,
+ DEBUG_CTRL_XDMA_DISABLE, 0);
+ }
} else {
dev_warn(dev, "Unable to configure PCIe: %ld; continuing.\n",
PTR_ERR(scu));
--
2.32.0
^ permalink raw reply related [flat|nested] 4+ messages in thread