* [u-boot, v2019.04-aspeed-openbmc v2 1/1] arm: dts: Aspeed: add Bletchley dts
@ 2022-02-07 16:08 Potin Lai
2022-02-08 11:46 ` [u-boot,v2019.04-aspeed-openbmc " Joel Stanley
0 siblings, 1 reply; 2+ messages in thread
From: Potin Lai @ 2022-02-07 16:08 UTC (permalink / raw)
To: openbmc, Joel Stanley, Patrick Williams, Jamin Lin; +Cc: Potin Lai
Initial introduction of Bletchley equipped with
Aspeed 2600 BMC SoC.
Signed-off-by: Potin Lai <potin.lai@quantatw.com>
---
change v1 -> v2:
* sort Makefile alphabetically
* add licence and copyright
* update model name
* remove the nodes not using (fsi, emmc, sdhci, ehci, pcie & display_port)
---
arch/arm/dts/Makefile | 9 +-
arch/arm/dts/ast2600-bletchley.dts | 223 +++++++++++++++++++++++++++++
2 files changed, 228 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/dts/ast2600-bletchley.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index df844065cd..ac93a89c07 100755
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -677,15 +677,16 @@ dtb-$(CONFIG_ARCH_BCM6858) += \
dtb-$(CONFIG_ARCH_ASPEED) += \
ast2400-evb.dtb \
ast2500-evb.dtb \
- ast2600-evb.dtb \
- ast2600-ncsi.dtb \
ast2600a0-evb.dtb \
ast2600a1-evb.dtb \
+ ast2600-bletchley.dtb \
+ ast2600-evb.dtb \
ast2600-fpga.dtb \
+ ast2600-intel.dtb \
+ ast2600-ncsi.dtb \
ast2600-rainier.dtb \
ast2600-slt.dtb \
- ast2600-tacoma.dtb \
- ast2600-intel.dtb
+ ast2600-tacoma.dtb
dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
diff --git a/arch/arm/dts/ast2600-bletchley.dts b/arch/arm/dts/ast2600-bletchley.dts
new file mode 100644
index 0000000000..2417c95f00
--- /dev/null
+++ b/arch/arm/dts/ast2600-bletchley.dts
@@ -0,0 +1,223 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2022 Meta Platforms Inc.
+/dts-v1/;
+
+#include "ast2600-u-boot.dtsi"
+
+/ {
+ model = "AST2600 Bletchley";
+ compatible = "aspeed,ast2600-bletchley", "aspeed,ast2600";
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x40000000>;
+ };
+
+ chosen {
+ stdout-path = &uart5;
+ };
+
+ aliases {
+ mmc0 = &emmc_slot0;
+ mmc1 = &sdhci_slot0;
+ mmc2 = &sdhci_slot1;
+ spi0 = &fmc;
+ spi1 = &spi1;
+ spi2 = &spi2;
+ ethernet0 = &mac0;
+ ethernet1 = &mac1;
+ ethernet2 = &mac2;
+ ethernet3 = &mac3;
+ };
+
+ cpus {
+ cpu@0 {
+ clock-frequency = <800000000>;
+ };
+ cpu@1 {
+ clock-frequency = <800000000>;
+ };
+ };
+};
+
+&uart5 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&sdrammc {
+ clock-frequency = <400000000>;
+};
+
+&wdt1 {
+ status = "okay";
+};
+
+&wdt2 {
+ status = "okay";
+};
+
+&wdt3 {
+ status = "okay";
+};
+
+&mdio {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mdio4_default>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+};
+
+&mac2 {
+ status = "okay";
+ phy-mode = "rgmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii3_default &pinctrl_mac3link_default>;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
+&fmc {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fmcquad_default>;
+
+ flash@0 {
+ compatible = "spi-flash", "sst,w25q256";
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ };
+
+ flash@1 {
+ compatible = "spi-flash", "sst,w25q256";
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ };
+
+ flash@2 {
+ compatible = "spi-flash", "sst,w25q256";
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ };
+};
+
+&spi1 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default
+ &pinctrl_spi1cs1_default &pinctrl_spi1wp_default
+ &pinctrl_spi1wp_default &pinctrl_spi1quad_default>;
+
+ flash@0 {
+ compatible = "spi-flash", "sst,w25q256";
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+
+ flash@1 {
+ compatible = "spi-flash", "sst,w25q256";
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+};
+
+&spi2 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default
+ &pinctrl_spi2cs2_default &pinctrl_spi2quad_default>;
+
+ flash@0 {
+ compatible = "spi-flash", "sst,w25q256";
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+
+ flash@1 {
+ compatible = "spi-flash", "sst,w25q256";
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+
+ flash@2 {
+ compatible = "spi-flash", "sst,w25q256";
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+};
+
+&i2c4 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c5_default>;
+};
+
+&i2c5 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c6_default>;
+};
+
+&i2c6 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c7_default>;
+};
+
+&i2c7 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c8_default>;
+};
+
+&i2c8 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c9_default>;
+};
+
+&scu {
+ mac0-clk-delay = <0x10 0x0a
+ 0x10 0x10
+ 0x10 0x10>;
+ mac1-clk-delay = <0x10 0x0a
+ 0x10 0x10
+ 0x10 0x10>;
+ mac2-clk-delay = <0x08 0x04
+ 0x08 0x04
+ 0x08 0x04>;
+ mac3-clk-delay = <0x08 0x04
+ 0x08 0x04
+ 0x08 0x04>;
+};
+
+&hace {
+ status = "okay";
+};
--
2.17.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [u-boot,v2019.04-aspeed-openbmc v2 1/1] arm: dts: Aspeed: add Bletchley dts
2022-02-07 16:08 [u-boot, v2019.04-aspeed-openbmc v2 1/1] arm: dts: Aspeed: add Bletchley dts Potin Lai
@ 2022-02-08 11:46 ` Joel Stanley
0 siblings, 0 replies; 2+ messages in thread
From: Joel Stanley @ 2022-02-08 11:46 UTC (permalink / raw)
To: Potin Lai; +Cc: OpenBMC Maillist, Jamin Lin
On Mon, 7 Feb 2022 at 16:08, Potin Lai <potin.lai@quantatw.com> wrote:
>
> Initial introduction of Bletchley equipped with
> Aspeed 2600 BMC SoC.
>
> Signed-off-by: Potin Lai <potin.lai@quantatw.com>
>
> ---
>
> change v1 -> v2:
> * sort Makefile alphabetically
> * add licence and copyright
> * update model name
> * remove the nodes not using (fsi, emmc, sdhci, ehci, pcie & display_port)
> ---
> arch/arm/dts/Makefile | 9 +-
> arch/arm/dts/ast2600-bletchley.dts | 223 +++++++++++++++++++++++++++++
> 2 files changed, 228 insertions(+), 4 deletions(-)
> create mode 100644 arch/arm/dts/ast2600-bletchley.dts
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index df844065cd..ac93a89c07 100755
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -677,15 +677,16 @@ dtb-$(CONFIG_ARCH_BCM6858) += \
> dtb-$(CONFIG_ARCH_ASPEED) += \
> ast2400-evb.dtb \
> ast2500-evb.dtb \
> - ast2600-evb.dtb \
> - ast2600-ncsi.dtb \
> ast2600a0-evb.dtb \
> ast2600a1-evb.dtb \
> + ast2600-bletchley.dtb \
> + ast2600-evb.dtb \
> ast2600-fpga.dtb \
> + ast2600-intel.dtb \
> + ast2600-ncsi.dtb \
> ast2600-rainier.dtb \
> ast2600-slt.dtb \
> - ast2600-tacoma.dtb \
> - ast2600-intel.dtb
> + ast2600-tacoma.dtb
>
> dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
>
> diff --git a/arch/arm/dts/ast2600-bletchley.dts b/arch/arm/dts/ast2600-bletchley.dts
> new file mode 100644
> index 0000000000..2417c95f00
> --- /dev/null
> +++ b/arch/arm/dts/ast2600-bletchley.dts
> @@ -0,0 +1,223 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +// Copyright (c) 2022 Meta Platforms Inc.
> +/dts-v1/;
> +
> +#include "ast2600-u-boot.dtsi"
> +
> +/ {
> + model = "AST2600 Bletchley";
> + compatible = "aspeed,ast2600-bletchley", "aspeed,ast2600";
Aspeed don't make this, do they?
Take a look at the other examples (or your device tree in the kernel,
which you should base this one on):
model = "Facebook Bletchley BMC";
compatible = "facebook,bletchley-bmc", "aspeed,ast2600"
I suggest ignoring the company rename to keep things simple, but I'll
leave that to you.
The rest looks good. Thanks!
> +
> + memory {
> + device_type = "memory";
> + reg = <0x80000000 0x40000000>;
> + };
> +
> + chosen {
> + stdout-path = &uart5;
> + };
> +
> + aliases {
> + mmc0 = &emmc_slot0;
> + mmc1 = &sdhci_slot0;
> + mmc2 = &sdhci_slot1;
> + spi0 = &fmc;
> + spi1 = &spi1;
> + spi2 = &spi2;
> + ethernet0 = &mac0;
> + ethernet1 = &mac1;
> + ethernet2 = &mac2;
> + ethernet3 = &mac3;
> + };
> +
> + cpus {
> + cpu@0 {
> + clock-frequency = <800000000>;
> + };
> + cpu@1 {
> + clock-frequency = <800000000>;
> + };
> + };
> +};
> +
> +&uart5 {
> + u-boot,dm-pre-reloc;
> + status = "okay";
> +};
> +
> +&sdrammc {
> + clock-frequency = <400000000>;
> +};
> +
> +&wdt1 {
> + status = "okay";
> +};
> +
> +&wdt2 {
> + status = "okay";
> +};
> +
> +&wdt3 {
> + status = "okay";
> +};
> +
> +&mdio {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_mdio4_default>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +};
> +
> +&mac2 {
> + status = "okay";
> + phy-mode = "rgmii";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rgmii3_default &pinctrl_mac3link_default>;
> + fixed-link {
> + speed = <1000>;
> + full-duplex;
> + };
> +};
> +
> +&fmc {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_fmcquad_default>;
> +
> + flash@0 {
> + compatible = "spi-flash", "sst,w25q256";
> + status = "okay";
> + spi-max-frequency = <50000000>;
> + spi-tx-bus-width = <2>;
> + spi-rx-bus-width = <2>;
> + };
> +
> + flash@1 {
> + compatible = "spi-flash", "sst,w25q256";
> + status = "okay";
> + spi-max-frequency = <50000000>;
> + spi-tx-bus-width = <2>;
> + spi-rx-bus-width = <2>;
> + };
> +
> + flash@2 {
> + compatible = "spi-flash", "sst,w25q256";
> + status = "okay";
> + spi-max-frequency = <50000000>;
> + spi-tx-bus-width = <2>;
> + spi-rx-bus-width = <2>;
> + };
> +};
> +
> +&spi1 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default
> + &pinctrl_spi1cs1_default &pinctrl_spi1wp_default
> + &pinctrl_spi1wp_default &pinctrl_spi1quad_default>;
> +
> + flash@0 {
> + compatible = "spi-flash", "sst,w25q256";
> + status = "okay";
> + spi-max-frequency = <50000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +
> + flash@1 {
> + compatible = "spi-flash", "sst,w25q256";
> + status = "okay";
> + spi-max-frequency = <50000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +};
> +
> +&spi2 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default
> + &pinctrl_spi2cs2_default &pinctrl_spi2quad_default>;
> +
> + flash@0 {
> + compatible = "spi-flash", "sst,w25q256";
> + status = "okay";
> + spi-max-frequency = <50000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +
> + flash@1 {
> + compatible = "spi-flash", "sst,w25q256";
> + status = "okay";
> + spi-max-frequency = <50000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +
> + flash@2 {
> + compatible = "spi-flash", "sst,w25q256";
> + status = "okay";
> + spi-max-frequency = <50000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +};
> +
> +&i2c4 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c5_default>;
> +};
> +
> +&i2c5 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c6_default>;
> +};
> +
> +&i2c6 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c7_default>;
> +};
> +
> +&i2c7 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c8_default>;
> +};
> +
> +&i2c8 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c9_default>;
> +};
> +
> +&scu {
> + mac0-clk-delay = <0x10 0x0a
> + 0x10 0x10
> + 0x10 0x10>;
> + mac1-clk-delay = <0x10 0x0a
> + 0x10 0x10
> + 0x10 0x10>;
> + mac2-clk-delay = <0x08 0x04
> + 0x08 0x04
> + 0x08 0x04>;
> + mac3-clk-delay = <0x08 0x04
> + 0x08 0x04
> + 0x08 0x04>;
> +};
> +
> +&hace {
> + status = "okay";
> +};
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2022-02-08 11:47 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-02-07 16:08 [u-boot, v2019.04-aspeed-openbmc v2 1/1] arm: dts: Aspeed: add Bletchley dts Potin Lai
2022-02-08 11:46 ` [u-boot,v2019.04-aspeed-openbmc " Joel Stanley
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).