* [PATCH 1/7] ARM: dts: nuvoton: Add Quanta GIS BMC Device Tree
@ 2023-03-03 6:34 David Wang
2023-03-03 6:34 ` [PATCH 2/7] ARM: dts: nuvoton: Add Quanta GSZ " David Wang
` (7 more replies)
0 siblings, 8 replies; 11+ messages in thread
From: David Wang @ 2023-03-03 6:34 UTC (permalink / raw)
To: arnd, olof, soc, robh+dt, krzysztof.kozlowski+dt
Cc: devicetree, David Wang, fran.hsu, benjaminfair, avifishman70,
venture, openbmc, linux-kernel, tali.perry1, linux-arm-kernel,
tmaimon77
Add the device tree for the Quanta GIS BMC and it's
based on NPCM730 SoC
Signed-off-by: David Wang <davidwang@quantatw.com>
---
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/nuvoton-npcm730-gis-pincfg.dtsi | 732 +++++++++++
arch/arm/boot/dts/nuvoton-npcm730-gis.dts | 1076 +++++++++++++++++
3 files changed, 1809 insertions(+)
create mode 100644 arch/arm/boot/dts/nuvoton-npcm730-gis-pincfg.dtsi
create mode 100644 arch/arm/boot/dts/nuvoton-npcm730-gis.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index efe4152e5846..40659106cfe1 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -396,6 +396,7 @@ dtb-$(CONFIG_ARCH_WPCM450) += \
dtb-$(CONFIG_ARCH_NPCM7XX) += \
nuvoton-npcm730-gsj.dtb \
nuvoton-npcm730-gbs.dtb \
+ nuvoton-npcm730-gis.dtb \
nuvoton-npcm730-kudo.dtb \
nuvoton-npcm750-evb.dtb \
nuvoton-npcm750-runbmc-olympus.dtb
diff --git a/arch/arm/boot/dts/nuvoton-npcm730-gis-pincfg.dtsi b/arch/arm/boot/dts/nuvoton-npcm730-gis-pincfg.dtsi
new file mode 100644
index 000000000000..6f00f337df54
--- /dev/null
+++ b/arch/arm/boot/dts/nuvoton-npcm730-gis-pincfg.dtsi
@@ -0,0 +1,732 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2020 Quanta Computer Inc. Fran.Hsu@quantatw.com
+
+/ {
+ pinctrl: pinctrl@f0800000 {
+ gpio0od_pins: gpio0od-pins {
+ pins = "GPIO0/IOX1DI";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio1_pins: gpio1-pins {
+ pins = "GPIO1/IOX1LD";
+ input-enable;
+ bias-disable;
+ };
+ gpio1pp_pins: gpio1pp-pins {
+ pins = "GPIO1/IOX1LD";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio2_pins: gpio2-pins {
+ pins = "GPIO2/IOX1CK";
+ input-enable;
+ bias-disable;
+ };
+ gpio2pp_pins: gpio2pp-pins {
+ pins = "GPIO2/IOX1CK";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio3_pins: gpio3-pins {
+ pins = "GPIO3/IOX1D0";
+ input-enable;
+ bias-disable;
+ };
+ gpio3pp_pins: gpio3pp-pins {
+ pins = "GPIO3/IOX1D0";
+ bias-disable;
+ drive-push-pull;
+ };
+ gpio4_pins: gpio4-pins {
+ pins = "GPIO4/IOX2DI/SMB1DSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio5_pins: gpio5-pins {
+ pins = "GPIO5/IOX2LD/SMB1DSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio6od_pins: gpio6od-pins {
+ pins = "GPIO6/IOX2CK/SMB2DSDA";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio7od_pins: gpio7od-pins {
+ pins = "GPIO7/IOX2D0/SMB2DSCL";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio8_pins: gpio8-pins {
+ pins = "GPIO8/LKGPO1";
+ bias-disable;
+ input-enable;
+ };
+ gpio9_pins: gpio9-pins {
+ pins = "GPIO9/LKGPO2";
+ bias-disable;
+ input-enable;
+ };
+ gpio10_pins: gpio10-pins {
+ pins = "GPIO10/IOXHLD";
+ bias-disable;
+ input-enable;
+ };
+ gpio11_pins: gpio11-pins {
+ pins = "GPIO11/IOXHCK";
+ bias-disable;
+ input-enable;
+ };
+ gpio12od_pins: gpio12od-pins {
+ pins = "GPIO12/GSPICK/SMB5BSCL";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio13_pins: gpio13-pins {
+ pins = "GPIO13/GSPIDO/SMB5BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio14_pins: gpio14-pins {
+ pins = "GPIO14/GSPIDI/SMB5CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio15od_pins: gpio15od-pins {
+ pins = "GPIO15/GSPICS/SMB5CSDA";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio16pp_pins: gpio16pp-pins {
+ pins = "GPIO16/LKGPO0";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio17_pins: gpio17-pins {
+ pins = "GPIO17/PSPI2DI/SMB4DEN";
+ bias-disable;
+ input-enable;
+ };
+ gpio18o_pins: gpio18o-pins {
+ pins = "GPIO18/PSPI2D0/SMB4BSDA";
+ bias-disable;
+ output-high;
+ };
+ gpio19ol_pins: gpio19ol-pins {
+ pins = "GPIO19/PSPI2CK/SMB4BSCL";
+ bias-disable;
+ output-low;
+ };
+ gpio20_pins: gpio20-pins {
+ pins = "GPIO20/HGPIO0/SMB4CSDA/SMB15SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio21_pins: gpio21-pins {
+ pins = "GPIO21/HGPIO1/SMB4CSCL/SMB15SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio24_pins: gpio24-pins {
+ pins = "GPIO24/HGPIO4/IOXHDO";
+ bias-disable;
+ input-enable;
+ };
+ gpio25_pins: gpio25-pins {
+ pins = "GPIO25/HGPIO5/IOXHDI";
+ bias-disable;
+ input-enable;
+ };
+ gpio26od_pins: gpio26od-pins {
+ pins = "GPIO26/SMB5SDA";
+ bias-disable;
+ output-high;
+ drive-open-drain;
+ };
+ gpio27pp_pins: gpio27pp-pins {
+ pins = "GPIO27/SMB5SCL";
+ bias-disable;
+ output-high;
+ drive-push-pull;
+ };
+ gpio37pp_pins: gpio37pp-pins {
+ pins = "GPIO37/SMB3CSDA";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio38_pins: gpio38-pins {
+ pins = "GPIO38/SMB3CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio39_pins: gpio39-pins {
+ pins = "GPIO39/SMB3BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio40_pins: gpio40-pins {
+ pins = "GPIO40/SMB3BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio59od_pins: gpio59od-pins {
+ pins = "GPIO59/HGPIO6/SMB3DSDA";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio64_pins: gpio64-pins {
+ pins = "GPIO64/FANIN0";
+ bias-disable;
+ input-enable;
+ input-debounce;
+ };
+ gpio65_pins: gpio65-pins {
+ pins = "GPIO65/FANIN1";
+ bias-disable;
+ input-enable;
+ input-debounce;
+ };
+ gpio66od_pins: gpio66od-pins {
+ pins = "GPIO66/FANIN2";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio67od_pins: gpio67od-pins {
+ pins = "GPIO67/FANIN3";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio68pp_pins: gpio68pp-pins {
+ pins = "GPIO68/FANIN4";
+ bias-disable;
+ output-high;
+ drive-push-pull;
+ };
+ gpio69pp_pins: gpio69pp-pins {
+ pins = "GPIO69/FANIN5";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio70od_pins: gpio70od-pins {
+ pins = "GPIO70/FANIN6";
+ bias-disable;
+ output-high;
+ drive-open-drain;
+ };
+ gpio71_pins: gpio71-pins {
+ pins = "GPIO71/FANIN7";
+ bias-disable;
+ input-enable;
+ };
+ gpio72od_pins: gpio72od-pins {
+ pins = "GPIO72/FANIN8";
+ bias-disable;
+ output-high;
+ drive-open-drain;
+ };
+ gpio73_pins: gpio73-pins {
+ pins = "GPIO73/FANIN9";
+ bias-disable;
+ input-enable;
+ };
+ gpio74_pins: gpio74-pins {
+ pins = "GPIO74/FANIN10";
+ bias-disable;
+ input-enable;
+ };
+ gpio75pp_pins: gpio75pp-pins {
+ pins = "GPIO75/FANIN11";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio76od_pins: gpio76od-pins {
+ pins = "GPIO76/FANIN12";
+ bias-disable;
+ output-low;
+ drive-open-drain;
+ };
+ gpio77od_pins: gpio77od-pins {
+ pins = "GPIO77/FANIN13";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio78_pins: gpio78-pins {
+ pins = "GPIO78/FANIN14";
+ bias-disable;
+ input-enable;
+ };
+ gpio79_pins: gpio79-pins {
+ pins = "GPIO79/FANIN15";
+ bias-disable;
+ input-enable;
+ };
+ gpio80pp_pins: gpio80pp-pins {
+ pins = "GPIO80/PWM0";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio81pp_pins: gpio81pp-pins {
+ pins = "GPIO81/PWM1";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio82od_pins: gpio82od-pins {
+ pins = "GPIO82/PWM2";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio83od_pins: gpio83od-pins {
+ pins = "GPIO83/PWM3";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio84od_pins: gpio84od-pins {
+ pins = "GPIO84/R2TXD0";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio85od_pins: gpio85od-pins {
+ pins = "GPIO85/R2TXD1";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio86od_pins: gpio86od-pins {
+ pins = "GPIO86/R2TXEN";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio87od_pins: gpio87od-pins {
+ pins = "GPIO87/R2RXD0";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio88_pins: gpio88-pins {
+ pins = "GPIO88/R2RXD1";
+ bias-disable;
+ input-enable;
+ };
+ gpio89od_pins: gpio89od-pins {
+ pins = "GPIO89/R2CRSDV";
+ bias-disable;
+ output-low;
+ drive-open-drain;
+ };
+ gpio90pp_pins: gpio90pp-pins {
+ pins = "GPIO90/R2RXERR";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio91od_pins: gpio91od-pins {
+ pins = "GPIO91/R2MDC";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio92od_pins: gpio92od-pins {
+ pins = "GPIO92/R2MDIO";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio93_pins: gpio93-pins {
+ pins = "GPIO93/GA20/SMB5DSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio94_pins: gpio94-pins {
+ pins = "GPIO94/nKBRST/SMB5DSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio120_pins: gpio120-pins {
+ pins = "GPIO120/SMB2CSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio121_pins: gpio121-pins {
+ pins = "GPIO121/SMB2CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio122_pins: gpio122-pins {
+ pins = "GPIO122/SMB2BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio123_pins: gpio123-pins {
+ pins = "GPIO123/SMB2BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio124_pins: gpio124-pins {
+ pins = "GPIO124/SMB1CSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio125_pins: gpio125-pins {
+ pins = "GPIO125/SMB1CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio126_pins: gpio126-pins {
+ pins = "GPIO126/SMB1BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio127_pins: gpio127-pins {
+ pins = "GPIO127/SMB1BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio130_pins: gpio130-pins {
+ pins = "GPIO130/SMB9SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio131od_pins: gpio131od-pins {
+ pins = "GPIO131/SMB9SDA";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio132od_pins: gpio132od-pins {
+ pins = "GPIO132/SMB10SCL";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio133od_pins: gpio133od-pins {
+ pins = "GPIO133/SMB10SDA";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio136_pins: gpio136-pins {
+ pins = "GPIO136/SD1DT0";
+ bias-disable;
+ input-enable;
+ };
+ gpio137_pins: gpio137-pins {
+ pins = "GPIO137/SD1DT1";
+ bias-disable;
+ input-enable;
+ };
+ gpio138_pins: gpio138-pins {
+ pins = "GPIO138/SD1DT2";
+ bias-disable;
+ input-enable;
+ };
+ gpio139_pins: gpio139-pins {
+ pins = "GPIO139/SD1DT3";
+ bias-disable;
+ input-enable;
+ };
+ gpio140_pins: gpio140-pins {
+ pins = "GPIO140/SD1CLK";
+ bias-disable;
+ input-enable;
+ };
+ gpio141_pins: gpio141-pins {
+ pins = "GPIO141/SD1WP";
+ bias-disable;
+ input-enable;
+ };
+ gpio142_pins: gpio142-pins {
+ pins = "GPIO142/SD1CMD";
+ bias-disable;
+ input-enable;
+ };
+ gpio143_pins: gpio143-pins {
+ pins = "GPIO143/SD1CD/SD1PWR";
+ bias-disable;
+ input-enable;
+ };
+ gpio144_pins: gpio144-pins {
+ pins = "GPIO144/PWM4";
+ bias-disable;
+ input-enable;
+ };
+ gpio145od_pins: gpio145od-pins {
+ pins = "GPIO145/PWM5";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio146_pins: gpio146-pins {
+ pins = "GPIO146/PWM6";
+ bias-disable;
+ input-enable;
+ };
+ gpio147_pins: gpio147-pins {
+ pins = "GPIO147/PWM7";
+ bias-disable;
+ input-enable;
+ };
+ gpio148od_pins: gpio148od-pins {
+ pins = "GPIO148/MMCDT4";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio149od_pins: gpio149od-pins {
+ pins = "GPIO149/MMCDT5";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio150od_pins: gpio150od-pins {
+ pins = "GPIO150/MMCDT6";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio151od_pins: gpio151od-pins {
+ pins = "GPIO151/MMCDT7";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio152od_pins: gpio152od-pins {
+ pins = "GPIO152/MMCCLK";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio153pp_pins: gpio153pp-pins {
+ pins = "GPIO153/MMCWP";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio154_pins: gpio154-pins {
+ pins = "GPIO154/MMCCMD";
+ bias-disable;
+ input-enable;
+ };
+ gpio155_pins: gpio155-pins {
+ pins = "GPIO155/nMMCCD/nMMCRST";
+ bias-disable;
+ input-enable;
+ };
+ gpio156_pins: gpio156-pins {
+ pins = "GPIO156/MMCDT0";
+ bias-disable;
+ input-enable;
+ };
+ gpio157od_pins: gpio157od-pins {
+ pins = "GPIO157/MMCDT1";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio158od_pins: gpio158od-pins {
+ pins = "GPIO158/MMCDT2";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio159od_pins: gpio159od-pins {
+ pins = "GPIO159/MMCDT3";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio160od_pins: gpio160od-pins {
+ pins = "GPIO160/CLKOUT/RNGOSCOUT";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio169od_pins: gpio169od-pins {
+ pins = "GPIO169/nSCIPME";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio170od_pins: gpio170od-pins {
+ pins = "GPIO170/nSMI";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio171_pins: gpio171-pins {
+ pins = "GPIO171/SMB6SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio172pp_pins: gpio172pp-pins {
+ pins = "GPIO172/SMB6SDA";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio173od_pins: gpio173od-pins {
+ pins = "GPIO173/SMB7SCL";
+ bias-disable;
+ output-low;
+ drive-open-drain;
+ };
+ gpio174_pins: gpio174-pins {
+ pins = "GPIO174/SMB7SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio175ol_pins: gpio175ol-pins {
+ pins = "GPIO175/PSPI1CK/FANIN19";
+ bias-disable;
+ output-low;
+ };
+ gpio176o_pins: gpio176o-pins {
+ pins = "GPIO176/PSPI1DO/FANIN18";
+ bias-disable;
+ output-high;
+ };
+ gpio177_pins: gpio177-pins {
+ pins = "GPIO177/PSPI1DI/FANIN17";
+ bias-disable;
+ input-enable;
+ };
+ gpio188od_pins: gpio188od-pins {
+ pins = "GPIO188/SPI3D2/nSPI3CS2";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio189od_pins: gpio189od-pins {
+ pins = "GPIO189/SPI3D3/nSPI3CS3";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio191pp_pins: gpio191pp-pins {
+ pins = "GPIO191";
+ bias-disable;
+ output-high;
+ drive-push-pull;
+ };
+ gpio192pp_pins: gpio192pp-pins {
+ pins = "GPIO192";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio194_pins: gpio194-pins {
+ pins = "GPIO194/SMB0BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio195_pins: gpio195-pins {
+ pins = "GPIO195/SMB0BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio196_pins: gpio196-pins {
+ pins = "GPIO196/SMB0CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio197_pins: gpio197-pins {
+ pins = "GPIO197/SMB0DEN";
+ bias-disable;
+ input-enable;
+ };
+ gpio198pp_pins: gpio198pp-pins {
+ pins = "GPIO198/SMB0DSDA";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio199_pins: gpio199-pins {
+ pins = "GPIO199/SMB0DSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio200pp_pins: gpio200pp-pins {
+ pins = "GPIO200/R2CK";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio202_pins: gpio202-pins {
+ pins = "GPIO202/SMB0CSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio204_pins: gpio204-pins {
+ pins = "GPIO204/DDC2SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio205_pins: gpio205-pins {
+ pins = "GPIO205/DDC2SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio206pp_pins: gpio206pp-pins {
+ pins = "GPIO206/HSYNC2";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio207pp_pins: gpio207pp-pins {
+ pins = "GPIO207/VSYNC2";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio217pp_pins: gpio217pp-pins {
+ pins = "GPIO217/RG2MDIO/DVHSYNC";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio218pp_pins: gpio218pp-pins {
+ pins = "GPIO218/nWDO1";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio219od_pins: gpio219od-pins {
+ pins = "GPIO219/nWDO2";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio220pp_pins: gpio220pp-pins {
+ pins = "GPIO220/SMB12SCL";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio221pp_pins: gpio221pp-pins {
+ pins = "GPIO221/SMB12SDA";
+ bias-disable;
+ output-low;
+ drive-push-pull;
+ };
+ gpio222od_pins: gpio222od-pins {
+ pins = "GPIO222/SMB13SCL";
+ bias-disable;
+ drive-open-drain;
+ };
+ gpio223_pins: gpio223-pins {
+ pins = "GPIO223/SMB13SDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio224_pins: gpio224-pins {
+ pins = "GPIO224/SPIXCK";
+ bias-disable;
+ input-enable;
+ };
+ gpio227_pins: gpio227-pins {
+ pins = "GPIO227/nSPIXCS0";
+ bias-disable;
+ input-enable;
+ };
+ gpio228_pins: gpio228-pins {
+ pins = "GPIO228/nSPIXCS1";
+ bias-disable;
+ input-enable;
+ };
+ gpio230_pins: gpio230-pins {
+ pins = "GPIO230/SPIXD3";
+ bias-disable;
+ input-enable;
+ };
+ gpio231_pins: gpio231-pins {
+ pins = "GPIO231/nCLKREQ";
+ bias-disable;
+ input-enable;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/nuvoton-npcm730-gis.dts b/arch/arm/boot/dts/nuvoton-npcm730-gis.dts
new file mode 100644
index 000000000000..1422b2aadebf
--- /dev/null
+++ b/arch/arm/boot/dts/nuvoton-npcm730-gis.dts
@@ -0,0 +1,1076 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2020 Quanta Computer Inc. Fran.Hsu@quantatw.com
+
+/dts-v1/;
+#include "nuvoton-npcm730.dtsi"
+#include "nuvoton-npcm730-gis-pincfg.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Quanta GIS Board (Device Tree v01.17)";
+ compatible = "nuvoton,npcm750";
+
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
+ udc5 = &udc5;
+ udc6 = &udc6;
+ udc7 = &udc7;
+ udc8 = &udc8;
+ udc9 = &udc9;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c8 = &i2c8;
+ i2c11 = &i2c11;
+ i2c14 = &i2c14;
+ i2c15 = &i2c15;
+ i2c16 = &i2c_cpu0_dimmA;
+ i2c17 = &i2c_cpu0_dimmE;
+ i2c18 = &i2c_cpu1_dimmA;
+ i2c19 = &i2c_cpu1_dimmE;
+ i2c20 = &i2c_clock_gen_0;
+ i2c21 = &i2c_clock_gen_1;
+ i2c22 = &i2c_clock_gen_2;
+ i2c23 = &i2c_clock_gen_3;
+ i2c24 = &i2c_slot0;
+ i2c25 = &i2c_slot1;
+ i2c26 = &i2c_slot2;
+ i2c27 = &i2c_slot3;
+ i2c28 = &i2c_slot4;
+ i2c29 = &i2c_slot5;
+ i2c30 = &i2c_slot6;
+ i2c31 = &i2c_slot7;
+ i2c32 = &i2c_power_0;
+ i2c33 = &i2c_power_1;
+ i2c34 = &i2c_power_2;
+ i2c35 = &i2c_power_3;
+ i2c36 = &i2c_isl_0;
+ i2c37 = &i2c_isl_1;
+ i2c38 = &i2c_isl_2;
+ i2c39 = &i2c_isl_3;
+ i2c40 = &i2c_isl_4;
+ i2c41 = &i2c_isl_5;
+ i2c42 = &i2c_isl_6;
+ i2c43 = &i2c_isl_7;
+ i2c44 = &i2c_hostswap;
+ i2c45 = &i2c_tmp;
+ i2c46 = &i2c_fan_controller_1;
+ i2c47 = &i2c_fan_controller_2;
+ i2c48 = &i2c_seq;
+ i2c49 = &i2c_fru_1;
+ i2c50 = &i2c_fru_2;
+ i2c51 = &i2c_i2cool_1;
+ i2c52 = &i2c_i2cool_2;
+ i2c53 = &i2c_i2cool_3;
+ i2c54 = &i2c_i2cool_4;
+ i2c55 = &i2c_cpu_pirom;
+ fiu0 = &fiu0;
+ fiu1 = &fiu3;
+ };
+
+ chosen {
+ stdout-path = &serial3;
+ };
+
+ memory {
+ reg = <0 0x40000000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ sas-cable0 {
+ label = "sas-cable0";
+ gpios = <&gpio6 19 GPIO_ACTIVE_LOW>;
+ linux,code = <211>;
+ };
+
+ sas-cable1 {
+ label = "sas-cable1";
+ gpios = <&gpio6 20 GPIO_ACTIVE_LOW>;
+ linux,code = <212>;
+ };
+
+ power-failure {
+ label = "power-failure";
+ gpios = <&gpio6 21 GPIO_ACTIVE_LOW>;
+ linux,code = <213>;
+ };
+ };
+
+ iio-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 1>, <&adc 2>, <&adc 3>,
+ <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
+ };
+
+ iio-hwmon-battery {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 0>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-bmc-live {
+ gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ LED_SYS_ERROR {
+ gpios = <&gpio5 12 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_BMC_FAULT {
+ gpios = <&gpio6 25 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_SYS_ATTN {
+ gpios = <&gpio6 28 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_SYS_STATE {
+ gpios = <&gpio6 29 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
+ seven-seg-disp {
+ compatible = "seven-seg-gpio-dev";
+ refresh-interval-ms = /bits/ 16 <600>;
+ clock-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ data-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+ clear-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ pcie-slot {
+ pcie0: pcie-slot@0 {
+ label = "PE0";
+ };
+
+ pcie1: pcie-slot@1 {
+ label = "PE1";
+ };
+
+ pcie2: pcie-slot@2 {
+ label = "PE2";
+ };
+
+ pcie3: pcie-slot@3 {
+ label = "PE3";
+ };
+
+ pcie4: pcie-slot@4 {
+ label = "PE4";
+ };
+
+ pcie5: pcie-slot@5 {
+ label = "PE5";
+ };
+
+ pcie6: pcie-slot@6 {
+ label = "PE6";
+ };
+
+ pcie7: pcie-slot@7 {
+ label = "PE7";
+ };
+ };
+};
+
+&gcr {
+ serial_port_mux: mux-controller {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x38 0x07>;
+ idle-states = <2>; /* Serial port mode 3 (takeover) */
+ };
+};
+
+&gmac0 {
+ phy-mode = "rgmii-id";
+ snps,eee-force-disable;
+ status = "okay";
+};
+
+&emc0 {
+ status = "okay";
+ fixed-link {
+ speed = <100>;
+ full-duplex;
+ };
+};
+
+&mc {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&aes {
+ status = "okay";
+};
+
+&sha {
+ status = "okay";
+};
+
+&udc5 {
+ status = "okay";
+};
+
+&udc6 {
+ status = "okay";
+};
+
+&udc7 {
+ status = "okay";
+};
+
+&udc8 {
+ status = "okay";
+};
+
+&udc9 {
+ status = "okay";
+};
+
+&pcimbox {
+ status = "okay";
+};
+
+&fiu0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0cs1_pins>;
+ status = "okay";
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ spi-max-frequency = <19000000>;
+ spi-rx-bus-width = <2>;
+ label = "bmc";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot@0 {
+ label = "u-boot";
+ reg = <0x0000000 0xf0000>;
+ };
+ image-descriptor@f0000 {
+ label = "image-descriptor";
+ reg = <0xf0000 0x10000>;
+ };
+ hoth-update@100000 {
+ label = "hoth-update";
+ reg = <0x100000 0x100000>;
+ };
+ kernel@200000 {
+ label = "kernel";
+ reg = <0x200000 0x500000>;
+ };
+ rofs@700000 {
+ label = "rofs";
+ reg = <0x700000 0x35f0000>;
+ };
+ rwfs@3cf0000 {
+ label = "rwfs";
+ reg = <0x3cf0000 0x300000>;
+ };
+ hoth-mailbox@3ff0000 {
+ label = "hoth-mailbox";
+ reg = <0x3ff0000 0x10000>;
+ };
+ };
+ };
+};
+
+&fiu3 {
+ pinctrl-0 = <&spi3_pins>, <&spi3cs1_pins>;
+ status = "okay";
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ spi-rx-bus-width = <2>;
+ label="bios";
+ };
+ flash@1 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <1>;
+ spi-max-frequency = <20000000>;
+ spi-rx-bus-width = <2>;
+ label = "bios-secondary";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bios-secondary-zero@0 {
+ label = "bios-secondary-0";
+ reg = <0x0000000 0x4000000>;
+ };
+ bios-secondary-one@4000000 {
+ label = "bios-secondary-1";
+ reg = <0x4000000 0x4000000>;
+ };
+ };
+ };
+};
+
+&watchdog1 {
+ status = "okay";
+};
+
+&rng {
+ status = "okay";
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&serial1 {
+ status = "okay";
+};
+
+&serial2 {
+ status = "okay";
+};
+
+&serial3 {
+ status = "okay";
+};
+
+&adc {
+ #io-channel-cells = <1>;
+ status = "okay";
+};
+
+&otp {
+ status = "okay";
+};
+
+&lpc_kcs {
+ kcs1: kcs1@0 {
+ status = "okay";
+ };
+
+ kcs2: kcs2@0 {
+ status = "okay";
+ };
+
+ kcs3: kcs3@0 {
+ status = "okay";
+ };
+};
+
+&lpc_host {
+ lpc_bpc: lpc_bpc@40 {
+ monitor-ports = <0x80>;
+ status = "okay";
+ };
+};
+
+&i2c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "disabled";
+ i2c-switch@73 {
+ compatible = "nxp,pca9546";
+ reg = <0x73>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+ reset-gpios = <&pca9538 0 GPIO_ACTIVE_LOW>;
+
+ i2c_cpu0_dimmA: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c_cpu0_dimmE: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ i2c_cpu1_dimmA: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ i2c_cpu1_dimmE: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+};
+
+&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+ i2c-switch@74 {
+ compatible = "nxp,pca9546";
+ reg = <0x74>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+ reset-gpios = <&pca9538 1 GPIO_ACTIVE_LOW>;
+
+ i2c_clock_gen_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c_clock_gen_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ i2c_clock_gen_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ i2c_clock_gen_3: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+
+ i2c-switch@75 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x75>;
+ i2c-mux-idle-disconnect;
+ reset-gpios = <&pca9538 4 GPIO_ACTIVE_LOW>;
+
+ i2c_slot0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ pcie-slot = &pcie0;
+ };
+
+ i2c_slot1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ pcie-slot = &pcie1;
+ };
+
+ i2c_slot2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ pcie-slot = &pcie2;
+ lm90@4a {
+ compatible = "national,lm90";
+ reg = <0x4a>;
+ };
+ };
+
+ i2c_slot3: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ pcie-slot = &pcie3;
+ };
+
+ i2c_slot4: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ pcie-slot = &pcie4;
+ };
+
+ i2c_slot5: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ pcie-slot = &pcie5;
+ };
+
+ i2c_slot6: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ pcie-slot = &pcie6;
+ };
+
+ i2c_slot7: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ pcie-slot = &pcie7;
+ };
+ };
+};
+
+&i2c2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+
+ i2c-switch@75 {
+ compatible = "nxp,pca9546";
+ reg = <0x75>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+ reset-gpios = <&pca9538 2 GPIO_ACTIVE_LOW>;
+
+ i2c_power_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ zl8802@5b {
+ compatible = "isil,zl8802";
+ reg = <0x5b>;
+ };
+ };
+
+ i2c_power_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ max16600@60 {
+ compatible = "max16600";
+ reg = <0x60>;
+ };
+ };
+
+ i2c_power_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ max16600@60 {
+ compatible = "max16600";
+ reg = <0x60>;
+ };
+ };
+
+ i2c_power_3: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ stb_12v@68 {
+ compatible = "pm6764tr";
+ reg = <0x68>;
+ };
+ };
+ };
+
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x77>;
+ i2c-mux-idle-disconnect;
+ reset-gpios = <&pca9538 5 GPIO_ACTIVE_LOW>;
+
+ i2c_isl_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ vrm@46 {
+ compatible = "isil,isl69222";
+ reg = <0x46>;
+ };
+ };
+
+ i2c_isl_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ vrm@46 {
+ compatible = "isil,isl69222";
+ reg = <0x46>;
+ };
+ };
+
+ i2c_isl_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ vrm@46 {
+ compatible = "isil,isl69222";
+ reg = <0x46>;
+ };
+ };
+
+ i2c_isl_3: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ vrm@46 {
+ compatible = "isil,isl69222";
+ reg = <0x46>;
+ };
+ };
+
+ i2c_isl_4: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ vrm@46 {
+ compatible = "isil,isl69228";
+ reg = <0x46>;
+ };
+ };
+
+ i2c_isl_5: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ vrm@46 {
+ compatible = "isil,isl69228";
+ reg = <0x46>;
+ };
+ };
+
+ i2c_isl_6: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ vrm@46 {
+ compatible = "isil,isl69228";
+ reg = <0x46>;
+ };
+ };
+
+ i2c_isl_7: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ vrm@46 {
+ compatible = "isil,isl69228";
+ reg = <0x46>;
+ };
+ };
+ };
+};
+
+&i2c3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+
+ pca9538: pca9538@72 {
+ compatible = "nxp,pca9538";
+ reg = <0x72>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ U3009_P0 {
+ gpio-hog;
+ gpios = <0 0>;
+ output-low;
+ line-name = "RST_SMB_MUX_TCA9545_N";
+ };
+ };
+
+ i2c-switch@75 {
+ compatible = "nxp,pca9546";
+ reg = <0x75>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+ reset-gpios = <&pca9538 3 GPIO_ACTIVE_LOW>;
+
+ i2c_hostswap: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ adm1272@1f {
+ compatible = "adi,adm1272";
+ reg = <0x1f>;
+ shunt-resistor-micro-ohms = <330>;
+ };
+ };
+ i2c_tmp: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ i2c_fan_controller_1: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ fan_controller@2c {
+ compatible = "maxim,max31790";
+ reg = <0x2c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ i2c_fan_controller_2: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ fan_controller@2c {
+ compatible = "maxim,max31790";
+ reg = <0x2c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
+
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x77>;
+ i2c-mux-idle-disconnect;
+ reset-gpios = <&pca9538 6 GPIO_ACTIVE_LOW>;
+
+ i2c_seq: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ Sequencer@59 {
+ compatible = "maxim,max34451";
+ reg = <0x59>;
+ };
+ };
+
+ i2c_fru_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ mobo_fru@55 {
+ compatible = "atmel,24c64";
+ reg = <0x55>;
+ };
+ };
+
+ i2c_fru_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ eeprom@50 {
+ compatible = "atmel,24c2048";
+ reg = <0x50>;
+ };
+ };
+
+ i2c_i2cool_1: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ lm75@5c {
+ compatible = "maxim,max31725";
+ reg = <0x5c>;
+ status = "okay";
+ };
+ };
+
+ i2c_i2cool_2: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ lm75@5c {
+ compatible = "maxim,max31725";
+ reg = <0x5c>;
+ status = "okay";
+ };
+ };
+
+ i2c_i2cool_3: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ lm75@5c {
+ compatible = "maxim,max31725";
+ reg = <0x5c>;
+ status = "okay";
+ };
+ };
+
+ i2c_i2cool_4: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ lm75@5c {
+ compatible = "maxim,max31725";
+ reg = <0x5c>;
+ status = "okay";
+ };
+ };
+
+ i2c_cpu_pirom: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ };
+ };
+};
+
+&i2c4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+ slave_mqueue: i2c-slave-mqueue@40000010 {
+ compatible = "i2c-slave-mqueue";
+ reg = <0x40000010>;
+ status = "okay";
+ };
+};
+
+&i2c8 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+};
+
+&i2c11 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <100000>;
+ status = "okay";
+};
+
+&i2c14 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <100000>;
+ status = "okay";
+ Sequencer@59 {
+ compatible = "maxim,max34451";
+ reg = <0x59>;
+ };
+
+ bmc_fru@55 {
+ compatible = "atmel,24c64";
+ reg = <0x55>;
+ };
+};
+
+&spi0 {
+ cs-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio175ol_pins &gpio176o_pins
+ &gpio177_pins>;
+ status = "okay";
+ jtag_master {
+ compatible = "nuvoton,npcm750-jtag-master";
+ spi-max-frequency = <25000000>;
+ reg = <0>;
+
+ pinctrl-names = "pspi", "gpio";
+ pinctrl-0 = <&pspi1_pins>;
+ pinctrl-1 = <&gpio175ol_pins &gpio176o_pins
+ &gpio177_pins>;
+
+ tck-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
+ tdi-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>;
+ tdo-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
+ tms-gpios = <&gpio6 11 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+};
+
+&spi1 {
+ cs-gpios = <&gpio6 23 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio17_pins &gpio18o_pins
+ &gpio19ol_pins>;
+ status = "okay";
+ jtag_master {
+ compatible = "nuvoton,npcm750-jtag-master";
+ spi-max-frequency = <25000000>;
+ reg = <0>;
+
+ pinctrl-names = "pspi", "gpio";
+ pinctrl-0 = <&pspi2_pins>;
+ pinctrl-1 = <&gpio17_pins &gpio18o_pins
+ &gpio19ol_pins>;
+
+ tck-gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
+ tdi-gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
+ tdo-gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
+ tms-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ /* GPI pins*/
+ &gpio4_pins
+ &gpio5_pins
+ &gpio8_pins
+ &gpio9_pins
+ &gpio10_pins
+ &gpio11_pins
+ &gpio13_pins
+ &gpio14_pins
+ &gpio20_pins
+ &gpio21_pins
+ &gpio24_pins
+ &gpio25_pins
+ &gpio38_pins
+ &gpio39_pins
+ &gpio40_pins
+ &gpio64_pins
+ &gpio65_pins
+ &gpio71_pins
+ &gpio73_pins
+ &gpio74_pins
+ &gpio78_pins
+ &gpio79_pins
+ &gpio88_pins
+ &gpio93_pins
+ &gpio94_pins
+ &gpio120_pins
+ &gpio121_pins
+ &gpio122_pins
+ &gpio123_pins
+ &gpio124_pins
+ &gpio125_pins
+ &gpio126_pins
+ &gpio127_pins
+ &gpio130_pins
+ &gpio136_pins
+ &gpio137_pins
+ &gpio138_pins
+ &gpio139_pins
+ &gpio140_pins
+ &gpio141_pins
+ &gpio142_pins
+ &gpio143_pins
+ &gpio144_pins
+ &gpio146_pins
+ &gpio147_pins
+ &gpio154_pins
+ &gpio155_pins
+ &gpio156_pins
+ &gpio171_pins
+ &gpio174_pins
+ &gpio194_pins
+ &gpio195_pins
+ &gpio196_pins
+ &gpio197_pins
+ &gpio199_pins
+ &gpio202_pins
+ &gpio204_pins
+ &gpio205_pins
+ &gpio223_pins
+ &gpio224_pins
+ &gpio227_pins
+ &gpio228_pins
+ &gpio230_pins
+ &gpio231_pins
+ &gpio177_pins
+ &gpio17_pins
+ /* GPO pins*/
+ &gpio175ol_pins
+ &gpio176o_pins
+ &gpio18o_pins
+ &gpio19ol_pins
+ >;
+};
+
+&gpio0 {
+ gpio-line-names =
+ /*0-31*/ "","","","","","","RESET_OUT","POWER_OUT",
+ "","","CPU1_MEM_THERM_EVENT","CPU2_MEM_THERM_EVENT","","PS_PWROK","","",
+ "","","","","SIO_POWER_GOOD","","","",
+ "CPU1_THERMTRIP","CPU2_THERMTRIP","","","","","","";
+};
+
+&gpio1 {
+ gpio-line-names =
+ /*32-63*/ "","","","","","","CPU_CATERR","",
+ "CPU_MCERR","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
+};
+
+&gpio2 {
+ gpio-line-names =
+ /*64-95*/ "POWER_BUTTON","RESET_BUTTON","","","","","","",
+ "","CPU1_VRHOT","CPU2_VRHOT","","","DEBUG_EN_N","XDP_PRST_N","",
+ "","TCK_MUX_SEL","PWR_DEBUG_N","PREQ_N","","","","",
+ "","","","","","","PCH_BMC_THERMTRIP","";
+};
+
+&gpio4 {
+ gpio-line-names =
+ /*128-159*/ "","","","","","","","",
+ "","","CPU_ERR0","CPU_ERR1","CPU_ERR2","","","POST_COMPLETE",
+ "PRDY_N","SYSPWROK","","","","","","",
+ "","","","","SMI","","","";
+};
+
+&gpio6 {
+ gpio-line-names =
+ /*192-223*/ "","","","","","","","SIO_S5",
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
+};
+
+&gpio7 {
+ gpio-line-names =
+ /*224-255*/ "","","","PLTRST_N","CPU1_FIVR_FAULT","","CPU2_FIVR_FAULT","",
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
+};
+
+&peci0 {
+ cmd-timeout-ms = <1000>;
+ pull-down = <0>;
+ host-neg-bit-rate = <15>;
+ status = "okay";
+
+ intel-peci-dimmtemp@30 {
+ compatible = "intel,peci-client";
+ reg = <0x30>;
+ status = "okay";
+ };
+
+ intel-peci-dimmtemp@31 {
+ compatible = "intel,peci-client";
+ reg = <0x31>;
+ status = "okay";
+ };
+};
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 2/7] ARM: dts: nuvoton: Add Quanta GSZ BMC Device Tree
2023-03-03 6:34 [PATCH 1/7] ARM: dts: nuvoton: Add Quanta GIS BMC Device Tree David Wang
@ 2023-03-03 6:34 ` David Wang
2023-03-03 23:30 ` kernel test robot
2023-03-03 6:34 ` [PATCH 3/7] ARM: dts: nuvoton: gbs: Split SPI flash partition David Wang
` (6 subsequent siblings)
7 siblings, 1 reply; 11+ messages in thread
From: David Wang @ 2023-03-03 6:34 UTC (permalink / raw)
To: arnd, olof, soc, robh+dt, krzysztof.kozlowski+dt
Cc: devicetree, David Wang, fran.hsu, benjaminfair, avifishman70,
venture, openbmc, linux-kernel, tali.perry1, linux-arm-kernel,
tmaimon77
Add the device tree for the Quanta GSZ BMC and it's
based on NPCM730 SoC
Signed-off-by: David Wang <davidwang@quantatw.com>
---
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/nuvoton-npcm730-gsz-gpio.dtsi | 380 ++++
arch/arm/boot/dts/nuvoton-npcm730-gsz.dts | 1523 +++++++++++++++++
3 files changed, 1904 insertions(+)
create mode 100644 arch/arm/boot/dts/nuvoton-npcm730-gsz-gpio.dtsi
create mode 100644 arch/arm/boot/dts/nuvoton-npcm730-gsz.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 40659106cfe1..f2bbbd76d3a9 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -397,6 +397,7 @@ dtb-$(CONFIG_ARCH_NPCM7XX) += \
nuvoton-npcm730-gsj.dtb \
nuvoton-npcm730-gbs.dtb \
nuvoton-npcm730-gis.dtb \
+ nuvoton-npcm730-gsz.dtb \
nuvoton-npcm730-kudo.dtb \
nuvoton-npcm750-evb.dtb \
nuvoton-npcm750-runbmc-olympus.dtb
diff --git a/arch/arm/boot/dts/nuvoton-npcm730-gsz-gpio.dtsi b/arch/arm/boot/dts/nuvoton-npcm730-gsz-gpio.dtsi
new file mode 100644
index 000000000000..c081043aaef6
--- /dev/null
+++ b/arch/arm/boot/dts/nuvoton-npcm730-gsz-gpio.dtsi
@@ -0,0 +1,380 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2021 Quanta Computer Inc. Fran.Hsu@quantatw.com
+
+/ {
+ pinctrl: pinctrl@f0800000 {
+ gpio1_pins: gpio1-pins {
+ pins = "GPIO1/IOX1LD";
+ input-enable;
+ bias-disable;
+ };
+ gpio2_pins: gpio2-pins {
+ pins = "GPIO2/IOX1CK";
+ input-enable;
+ bias-disable;
+ };
+ gpio3_pins: gpio3-pins {
+ pins = "GPIO3/IOX1D0";
+ input-enable;
+ bias-disable;
+ };
+ gpio4_pins: gpio4-pins {
+ pins = "GPIO4/IOX2DI/SMB1DSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio5_pins: gpio5-pins {
+ pins = "GPIO5/IOX2LD/SMB1DSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio8_pins: gpio8-pins {
+ pins = "GPIO8/LKGPO1";
+ bias-disable;
+ input-enable;
+ };
+ gpio9_pins: gpio9-pins {
+ pins = "GPIO9/LKGPO2";
+ bias-disable;
+ input-enable;
+ };
+ gpio11_pins: gpio11-pins {
+ pins = "GPIO11/IOXHCK";
+ bias-disable;
+ input-enable;
+ };
+ gpio12_pins: gpio12-pins {
+ pins = "GPIO12/GSPICK/SMB5BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio13_pins: gpio13-pins {
+ pins = "GPIO13/GSPIDO/SMB5BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio14_pins: gpio14-pins {
+ pins = "GPIO14/GSPIDI/SMB5CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio17_pins: gpio17-pins {
+ pins = "GPIO17/PSPI2DI/SMB4DEN";
+ bias-disable;
+ input-enable;
+ };
+ gpio18_pins: gpio18-pins {
+ pins = "GPIO18/PSPI2D0/SMB4BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio19_pins: gpio19-pins {
+ pins = "GPIO19/PSPI2CK/SMB4BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio24_pins: gpio24-pins {
+ pins = "GPIO24/HGPIO4/IOXHDO";
+ bias-disable;
+ input-enable;
+ };
+ gpio25_pins: gpio25-pins {
+ pins = "GPIO25/HGPIO5/IOXHDI";
+ bias-disable;
+ input-enable;
+ };
+ gpio38_pins: gpio38-pins {
+ pins = "GPIO38/SMB3CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio39_pins: gpio39-pins {
+ pins = "GPIO39/SMB3BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio40_pins: gpio40-pins {
+ pins = "GPIO40/SMB3BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio45_pins: gpio45-pins {
+ pins = "GPIO45/nDCD1/JTDO2";
+ bias-disable;
+ input-enable;
+ };
+ gpio47_pins: gpio47-pins {
+ pins = "GPIO47/nRI1/JCP_RDY2";
+ bias-disable;
+ input-enable;
+ };
+ gpio57_pins: gpio57-pins {
+ pins = "GPIO57/R1MDC";
+ bias-disable;
+ input-enable;
+ };
+ gpio58_pins: gpio58-pins {
+ pins = "GPIO58/R1MDIO";
+ bias-disable;
+ input-enable;
+ };
+ gpio60_pins: gpio60-pins {
+ pins = "GPIO60/HGPIO7/SMB3DSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio64_pins: gpio64-pins {
+ pins = "GPIO64/FANIN0";
+ bias-disable;
+ input-enable;
+ input-debounce;
+ };
+ gpio65_pins: gpio65-pins {
+ pins = "GPIO65/FANIN1";
+ bias-disable;
+ input-enable;
+ input-debounce;
+ };
+ gpio71_pins: gpio71-pins {
+ pins = "GPIO71/FANIN7";
+ bias-disable;
+ input-enable;
+ };
+ gpio73_pins: gpio73-pins {
+ pins = "GPIO73/FANIN9";
+ bias-disable;
+ input-enable;
+ };
+ gpio74_pins: gpio74-pins {
+ pins = "GPIO74/FANIN10";
+ bias-disable;
+ input-enable;
+ };
+ gpio78_pins: gpio78-pins {
+ pins = "GPIO78/FANIN14";
+ bias-disable;
+ input-enable;
+ };
+ gpio79_pins: gpio79-pins {
+ pins = "GPIO79/FANIN15";
+ bias-disable;
+ input-enable;
+ };
+ gpio93_pins: gpio93-pins {
+ pins = "GPIO93/GA20/SMB5DSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio94_pins: gpio94-pins {
+ pins = "GPIO94/nKBRST/SMB5DSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio110_pins: gpio110_pins {
+ pins = "GPIO110/RG2TXD0/DDRV0";
+ bias-disable;
+ input-enable;
+ };
+ gpio111_pins: gpio111_pins {
+ pins = "GPIO111/RG2TXD1/DDRV1";
+ bias-disable;
+ input-enable;
+ };
+ gpio112_pins: gpio112_pins {
+ pins = "GPIO112/RG2TXD2/DDRV2";
+ bias-disable;
+ input-enable;
+ };
+ gpio113_pins: gpio113_pins {
+ pins = "GPIO113/RG2TXD3/DDRV3";
+ bias-disable;
+ input-enable;
+ };
+ gpio121_pins: gpio121-pins {
+ pins = "GPIO121/SMB2CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio122_pins: gpio122-pins {
+ pins = "GPIO122/SMB2BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio123_pins: gpio123-pins {
+ pins = "GPIO123/SMB2BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio124_pins: gpio124-pins {
+ pins = "GPIO124/SMB1CSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio127_pins: gpio127-pins {
+ pins = "GPIO127/SMB1BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio136_pins: gpio136-pins {
+ pins = "GPIO136/SD1DT0";
+ bias-disable;
+ input-enable;
+ };
+ gpio137_pins: gpio137-pins {
+ pins = "GPIO137/SD1DT1";
+ bias-disable;
+ input-enable;
+ };
+ gpio138_pins: gpio138-pins {
+ pins = "GPIO138/SD1DT2";
+ bias-disable;
+ input-enable;
+ };
+ gpio139_pins: gpio139-pins {
+ pins = "GPIO139/SD1DT3";
+ bias-disable;
+ input-enable;
+ };
+ gpio140_pins: gpio140-pins {
+ pins = "GPIO140/SD1CLK";
+ bias-disable;
+ input-enable;
+ };
+ gpio141_pins: gpio141-pins {
+ pins = "GPIO141/SD1WP";
+ bias-disable;
+ input-enable;
+ };
+ gpio142_pins: gpio142-pins {
+ pins = "GPIO142/SD1CMD";
+ bias-disable;
+ input-enable;
+ };
+ gpio143_pins: gpio143-pins {
+ pins = "GPIO143/SD1CD/SD1PWR";
+ bias-disable;
+ input-enable;
+ };
+ gpio144_pins: gpio144-pins {
+ pins = "GPIO144/PWM4";
+ bias-disable;
+ input-enable;
+ };
+ gpio146_pins: gpio146-pins {
+ pins = "GPIO146/PWM6";
+ bias-disable;
+ input-enable;
+ };
+ gpio175ol_pins: gpio175ol-pins {
+ pins = "GPIO175/PSPI1CK/FANIN19";
+ bias-disable;
+ output-low;
+ };
+ gpio176o_pins: gpio176o-pins {
+ pins = "GPIO176/PSPI1DO/FANIN18";
+ bias-disable;
+ output-high;
+ };
+ gpio177_pins: gpio177-pins {
+ pins = "GPIO177/PSPI1DI/FANIN17";
+ bias-disable;
+ input-enable;
+ };
+ gpio192_pins: gpio192-pins {
+ pins = "GPIO192";
+ bias-disable;
+ input-enable;
+ };
+ gpio194_pins: gpio194-pins {
+ pins = "GPIO194/SMB0BSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio195_pins: gpio195-pins {
+ pins = "GPIO195/SMB0BSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio196_pins: gpio196-pins {
+ pins = "GPIO196/SMB0CSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio197_pins: gpio197-pins {
+ pins = "GPIO197/SMB0DEN";
+ bias-disable;
+ input-enable;
+ };
+ gpio199_pins: gpio199-pins {
+ pins = "GPIO199/SMB0DSCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio202_pins: gpio202-pins {
+ pins = "GPIO202/SMB0CSDA";
+ bias-disable;
+ input-enable;
+ };
+ gpio204_pins: gpio204-pins {
+ pins = "GPIO204/DDC2SCL";
+ bias-disable;
+ input-enable;
+ };
+ gpio208_pins: gpio208-pins {
+ pins = "GPIO208/RG2TXC/DVCK";
+ bias-disable;
+ input-enable;
+ };
+ gpio209_pins: gpio209-pins {
+ pins = "GPIO209/RG2TXCTL/DDRV4";
+ bias-disable;
+ input-enable;
+ };
+ gpio210_pins: gpio210-pins {
+ pins = "GPIO210/RG2RXD0/DDRV5";
+ bias-disable;
+ input-enable;
+ };
+ gpio211_pins: gpio211-pins {
+ pins = "GPIO211/RG2RXD1/DDRV6";
+ bias-disable;
+ input-enable;
+ };
+ gpio213_pins: gpio213-pins {
+ pins = "GPIO213/RG2RXD3/DDRV8";
+ bias-disable;
+ input-enable;
+ };
+ gpio214_pins: gpio214-pins {
+ pins = "GPIO214/RG2RXC/DDRV9";
+ bias-disable;
+ input-enable;
+ };
+ gpio224_pins: gpio224-pins {
+ pins = "GPIO224/SPIXCK";
+ bias-disable;
+ input-enable;
+ };
+ gpio227_pins: gpio227-pins {
+ pins = "GPIO227/nSPIXCS0";
+ bias-disable;
+ input-enable;
+ };
+ gpio228_pins: gpio228-pins {
+ pins = "GPIO228/nSPIXCS1";
+ bias-disable;
+ input-enable;
+ };
+ gpio230_pins: gpio230-pins {
+ pins = "GPIO230/SPIXD3";
+ bias-disable;
+ input-enable;
+ };
+ gpio231_pins: gpio231-pins {
+ pins = "GPIO231/nCLKREQ";
+ bias-disable;
+ input-enable;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/nuvoton-npcm730-gsz.dts b/arch/arm/boot/dts/nuvoton-npcm730-gsz.dts
new file mode 100644
index 000000000000..c9f11880ef6d
--- /dev/null
+++ b/arch/arm/boot/dts/nuvoton-npcm730-gsz.dts
@@ -0,0 +1,1523 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2021 Quanta Computer Inc. Fran.Hsu@quantatw.com
+
+/dts-v1/;
+#include "nuvoton-npcm730.dtsi"
+#include "nuvoton-npcm730-gsz-gpio.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/i2c/i2c.h>
+
+/ {
+ model = "Quanta GSZ Board (Device Tree v01.10)";
+ compatible = "nuvoton,npcm750";
+
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
+ udc5 = &udc5;
+ udc6 = &udc6;
+ udc7 = &udc7;
+ udc8 = &udc8;
+ emmc0 = &sdhci0;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ i2c6 = &i2c6;
+ i2c7 = &i2c7;
+ i2c8 = &i2c8;
+ i2c9 = &i2c9;
+ i2c10 = &i2c10;
+ i2c11 = &i2c11;
+ i2c12 = &i2c12;
+ i2c13 = &i2c13;
+ i2c14 = &i2c14;
+ fiu0 = &fiu0;
+ fiu1 = &fiu3;
+ i2c16 = &i2c_9SQ440NQQI8;
+ i2c17 = &i2c_db2001;
+ i2c18 = &i2c_db1200;
+ i2c19 = &i2c_io_exp_1;
+ i2c20 = &i2c_cpu0_pirom;
+ i2c21 = &i2c_cpu1_pirom;
+ i2c22 = &i2c_ncsi_clk;
+ i2c23 = &i2c_m2;
+ i2c24 = &i2c_fivra_cpu0;
+ i2c25 = &i2c_fivra_cpu1;
+ i2c26 = &i2c_vccfa_cpu0;
+ i2c27 = &i2c_vccfa_cpu1;
+ i2c28 = &i2c_vccd_cpu0;
+ i2c29 = &i2c_vccd_cpu1;
+ i2c30 = &i2c_hotswap;
+ i2c31 = &i2c_tps_1;
+ i2c32 = &i2c_p12v_1;
+ i2c33 = &i2c_p12v_2;
+ i2c34 = &i2c_fan_controller_1;
+ i2c35 = &i2c_i2cool_1;
+ i2c36 = &i2c_i2cool_2;
+ i2c37 = &i2c_i2cool_3;
+ i2c38 = &i2c_seq_mobo;
+ i2c39 = &i2c_fru_2;
+ i2c40 = &i2c_io_exp_2;
+ i2c41 = &i2c_io_exp_3;
+ i2c43 = &i2c_fru_3;
+ i2c44 = &i2c_seq;
+ i2c45 = &i2c_fru_1;
+ i2c46 = &i2c_tang;
+ i2c51 = &i2c_pe0_0;
+ i2c52 = &i2c_pe0_1;
+ i2c53 = &i2c_pe0_2;
+ i2c54 = &i2c_pe1_0;
+ i2c55 = &i2c_pe1_1;
+ i2c56 = &i2c_pe1_2;
+ i2c57 = &i2c_pe2_0;
+ i2c58 = &i2c_pe2_1;
+ i2c59 = &i2c_pe2_2;
+ i2c60 = &i2c_pe3_0;
+ i2c61 = &i2c_pe3_1;
+ i2c62 = &i2c_pe3_2;
+ i2c63 = &i2c_pe4_0;
+ i2c64 = &i2c_pe4_1;
+ i2c65 = &i2c_pe4_2;
+ i2c66 = &i2c_pe5_0;
+ i2c67 = &i2c_pe5_1;
+ i2c68 = &i2c_pe5_2;
+ i2c69 = &i2c_pe6_0;
+ i2c70 = &i2c_pe6_1;
+ i2c71 = &i2c_pe6_2;
+ i2c72 = &i2c_pe7_0;
+ i2c73 = &i2c_pe7_1;
+ i2c74 = &i2c_pe7_2;
+ };
+
+ chosen {
+ stdout-path = &serial3;
+ };
+
+ memory {
+ reg = <0 0x40000000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ efuse-pg {
+ label = "efuse-pg";
+ gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
+ linux,code = <57>;
+ };
+ };
+
+ iio-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
+ <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-bmc-live {
+ gpios = <&pca6416 4 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ LED_SYS_ERROR {
+ gpios = <&pca6416 3 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_SYS_ATTN {
+ gpios = <&pca6416 5 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_SYS_STATE {
+ gpios = <&pca6416_2 15 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ LED_BMC_FAULT {
+ gpios = <&gpio6 25 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ ERR0 {
+ gpios = <&pca9555 0 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ ERR1 {
+ gpios = <&pca9555 1 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ ERR2 {
+ gpios = <&pca9555 2 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
+ seven-seg-disp {
+ compatible = "seven-seg-gpio-dev";
+ refresh-interval-ms = /bits/ 16 <600>;
+ clock-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ data-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+ clear-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ pcie-slot {
+ pcie0: pcie-slot@0 {
+ label = "PE0";
+ };
+
+ pcie1: pcie-slot@1 {
+ label = "PE1";
+ };
+
+ pcie2: pcie-slot@2 {
+ label = "PE2";
+ };
+
+ pcie3: pcie-slot@3 {
+ label = "PE3";
+ };
+
+ pcie4: pcie-slot@4 {
+ label = "PE4";
+ };
+
+ pcie5: pcie-slot@5 {
+ label = "PE5";
+ };
+
+ pcie6: pcie-slot@6 {
+ label = "PE6";
+ };
+
+ pcie7: pcie-slot@7 {
+ label = "PE7";
+ };
+ };
+};
+
+&gcr {
+ serial_port_mux: mux-controller {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x38 0x07>;
+ idle-states = <2>; /* Serial port mode 3 (takeover) */
+ };
+};
+
+&gmac0 {
+ phy-mode = "rgmii-id";
+ snps,eee-force-disable;
+ status = "okay";
+};
+
+&emc0 {
+ status = "okay";
+ fixed-link {
+ speed = <100>;
+ full-duplex;
+ };
+};
+
+&mc {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&aes {
+ status = "okay";
+};
+
+&sha {
+ status = "okay";
+};
+
+&udc5 {
+ status = "okay";
+};
+
+&udc6 {
+ status = "okay";
+};
+
+&udc7 {
+ status = "okay";
+};
+
+&udc8 {
+ status = "okay";
+};
+
+&pcimbox {
+ status = "okay";
+};
+
+&sdhci0 {
+ status = "okay";
+};
+
+&fiu0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0cs1_pins>;
+ status = "okay";
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ spi-max-frequency = <19000000>;
+ spi-rx-bus-width = <2>;
+ label = "bmc";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot@0 {
+ label = "u-boot";
+ reg = <0x0000000 0xf0000>;
+ };
+ image-descriptor@f0000 {
+ label = "image-descriptor";
+ reg = <0xf0000 0x10000>;
+ };
+ hoth-update@100000 {
+ label = "hoth-update";
+ reg = <0x100000 0x100000>;
+ };
+ kernel@200000 {
+ label = "kernel";
+ reg = <0x200000 0x500000>;
+ };
+ rofs@700000 {
+ label = "rofs";
+ reg = <0x700000 0x35f0000>;
+ };
+ rwfs@3cf0000 {
+ label = "rwfs";
+ reg = <0x3cf0000 0x300000>;
+ };
+ hoth-mailbox@3ff0000 {
+ label = "hoth-mailbox";
+ reg = <0x3ff0000 0x10000>;
+ };
+ };
+ };
+};
+
+&fiu3 {
+ pinctrl-0 = <&spi3_pins>;
+ status = "okay";
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ spi-rx-bus-width = <2>;
+ label="bios";
+ };
+};
+
+&watchdog1 {
+ status = "okay";
+};
+
+&rng {
+ status = "okay";
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&serial1 {
+ status = "okay";
+};
+
+&serial2 {
+ status = "okay";
+};
+
+&serial3 {
+ status = "okay";
+};
+
+&adc {
+ #io-channel-cells = <1>;
+ status = "okay";
+};
+
+&otp {
+ status = "okay";
+};
+
+&lpc_kcs {
+ kcs1: kcs1@0 {
+ status = "okay";
+ };
+
+ kcs2: kcs2@0 {
+ status = "okay";
+ };
+
+ kcs3: kcs3@0 {
+ status = "okay";
+ };
+};
+
+&lpc_host {
+ lpc_bpc: lpc_bpc@40 {
+ monitor-ports = <0x80>;
+ status = "okay";
+ };
+};
+
+&i2c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+};
+
+&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+
+ i2c-switch@75 {
+ compatible = "nxp,pca9548";
+ reg = <0x75>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+ reset-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>; //gpio84
+
+ i2c_9SQ440NQQI8: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c_db2001: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ i2c_db1200: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ i2c_io_exp_1: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ pca6416@20 {
+ compatible = "nxp,pca6416";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ reset-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
+
+ G1A_P8 {
+ gpio-hog;
+ gpios = <8 0>;
+ input;
+ line-name = "PWRGD_P13V5_CPU0_R";
+ };
+ G1A_P9 {
+ gpio-hog;
+ gpios = <9 0>;
+ input;
+ line-name = "PWRGD_P13V5_CPU1_R";
+ };
+ G1A_P10 {
+ gpio-hog;
+ gpios = <10 0>;
+ input;
+ line-name = "PWRGD_PVPP_HBM_R_CPU0";
+ };
+ G1A_P11 {
+ gpio-hog;
+ gpios = <11 0>;
+ input;
+ line-name = "PWRGD_PVPP_HBM_R_CPU1";
+ };
+ };
+ };
+
+ i2c_cpu0_pirom: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ };
+
+ i2c_cpu1_pirom: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ };
+
+ i2c_ncsi_clk: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ };
+
+ i2c_m2: i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ };
+ };
+
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x77>;
+ i2c-mux-idle-disconnect;
+ reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>; //gpio85
+
+ i2c_fivra_cpu0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ vrm@72 {
+ compatible = "isil,raa229004", "xdpe152";
+ reg = <0x72>;
+ };
+ };
+
+ i2c_fivra_cpu1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ vrm@72 {
+ compatible = "isil,raa229004", "xdpe152";
+ reg = <0x72>;
+ };
+ };
+
+ i2c_vccfa_cpu0: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ vrm@72 {
+ compatible = "isil,isl69260", "xdpe152";
+ reg = <0x72>;
+ };
+ };
+
+ i2c_vccfa_cpu1: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ vrm@72 {
+ compatible = "isil,isl69260", "xdpe152";
+ reg = <0x72>;
+ };
+ };
+
+ i2c_vccd_cpu0: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ vrm@72 {
+ compatible = "isil,isl69260", "xdpe152";
+ reg = <0x72>;
+ };
+ };
+
+ i2c_vccd_cpu1: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ vrm@72 {
+ compatible = "isil,isl69260", "xdpe152";
+ reg = <0x72>;
+ };
+ };
+
+ i2c_hotswap: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ adm1272@1f {
+ compatible = "adi,adm1272";
+ reg = <0x1f>;
+ shunt-resistor-micro-ohms = <267>;
+ };
+ };
+ };
+};
+
+&i2c2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x77>;
+ i2c-mux-idle-disconnect;
+ reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; //gpio86
+
+ i2c_tps_1: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ // P3V3, TPS546D24ARVFR
+ tps546d24@25 {
+ compatible = "tps546d24";
+ reg = <0x25>;
+ };
+ };
+
+ i2c_p12v_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ i2c_p12v_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ i2c_fan_controller_1: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ fan_controller@2c {
+ compatible = "maxim,max31790";
+ reg = <0x2c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ i2c_i2cool_1: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ lm75@5c {
+ compatible = "maxim,max31725";
+ reg = <0x5c>;
+ status = "okay";
+ };
+ };
+
+ i2c_i2cool_2: i2c@5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+ lm75@5c {
+ compatible = "maxim,max31725";
+ reg = <0x5c>;
+ status = "okay";
+ };
+ };
+
+ i2c_i2cool_3: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ lm75@5c {
+ compatible = "maxim,max31725";
+ reg = <0x5c>;
+ status = "okay";
+ };
+ };
+ };
+};
+
+&i2c3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+ pcie-slot = &pcie0;
+ mctp-controller;
+
+ mctp@10 {
+ compatible = "mctp-i2c-controller";
+ reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
+ };
+
+ gpio@21 {
+ compatible = "nxp,pca8574";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "", "", "", "", "", "PE0_J16_CABLE_PRSNT_N", "", "";
+ PE0_P5 {
+ gpios = <5 GPIO_ACTIVE_HIGH>;
+ input;
+ line-name = "PE0_J16_CABLE_PRSNT_N";
+ };
+ };
+
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c_pe0_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c_pe0_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ i2c_pe0_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ pe0_x8_io_exp: pca9538@72 {
+ compatible = "nxp,pca9538";
+ reg = <0x72>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+ };
+};
+
+&i2c4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+
+ mobo_fru_1@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
+
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x77>;
+ i2c-mux-idle-disconnect;
+ reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; //gpio90
+
+ i2c_seq_mobo: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ sequencer@59 {
+ compatible = "maxim,max34451";
+ reg = <0x59>;
+ };
+ };
+
+ i2c_fru_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ mobo_fru_2@55 {
+ compatible = "atmel,24c256";
+ reg = <0x55>;
+ };
+ };
+
+ i2c_io_exp_2: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ pca6416_2: pca6416@20 {
+ compatible = "nxp,pca6416";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ reset-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
+
+ G4A_P14 {
+ gpio-hog;
+ gpios = <14 0>;
+ input;
+ line-name = "GRANITE_PRSNT_N";
+ };
+ };
+ };
+
+ i2c_io_exp_3: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ pca6416_3: pca6416@20 {
+ compatible = "nxp,pca6416";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "PE0_ADP_R_PRSNT_N","PE1_ADP_R_PRSNT_N",
+ "PE2_ADP_R_PRSNT_N", "PE3_ADP_R_PRSNT_N", "PE4_ADP_R_PRSNT_N",
+ "PE5_ADP_R_PRSNT_N", "PE6_ADP_R_PRSNT_N", "PE7_ADP_R_PRSNT_N",
+ "", "", "", "", "", "", "", "";
+ reset-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
+ G4B_P0 {
+ gpios = <0 0 GPIO_ACTIVE_LOW>;
+ input;
+ line-name = "PE0_ADP_R_PRSNT_N";
+ };
+ G4B_P1 {
+ gpios = <1 0 GPIO_ACTIVE_LOW>;
+ input;
+ line-name = "PE1_ADP_R_PRSNT_N";
+ };
+ G4B_P2 {
+ gpios = <2 0 GPIO_ACTIVE_LOW>;
+ input;
+ line-name = "PE2_ADP_R_PRSNT_N";
+ };
+ G4B_P3 {
+ gpios = <3 0 GPIO_ACTIVE_LOW>;
+ input;
+ line-name = "PE3_ADP_R_PRSNT_N";
+ };
+ G4B_P4 {
+ gpios = <4 0 GPIO_ACTIVE_LOW>;
+ input;
+ line-name = "PE4_ADP_R_PRSNT_N";
+ };
+ G4B_P5 {
+ gpios = <5 0 GPIO_ACTIVE_LOW>;
+ input;
+ line-name = "PE5_ADP_R_PRSNT_N";
+ };
+ G4B_P6 {
+ gpios = <6 0 GPIO_ACTIVE_LOW>;
+ input;
+ line-name = "PE6_ADP_R_PRSNT_N";
+ };
+ G4B_P7 {
+ gpios = <7 0 GPIO_ACTIVE_LOW>;
+ input;
+ line-name = "PE7_ADP_R_PRSNT_N";
+ };
+ };
+ };
+
+ i2c_fru_3: i2c@6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+ pdb_fru@55 {
+ compatible = "atmel,24c64";
+ reg = <0x55>;
+ };
+ };
+ };
+};
+
+&i2c5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+ pcie-slot = &pcie1;
+ mctp-controller;
+
+ mctp@10 {
+ compatible = "mctp-i2c-controller";
+ reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
+ };
+
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c_pe1_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c_pe1_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ i2c_pe1_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ pe1_x8_io_exp: pca9538@72 {
+ compatible = "nxp,pca9538";
+ reg = <0x72>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+ };
+};
+
+&i2c6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+ pcie-slot = &pcie2;
+ mctp-controller;
+
+ mctp@10 {
+ compatible = "mctp-i2c-controller";
+ reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
+ };
+
+ gpio@21 {
+ compatible = "nxp,pca8574";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "", "", "", "", "", "PE2_J16_CABLE_PRSNT_N", "", "";
+ PE2_P5 {
+ gpios = <5 GPIO_ACTIVE_HIGH>;
+ input;
+ line-name = "PE2_J16_CABLE_PRSNT_N";
+ };
+ };
+
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c_pe2_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c_pe2_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ i2c_pe2_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ pe2_x8_io_exp: pca9538@72 {
+ compatible = "nxp,pca9538";
+ reg = <0x72>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+ };
+};
+
+&i2c7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+ pcie-slot = &pcie3;
+ mctp-controller;
+
+ mctp@10 {
+ compatible = "mctp-i2c-controller";
+ reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
+ };
+
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c_pe3_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c_pe3_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ i2c_pe3_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ pe3_x8_io_exp: pca9538@72 {
+ compatible = "nxp,pca9538";
+ reg = <0x72>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+ };
+};
+
+&i2c8 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+ pcie-slot = &pcie4;
+ mctp-controller;
+
+ mctp@10 {
+ compatible = "mctp-i2c-controller";
+ reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
+ };
+
+ gpio@21 {
+ compatible = "nxp,pca8574";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "", "", "", "", "", "PE4_J16_CABLE_PRSNT_N", "", "";
+ PE4_P5 {
+ gpios = <5 GPIO_ACTIVE_HIGH>;
+ input;
+ line-name = "PE4_J16_CABLE_PRSNT_N";
+ };
+ };
+
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c_pe4_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c_pe4_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ i2c_pe4_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ pe4_x8_io_exp: pca9538@72 {
+ compatible = "nxp,pca9538";
+ reg = <0x72>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+ };
+};
+
+&i2c9 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+ pcie-slot = &pcie5;
+ mctp-controller;
+
+ mctp@10 {
+ compatible = "mctp-i2c-controller";
+ reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
+ };
+
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c_pe5_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c_pe5_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ i2c_pe5_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ pe5_x8_io_exp: pca9538@72 {
+ compatible = "nxp,pca9538";
+ reg = <0x72>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+ };
+};
+
+&i2c10 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+ pcie-slot = &pcie6;
+ mctp-controller;
+
+ mctp@10 {
+ compatible = "mctp-i2c-controller";
+ reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
+ };
+
+ gpio@21 {
+ compatible = "nxp,pca8574";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "", "", "", "", "", "PE6_J16_CABLE_PRSNT_N", "", "";
+ PE6_P5 {
+ gpios = <5 GPIO_ACTIVE_HIGH>;
+ input;
+ line-name = "PE6_J16_CABLE_PRSNT_N";
+ };
+ };
+
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c_pe6_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c_pe6_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ pca9538@72 {
+ compatible = "nxp,pca9538";
+ reg = <0x72>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ i2c_pe6_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ pe6_x8_io_exp: pca9538@72 {
+ compatible = "nxp,pca9538";
+ reg = <0x72>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ fan_controller@2c {
+ compatible = "maxim,max31790";
+ reg = <0x2c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
+};
+
+&i2c11 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+ pcie-slot = &pcie7;
+ mctp-controller;
+
+ mctp@10 {
+ compatible = "mctp-i2c-controller";
+ reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
+ };
+
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c_pe7_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c_pe7_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ i2c_pe7_2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ pe7_x8_io_exp: pca9538@72 {
+ compatible = "nxp,pca9538";
+ reg = <0x72>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+ };
+};
+
+&i2c12 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+};
+
+&i2c13 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+ pca9555: pca9555@22 {
+ compatible = "nxp,pca9555";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+};
+
+&i2c14 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ status = "okay";
+
+ pca6416: pca6416@20 {
+ compatible = "nxp,pca6416";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+
+ G14_P8 {
+ gpio-hog;
+ gpios = <8 0>;
+ output-high;
+ line-name = "RST_PCIE_PE0_N";
+ };
+ G14_P9 {
+ gpio-hog;
+ gpios = <9 0>;
+ output-high;
+ line-name = "RST_PCIE_PE1_N";
+ };
+ G14_P10 {
+ gpio-hog;
+ gpios = <10 0>;
+ output-high;
+ line-name = "RST_PCIE_PE2_N";
+ };
+ G14_P11 {
+ gpio-hog;
+ gpios = <11 0>;
+ output-high;
+ line-name = "RST_PCIE_PE3_N";
+ };
+ G14_P12 {
+ gpio-hog;
+ gpios = <12 0>;
+ output-high;
+ line-name = "RST_PCIE_PE4_N";
+ };
+ G14_P13 {
+ gpio-hog;
+ gpios = <13 0>;
+ output-high;
+ line-name = "RST_PCIE_PE5_N";
+ };
+ G14_P14 {
+ gpio-hog;
+ gpios = <14 0>;
+ output-high;
+ line-name = "RST_PCIE_PE6_N";
+ };
+ G14_P15 {
+ gpio-hog;
+ gpios = <15 0>;
+ output-high;
+ line-name = "RST_PCIE_PE7_N";
+ };
+ };
+
+ i2c-switch@77 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x77>;
+ i2c-mux-idle-disconnect;
+ reset-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>; //gpio88
+
+ i2c_seq: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ sequencer@59 {
+ compatible = "maxim,max34451";
+ reg = <0x59>;
+ };
+ };
+
+ i2c_fru_1: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ i2c_tang: i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ max31725@5c {
+ compatible = "maxim,max31725";
+ reg = <0x5c>;
+ status = "okay";
+ };
+ };
+
+ };
+};
+
+&spi0 {
+ cs-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio175ol_pins &gpio176o_pins
+ &gpio177_pins>;
+ status = "okay";
+ jtag_master {
+ compatible = "nuvoton,npcm750-jtag-master";
+ spi-max-frequency = <25000000>;
+ reg = <0>;
+
+ pinctrl-names = "pspi", "gpio";
+ pinctrl-0 = <&pspi1_pins>;
+ pinctrl-1 = <&gpio175ol_pins &gpio176o_pins
+ &gpio177_pins>;
+
+ tck-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
+ tdi-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>;
+ tdo-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
+ tms-gpios = <&gpio6 11 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ /* GPI pins*/
+ &gpio4_pins
+ &gpio5_pins
+ &gpio8_pins
+ &gpio9_pins
+ &gpio11_pins
+ &gpio12_pins
+ &gpio13_pins
+ &gpio14_pins
+ &gpio17_pins
+ &gpio18_pins
+ &gpio19_pins
+ &gpio24_pins
+ &gpio25_pins
+ &gpio38_pins
+ &gpio39_pins
+ &gpio40_pins
+ &gpio45_pins
+ &gpio47_pins
+ &gpio57_pins
+ &gpio58_pins
+ &gpio60_pins
+ &gpio64_pins
+ &gpio65_pins
+ &gpio71_pins
+ &gpio73_pins
+ &gpio74_pins
+ &gpio78_pins
+ &gpio79_pins
+ &gpio93_pins
+ &gpio94_pins
+ &gpio110_pins
+ &gpio111_pins
+ &gpio112_pins
+ &gpio113_pins
+ &gpio121_pins
+ &gpio122_pins
+ &gpio123_pins
+ &gpio124_pins
+ &gpio127_pins
+ &gpio136_pins
+ &gpio137_pins
+ &gpio138_pins
+ &gpio139_pins
+ &gpio140_pins
+ &gpio141_pins
+ &gpio142_pins
+ &gpio143_pins
+ &gpio144_pins
+ &gpio146_pins
+ &gpio192_pins
+ &gpio194_pins
+ &gpio195_pins
+ &gpio196_pins
+ &gpio199_pins
+ &gpio202_pins
+ &gpio204_pins
+ &gpio208_pins
+ &gpio209_pins
+ &gpio210_pins
+ &gpio211_pins
+ &gpio213_pins
+ &gpio214_pins
+ &gpio224_pins
+ &gpio227_pins
+ &gpio228_pins
+ &gpio230_pins
+ &gpio231_pins
+ &gpio177_pins
+
+ /* GPO pins*/
+ &gpio175ol_pins
+ &gpio176o_pins
+ >;
+};
+
+&gpio0 {
+ gpio-line-names =
+ /*0-31*/ "","","","","","SATA_PRESENCE","RESET_OUT","POWER_OUT",
+ "","","","","SIO_POWER_GOOD","PS_PWROK","","",
+ "","","","","","","","",
+ "CPU1_THERMTRIP","CPU2_THERMTRIP","","","","","","";
+};
+
+&gpio1 {
+ gpio-line-names =
+ /*32-63*/ "","","","","","P3VBAT","CPU_CATERR","",
+ "CPU_MCERR","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
+ U86_reset {
+ gpio-hog;
+ gpios = <0 0>;
+ output-low;
+ line-name = "RST_SMB_MUX_PCA9546_0_R_N";
+ };
+};
+
+&gpio2 {
+ gpio-line-names =
+ /*64-95*/ "POWER_BUTTON","RESET_BUTTON","","","","","","",
+ "","CPU1_VRHOT","CPU2_VRHOT","","","DEBUG_EN_N","XDP_PRST_N","",
+ "","TCK_MUX_SEL","PWR_DEBUG_N","PREQ_N","","","","",
+ "","","","","","","PCH_BMC_THERMTRIP","";
+};
+
+&gpio3 {
+ gpio-line-names =
+ /*96-127*/ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","SMI";
+};
+
+&gpio4 {
+ gpio-line-names =
+ /*128-159*/ "","","","","","","","",
+ "CPU1_MEM_THERM_EVENT","CPU2_MEM_THERM_EVENT","CPU_ERR0","CPU_ERR1",
+ "CPU_ERR2","","","POST_COMPLETE",
+ "PRDY_N","SYSPWROK","","","","","","",
+ "","","","","","","","";
+};
+
+&gpio6 {
+ gpio-line-names =
+ /*192-223*/ "","","","CPU1_PRESENCE","CPU2_PRESENCE","","","SIO_S5",
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
+};
+
+&gpio7 {
+ gpio-line-names =
+ /*224-255*/ "","","","PLTRST_N","CPU1_FIVR_FAULT","","CPU2_FIVR_FAULT","",
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
+};
+
+&peci0 {
+ cmd-timeout-ms = <1000>;
+ pull-down = <0>;
+ host-neg-bit-rate = <15>;
+ status = "okay";
+
+ intel-peci-dimmtemp@30 {
+ compatible = "intel,peci-client";
+ reg = <0x30>;
+ status = "okay";
+ };
+
+ intel-peci-dimmtemp@31 {
+ compatible = "intel,peci-client";
+ reg = <0x31>;
+ status = "okay";
+ };
+};
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 3/7] ARM: dts: nuvoton: gbs: Split SPI flash partition
2023-03-03 6:34 [PATCH 1/7] ARM: dts: nuvoton: Add Quanta GIS BMC Device Tree David Wang
2023-03-03 6:34 ` [PATCH 2/7] ARM: dts: nuvoton: Add Quanta GSZ " David Wang
@ 2023-03-03 6:34 ` David Wang
2023-03-03 6:34 ` [PATCH 4/7] ARM: dts: nuvoton: gbs: Remove ethernet aliases David Wang
` (5 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: David Wang @ 2023-03-03 6:34 UTC (permalink / raw)
To: arnd, olof, soc, robh+dt, krzysztof.kozlowski+dt
Cc: devicetree, David Wang, fran.hsu, benjaminfair, avifishman70,
venture, openbmc, linux-kernel, tali.perry1, linux-arm-kernel,
tmaimon77
Split the primary and secondary BIOS SPI EEPROMs in 2 partitions
Signed-off-by: David Wang <davidwang@quantatw.com>
---
arch/arm/boot/dts/nuvoton-npcm730-gbs.dts | 29 ++++++++++++++++++++++-
1 file changed, 28 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts b/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts
index 9e9eba8bad5e..a33766e430d7 100644
--- a/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts
+++ b/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts
@@ -414,7 +414,20 @@ flash@0 {
spi-max-frequency = <50000000>;
spi-rx-bus-width = <2>;
m25p,fast-read;
- label = "pnor";
+ label = "bios";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bios-primary@0 {
+ label = "bios-primary";
+ reg = <0x0000000 0x2000000>;
+ };
+ bios-secondary@2000000 {
+ label = "bios-secondary";
+ reg = <0x2000000 0x2000000>;
+ };
+ };
};
flash@1 {
compatible = "jedec,spi-nor";
@@ -424,6 +437,20 @@ flash@1 {
spi-max-frequency = <50000000>;
spi-rx-bus-width = <2>;
m25p,fast-read;
+ label = "bios-2";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bios-2-primary@0 {
+ label = "bios-2-primary";
+ reg = <0x0000000 0x2000000>;
+ };
+ bios-2-secondary@2000000 {
+ label = "bios-2-secondary";
+ reg = <0x2000000 0x2000000>;
+ };
+ };
};
};
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 4/7] ARM: dts: nuvoton: gbs: Remove ethernet aliases
2023-03-03 6:34 [PATCH 1/7] ARM: dts: nuvoton: Add Quanta GIS BMC Device Tree David Wang
2023-03-03 6:34 ` [PATCH 2/7] ARM: dts: nuvoton: Add Quanta GSZ " David Wang
2023-03-03 6:34 ` [PATCH 3/7] ARM: dts: nuvoton: gbs: Split SPI flash partition David Wang
@ 2023-03-03 6:34 ` David Wang
2023-03-03 6:34 ` [PATCH 5/7] ARM: dts: nuvoton: gsj: Correct gpio-pins David Wang
` (4 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: David Wang @ 2023-03-03 6:34 UTC (permalink / raw)
To: arnd, olof, soc, robh+dt, krzysztof.kozlowski+dt
Cc: devicetree, David Wang, fran.hsu, benjaminfair, avifishman70,
venture, openbmc, linux-kernel, tali.perry1, linux-arm-kernel,
tmaimon77
Alias "ethernet" in dts conflicted with systemd v252 naming rules and
caused a rename. Remove the aliases to avoid renaming.
Signed-off-by: David Wang <davidwang@quantatw.com>
---
arch/arm/boot/dts/nuvoton-npcm730-gbs.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts b/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts
index a33766e430d7..b27fe12e3962 100644
--- a/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts
+++ b/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts
@@ -10,7 +10,6 @@ / {
compatible = "quanta,gbs-bmc","nuvoton,npcm730";
aliases {
- ethernet1 = &gmac0;
serial0 = &serial0;
serial1 = &serial1;
serial2 = &serial2;
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 5/7] ARM: dts: nuvoton: gsj: Correct gpio-pins
2023-03-03 6:34 [PATCH 1/7] ARM: dts: nuvoton: Add Quanta GIS BMC Device Tree David Wang
` (2 preceding siblings ...)
2023-03-03 6:34 ` [PATCH 4/7] ARM: dts: nuvoton: gbs: Remove ethernet aliases David Wang
@ 2023-03-03 6:34 ` David Wang
2023-03-03 6:34 ` [PATCH 6/7] ARM: dts: nuvoton: gsj: Add non-mainline nodes David Wang
` (3 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: David Wang @ 2023-03-03 6:34 UTC (permalink / raw)
To: arnd, olof, soc, robh+dt, krzysztof.kozlowski+dt
Cc: devicetree, David Wang, fran.hsu, benjaminfair, avifishman70,
venture, openbmc, linux-kernel, tali.perry1, linux-arm-kernel,
tmaimon77
Correct gpio-pins accoring to the nuvoton pinctrl driver.
Signed-off-by: David Wang <davidwang@quantatw.com>
---
arch/arm/boot/dts/nuvoton-npcm730-gsj-gpio.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/nuvoton-npcm730-gsj-gpio.dtsi b/arch/arm/boot/dts/nuvoton-npcm730-gsj-gpio.dtsi
index 53cfd15fa03f..527755dfd4e1 100644
--- a/arch/arm/boot/dts/nuvoton-npcm730-gsj-gpio.dtsi
+++ b/arch/arm/boot/dts/nuvoton-npcm730-gsj-gpio.dtsi
@@ -99,12 +99,12 @@ gpio19pp_pins: gpio19pp-pins {
drive-push-pull;
};
gpio24pp_pins: gpio24pp-pins {
- pins = "GPIO24/IOXHDO";
+ pins = "GPIO24/HGPIO4/IOXHDO";
bias-disable;
drive-push-pull;
};
gpio25pp_pins: gpio25pp-pins {
- pins = "GPIO25/IOXHDI";
+ pins = "GPIO25/HGPIO5/IOXHDI";
bias-disable;
drive-push-pull;
};
@@ -114,12 +114,12 @@ gpio37od_pins: gpio37od-pins {
drive-open-drain;
};
gpio59pp_pins: gpio59pp-pins {
- pins = "GPIO59/SMB3DSDA";
+ pins = "GPIO59/HGPIO6/SMB3DSDA";
bias-disable;
drive-push-pull;
};
gpio60_pins: gpio60-pins {
- pins = "GPIO60/SMB3DSCL";
+ pins = "GPIO60/HGPIO7/SMB3DSCL";
bias-disable;
input-enable;
};
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 6/7] ARM: dts: nuvoton: gsj: Add non-mainline nodes
2023-03-03 6:34 [PATCH 1/7] ARM: dts: nuvoton: Add Quanta GIS BMC Device Tree David Wang
` (3 preceding siblings ...)
2023-03-03 6:34 ` [PATCH 5/7] ARM: dts: nuvoton: gsj: Correct gpio-pins David Wang
@ 2023-03-03 6:34 ` David Wang
2023-03-04 4:48 ` kernel test robot
2023-03-03 6:34 ` [PATCH 7/7] ARM: dts: nuvoton: gsj: Remove ethernet aliases David Wang
` (2 subsequent siblings)
7 siblings, 1 reply; 11+ messages in thread
From: David Wang @ 2023-03-03 6:34 UTC (permalink / raw)
To: arnd, olof, soc, robh+dt, krzysztof.kozlowski+dt
Cc: devicetree, David Wang, fran.hsu, benjaminfair, avifishman70,
venture, openbmc, linux-kernel, tali.perry1, linux-arm-kernel,
tmaimon77
This is the remaining non-mainline component of the patch that adds the
GSJ machine.
Signed-off-by: David Wang <davidwang@quantatw.com>
---
arch/arm/boot/dts/nuvoton-npcm730-gsj.dts | 35 +++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm/boot/dts/nuvoton-npcm730-gsj.dts b/arch/arm/boot/dts/nuvoton-npcm730-gsj.dts
index 2a394cc15284..48110f8aa3ca 100644
--- a/arch/arm/boot/dts/nuvoton-npcm730-gsj.dts
+++ b/arch/arm/boot/dts/nuvoton-npcm730-gsj.dts
@@ -14,6 +14,7 @@ / {
aliases {
ethernet1 = &gmac0;
serial3 = &serial3;
+ udc9 = &udc9;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
@@ -184,10 +185,40 @@ &gmac0 {
status = "okay";
};
+&mc {
+ status = "okay";
+};
+
+&emc0 {
+ phy-mode = "rmii";
+ use-ncsi;
+ status = "okay";
+};
+
&ehci1 {
status = "okay";
};
+&ohci1 {
+ status = "okay";
+};
+
+&aes {
+ status = "okay";
+};
+
+&sha {
+ status = "okay";
+};
+
+&pcimbox {
+ status = "okay";
+};
+
+&udc9 {
+ status = "okay";
+};
+
&watchdog1 {
status = "okay";
};
@@ -216,6 +247,10 @@ &adc {
status = "okay";
};
+&otp {
+ status = "okay";
+};
+
&i2c1 {
status = "okay";
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 7/7] ARM: dts: nuvoton: gsj: Remove ethernet aliases
2023-03-03 6:34 [PATCH 1/7] ARM: dts: nuvoton: Add Quanta GIS BMC Device Tree David Wang
` (4 preceding siblings ...)
2023-03-03 6:34 ` [PATCH 6/7] ARM: dts: nuvoton: gsj: Add non-mainline nodes David Wang
@ 2023-03-03 6:34 ` David Wang
2023-03-03 17:11 ` [PATCH 1/7] ARM: dts: nuvoton: Add Quanta GIS BMC Device Tree kernel test robot
2023-03-17 15:11 ` Arnd Bergmann
7 siblings, 0 replies; 11+ messages in thread
From: David Wang @ 2023-03-03 6:34 UTC (permalink / raw)
To: arnd, olof, soc, robh+dt, krzysztof.kozlowski+dt
Cc: devicetree, David Wang, fran.hsu, benjaminfair, avifishman70,
venture, openbmc, linux-kernel, tali.perry1, linux-arm-kernel,
tmaimon77
Alias "ethernet" in dts conflicted with systemd v252 naming rules and
caused a rename. Remove the aliases to avoid renaming.
Signed-off-by: David Wang <davidwang@quantatw.com>
---
arch/arm/boot/dts/nuvoton-npcm730-gsj.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/nuvoton-npcm730-gsj.dts b/arch/arm/boot/dts/nuvoton-npcm730-gsj.dts
index 48110f8aa3ca..2b3e0af5b928 100644
--- a/arch/arm/boot/dts/nuvoton-npcm730-gsj.dts
+++ b/arch/arm/boot/dts/nuvoton-npcm730-gsj.dts
@@ -12,7 +12,6 @@ / {
compatible = "nuvoton,npcm750";
aliases {
- ethernet1 = &gmac0;
serial3 = &serial3;
udc9 = &udc9;
i2c1 = &i2c1;
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 1/7] ARM: dts: nuvoton: Add Quanta GIS BMC Device Tree
2023-03-03 6:34 [PATCH 1/7] ARM: dts: nuvoton: Add Quanta GIS BMC Device Tree David Wang
` (5 preceding siblings ...)
2023-03-03 6:34 ` [PATCH 7/7] ARM: dts: nuvoton: gsj: Remove ethernet aliases David Wang
@ 2023-03-03 17:11 ` kernel test robot
2023-03-17 15:11 ` Arnd Bergmann
7 siblings, 0 replies; 11+ messages in thread
From: kernel test robot @ 2023-03-03 17:11 UTC (permalink / raw)
To: David Wang, arnd, olof, soc, robh+dt, krzysztof.kozlowski+dt
Cc: devicetree, David Wang, fran.hsu, tmaimon77, avifishman70,
venture, openbmc, linux-kernel, tali.perry1, oe-kbuild-all,
linux-arm-kernel, benjaminfair
Hi David,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on soc/for-next arm/for-next arm/fixes arm64/for-next/core clk/clk-next kvmarm/next rockchip/for-next shawnguo/for-next xilinx-xlnx/master linus/master v6.2 next-20230303]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/David-Wang/ARM-dts-nuvoton-Add-Quanta-GSZ-BMC-Device-Tree/20230303-143845
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link: https://lore.kernel.org/r/20230303063435.803097-1-davidwang%40quantatw.com
patch subject: [PATCH 1/7] ARM: dts: nuvoton: Add Quanta GIS BMC Device Tree
config: arm-randconfig-r046-20230302 (https://download.01.org/0day-ci/archive/20230304/202303040046.YS2c6Prp-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/35df7d319f11bec38f67ec9b341d8b9c4d51c028
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review David-Wang/ARM-dts-nuvoton-Add-Quanta-GSZ-BMC-Device-Tree/20230303-143845
git checkout 35df7d319f11bec38f67ec9b341d8b9c4d51c028
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202303040046.YS2c6Prp-lkp@intel.com/
All errors (new ones prefixed by >>):
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gis.dts:204.1-6 Label or path emc0 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gis.dts:212.1-4 Label or path mc not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gis.dts:220.1-7 Label or path ohci1 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gis.dts:224.1-5 Label or path aes not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gis.dts:228.1-5 Label or path sha not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gis.dts:232.1-6 Label or path udc5 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gis.dts:236.1-6 Label or path udc6 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gis.dts:240.1-6 Label or path udc7 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gis.dts:244.1-6 Label or path udc8 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gis.dts:248.1-6 Label or path udc9 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gis.dts:252.1-9 Label or path pcimbox not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gis.dts:369.1-5 Label or path otp not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gis.dts:387.1-10 Label or path lpc_host not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gis.dts:1059.1-7 Label or path peci0 not found
>> FATAL ERROR: Syntax error parsing input tree
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/7] ARM: dts: nuvoton: Add Quanta GSZ BMC Device Tree
2023-03-03 6:34 ` [PATCH 2/7] ARM: dts: nuvoton: Add Quanta GSZ " David Wang
@ 2023-03-03 23:30 ` kernel test robot
0 siblings, 0 replies; 11+ messages in thread
From: kernel test robot @ 2023-03-03 23:30 UTC (permalink / raw)
To: David Wang, arnd, olof, soc, robh+dt, krzysztof.kozlowski+dt
Cc: devicetree, David Wang, fran.hsu, tmaimon77, avifishman70,
venture, openbmc, linux-kernel, tali.perry1, oe-kbuild-all,
linux-arm-kernel, benjaminfair
Hi David,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on soc/for-next arm/for-next arm/fixes arm64/for-next/core clk/clk-next kvmarm/next rockchip/for-next shawnguo/for-next xilinx-xlnx/master linus/master v6.2 next-20230303]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/David-Wang/ARM-dts-nuvoton-Add-Quanta-GSZ-BMC-Device-Tree/20230303-143845
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link: https://lore.kernel.org/r/20230303063435.803097-2-davidwang%40quantatw.com
patch subject: [PATCH 2/7] ARM: dts: nuvoton: Add Quanta GSZ BMC Device Tree
config: arm-randconfig-r046-20230302 (https://download.01.org/0day-ci/archive/20230304/202303040612.codF6aYF-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/582e8c7ca5de26f639e46b839d9b4c6cbf7e43cf
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review David-Wang/ARM-dts-nuvoton-Add-Quanta-GSZ-BMC-Device-Tree/20230303-143845
git checkout 582e8c7ca5de26f639e46b839d9b4c6cbf7e43cf
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202303040612.codF6aYF-lkp@intel.com/
All errors (new ones prefixed by >>):
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsz.dts:223.1-6 Label or path emc0 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsz.dts:231.1-4 Label or path mc not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsz.dts:239.1-7 Label or path ohci1 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsz.dts:243.1-5 Label or path aes not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsz.dts:247.1-5 Label or path sha not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsz.dts:251.1-6 Label or path udc5 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsz.dts:255.1-6 Label or path udc6 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsz.dts:259.1-6 Label or path udc7 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsz.dts:263.1-6 Label or path udc8 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsz.dts:267.1-9 Label or path pcimbox not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsz.dts:271.1-8 Label or path sdhci0 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsz.dts:366.1-5 Label or path otp not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsz.dts:384.1-10 Label or path lpc_host not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsz.dts:1506.1-7 Label or path peci0 not found
FATAL ERROR: Syntax error parsing input tree
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 6/7] ARM: dts: nuvoton: gsj: Add non-mainline nodes
2023-03-03 6:34 ` [PATCH 6/7] ARM: dts: nuvoton: gsj: Add non-mainline nodes David Wang
@ 2023-03-04 4:48 ` kernel test robot
0 siblings, 0 replies; 11+ messages in thread
From: kernel test robot @ 2023-03-04 4:48 UTC (permalink / raw)
To: David Wang, arnd, olof, soc, robh+dt, krzysztof.kozlowski+dt
Cc: devicetree, David Wang, fran.hsu, tmaimon77, avifishman70,
venture, openbmc, linux-kernel, tali.perry1, oe-kbuild-all,
linux-arm-kernel, benjaminfair
Hi David,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on soc/for-next arm/for-next arm/fixes arm64/for-next/core clk/clk-next kvmarm/next rockchip/for-next shawnguo/for-next xilinx-xlnx/master linus/master v6.2 next-20230303]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/David-Wang/ARM-dts-nuvoton-Add-Quanta-GSZ-BMC-Device-Tree/20230303-143845
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link: https://lore.kernel.org/r/20230303063435.803097-6-davidwang%40quantatw.com
patch subject: [PATCH 6/7] ARM: dts: nuvoton: gsj: Add non-mainline nodes
config: arm-randconfig-r046-20230302 (https://download.01.org/0day-ci/archive/20230304/202303041219.aqKPeLbq-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/e0e9ec65c5d1ad7030102833e6ee800d936bf266
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review David-Wang/ARM-dts-nuvoton-Add-Quanta-GSZ-BMC-Device-Tree/20230303-143845
git checkout e0e9ec65c5d1ad7030102833e6ee800d936bf266
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202303041219.aqKPeLbq-lkp@intel.com/
All errors (new ones prefixed by >>):
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsj.dts:188.1-4 Label or path mc not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsj.dts:192.1-6 Label or path emc0 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsj.dts:202.1-7 Label or path ohci1 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsj.dts:206.1-5 Label or path aes not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsj.dts:210.1-5 Label or path sha not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsj.dts:214.1-9 Label or path pcimbox not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsj.dts:218.1-6 Label or path udc9 not found
>> Error: arch/arm/boot/dts/nuvoton-npcm730-gsj.dts:250.1-5 Label or path otp not found
FATAL ERROR: Syntax error parsing input tree
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/7] ARM: dts: nuvoton: Add Quanta GIS BMC Device Tree
2023-03-03 6:34 [PATCH 1/7] ARM: dts: nuvoton: Add Quanta GIS BMC Device Tree David Wang
` (6 preceding siblings ...)
2023-03-03 17:11 ` [PATCH 1/7] ARM: dts: nuvoton: Add Quanta GIS BMC Device Tree kernel test robot
@ 2023-03-17 15:11 ` Arnd Bergmann
7 siblings, 0 replies; 11+ messages in thread
From: Arnd Bergmann @ 2023-03-17 15:11 UTC (permalink / raw)
To: David Wang, Olof Johansson, soc, Rob Herring, krzysztof.kozlowski+dt
Cc: devicetree, David Wang, fran.hsu, benjaminfair, avifishman70,
venture, openbmc, linux-kernel, tali.perry1, linux-arm-kernel,
Tomer Maimon
On Fri, Mar 3, 2023, at 07:34, David Wang wrote:
> Add the device tree for the Quanta GIS BMC and it's
> based on NPCM730 SoC
>
> Signed-off-by: David Wang <davidwang@quantatw.com>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> .../boot/dts/nuvoton-npcm730-gis-pincfg.dtsi | 732 +++++++++++
> arch/arm/boot/dts/nuvoton-npcm730-gis.dts | 1076 +++++++++++++++++
> 3 files changed, 1809 insertions(+)
> create mode 100644 arch/arm/boot/dts/nuvoton-npcm730-gis-pincfg.dtsi
> create mode 100644 arch/arm/boot/dts/nuvoton-npcm730-gis.dts
Hi David,
I have not looked at the patch series in detail and assume it's
largely ok, but I should clarify a few issues about the submission:
You have sent this 'To:' the SoC and DT maintainers, but we are not
the ones that would pick up the patches. On a future submission,
please address the npcm maintainers in the 'To' field to clarify
that they are the ones to review and accept the patches. Please
leave out the soc@kernel.org address entirely from future submissions,
as we only use that when the platform maintainers send the pull
request for integration into the soc tree, not for getting things
into the platform specific trees.
There are a few automated replies from the build bot, you should
address those and resend the series.
Arnd
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2023-03-17 15:14 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-03-03 6:34 [PATCH 1/7] ARM: dts: nuvoton: Add Quanta GIS BMC Device Tree David Wang
2023-03-03 6:34 ` [PATCH 2/7] ARM: dts: nuvoton: Add Quanta GSZ " David Wang
2023-03-03 23:30 ` kernel test robot
2023-03-03 6:34 ` [PATCH 3/7] ARM: dts: nuvoton: gbs: Split SPI flash partition David Wang
2023-03-03 6:34 ` [PATCH 4/7] ARM: dts: nuvoton: gbs: Remove ethernet aliases David Wang
2023-03-03 6:34 ` [PATCH 5/7] ARM: dts: nuvoton: gsj: Correct gpio-pins David Wang
2023-03-03 6:34 ` [PATCH 6/7] ARM: dts: nuvoton: gsj: Add non-mainline nodes David Wang
2023-03-04 4:48 ` kernel test robot
2023-03-03 6:34 ` [PATCH 7/7] ARM: dts: nuvoton: gsj: Remove ethernet aliases David Wang
2023-03-03 17:11 ` [PATCH 1/7] ARM: dts: nuvoton: Add Quanta GIS BMC Device Tree kernel test robot
2023-03-17 15:11 ` Arnd Bergmann
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