* [PATCH linux dev-4.7 2/2] mtd: spi-nor: fix spi register address for AST2400
@ 2018-08-15 15:14 Alexander Amelkin
2018-08-15 18:54 ` Cédric Le Goater
2018-08-16 3:34 ` Lei YU
0 siblings, 2 replies; 4+ messages in thread
From: Alexander Amelkin @ 2018-08-15 15:14 UTC (permalink / raw)
To: openbmc, joel; +Cc: Alexander Soldatov
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According to AST2400 datasheet v1.4 the SPI Flash Read Timing
Setting register is at offset 0x14. There is no register at
offset 0x94 (unlike FMC controller and AST2500).
Signed-off-by: Alexander Soldatov <a.soldatov@yadro.com>
---
drivers/mtd/spi-nor/aspeed-smc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c
index c9cd20f..9ddf24b 100644
--- a/drivers/mtd/spi-nor/aspeed-smc.c
+++ b/drivers/mtd/spi-nor/aspeed-smc.c
@@ -71,7 +71,7 @@ static const struct aspeed_smc_info spi_2400_info = {
.hastype = false,
.we0 = 0,
.ctl0 = 0x04,
- .timing = 0x94,
+ .timing = 0x14,
.set_4b = aspeed_smc_chip_set_4b_spi_2400,
.optimize_read = aspeed_smc_optimize_read,
};
--
2.7.4
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH linux dev-4.7 2/2] mtd: spi-nor: fix spi register address for AST2400
2018-08-15 15:14 [PATCH linux dev-4.7 2/2] mtd: spi-nor: fix spi register address for AST2400 Alexander Amelkin
@ 2018-08-15 18:54 ` Cédric Le Goater
2018-08-16 3:34 ` Lei YU
1 sibling, 0 replies; 4+ messages in thread
From: Cédric Le Goater @ 2018-08-15 18:54 UTC (permalink / raw)
To: Alexander Amelkin, openbmc, joel; +Cc: Alexander Soldatov
On 08/15/2018 05:14 PM, Alexander Amelkin wrote:
> According to AST2400 datasheet v1.4 the SPI Flash Read Timing
> Setting register is at offset 0x14. There is no register at
> offset 0x94 (unlike FMC controller and AST2500).
ouch :/ Typo of mine.
> Signed-off-by: Alexander Soldatov <a.soldatov@yadro.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
I will merge this fix in the patchset I have sent to mainline, if you
don't mine.
Thanks,
C.
> ---
> drivers/mtd/spi-nor/aspeed-smc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c
> index c9cd20f..9ddf24b 100644
> --- a/drivers/mtd/spi-nor/aspeed-smc.c
> +++ b/drivers/mtd/spi-nor/aspeed-smc.c
> @@ -71,7 +71,7 @@ static const struct aspeed_smc_info spi_2400_info = {
> .hastype = false,
> .we0 = 0,
> .ctl0 = 0x04,
> - .timing = 0x94,
> + .timing = 0x14,
> .set_4b = aspeed_smc_chip_set_4b_spi_2400,
> .optimize_read = aspeed_smc_optimize_read,
> };
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH linux dev-4.7 2/2] mtd: spi-nor: fix spi register address for AST2400
2018-08-15 15:14 [PATCH linux dev-4.7 2/2] mtd: spi-nor: fix spi register address for AST2400 Alexander Amelkin
2018-08-15 18:54 ` Cédric Le Goater
@ 2018-08-16 3:34 ` Lei YU
2018-08-20 9:20 ` Alexander Amelkin
1 sibling, 1 reply; 4+ messages in thread
From: Lei YU @ 2018-08-16 3:34 UTC (permalink / raw)
To: Alexander Amelkin; +Cc: OpenBMC Maillist, Joel Stanley, a.soldatov
I think the mail subject should be patch linux dev-4.17, instead of dev-4.7.
Tested-by: Lei YU <mine260309@gmail.com>
On Wed, Aug 15, 2018 at 11:15 PM Alexander Amelkin <a.amelkin@yadro.com> wrote:
>
> According to AST2400 datasheet v1.4 the SPI Flash Read Timing
> Setting register is at offset 0x14. There is no register at
> offset 0x94 (unlike FMC controller and AST2500).
>
> Signed-off-by: Alexander Soldatov <a.soldatov@yadro.com>
> ---
> drivers/mtd/spi-nor/aspeed-smc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c
> index c9cd20f..9ddf24b 100644
> --- a/drivers/mtd/spi-nor/aspeed-smc.c
> +++ b/drivers/mtd/spi-nor/aspeed-smc.c
> @@ -71,7 +71,7 @@ static const struct aspeed_smc_info spi_2400_info = {
> .hastype = false,
> .we0 = 0,
> .ctl0 = 0x04,
> - .timing = 0x94,
> + .timing = 0x14,
> .set_4b = aspeed_smc_chip_set_4b_spi_2400,
> .optimize_read = aspeed_smc_optimize_read,
> };
> --
> 2.7.4
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH linux dev-4.7 2/2] mtd: spi-nor: fix spi register address for AST2400
2018-08-16 3:34 ` Lei YU
@ 2018-08-20 9:20 ` Alexander Amelkin
0 siblings, 0 replies; 4+ messages in thread
From: Alexander Amelkin @ 2018-08-20 9:20 UTC (permalink / raw)
To: Lei YU; +Cc: OpenBMC Maillist, Joel Stanley, a.soldatov
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Yes, sure. That was a typo.
16.08.2018 06:34, Lei YU wrote:
> I think the mail subject should be patch linux dev-4.17, instead of dev-4.7.
>
> Tested-by: Lei YU <mine260309@gmail.com>
> On Wed, Aug 15, 2018 at 11:15 PM Alexander Amelkin <a.amelkin@yadro.com> wrote:
>> According to AST2400 datasheet v1.4 the SPI Flash Read Timing
>> Setting register is at offset 0x14. There is no register at
>> offset 0x94 (unlike FMC controller and AST2500).
>>
>> Signed-off-by: Alexander Soldatov <a.soldatov@yadro.com>
>> ---
>> drivers/mtd/spi-nor/aspeed-smc.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c
>> index c9cd20f..9ddf24b 100644
>> --- a/drivers/mtd/spi-nor/aspeed-smc.c
>> +++ b/drivers/mtd/spi-nor/aspeed-smc.c
>> @@ -71,7 +71,7 @@ static const struct aspeed_smc_info spi_2400_info = {
>> .hastype = false,
>> .we0 = 0,
>> .ctl0 = 0x04,
>> - .timing = 0x94,
>> + .timing = 0x14,
>> .set_4b = aspeed_smc_chip_set_4b_spi_2400,
>> .optimize_read = aspeed_smc_optimize_read,
>> };
>> --
>> 2.7.4
>>
>>
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2018-08-15 15:14 [PATCH linux dev-4.7 2/2] mtd: spi-nor: fix spi register address for AST2400 Alexander Amelkin
2018-08-15 18:54 ` Cédric Le Goater
2018-08-16 3:34 ` Lei YU
2018-08-20 9:20 ` Alexander Amelkin
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