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* [PATCH] ARM: dts: aspeed: Adding Inventec Transformers BMC
@ 2021-08-25  7:34 Lin.TommySC 林世欽 TAO
  2021-08-25 12:13 ` Joel Stanley
  0 siblings, 1 reply; 8+ messages in thread
From: Lin.TommySC 林世欽 TAO @ 2021-08-25  7:34 UTC (permalink / raw)
  To: openbmc
  Cc: Ye.Vic 葉宇清 TAO, Mohammed.Habeeb ISV,
	Kuo.Marcel 郭士德 ISV


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As titled.

BR
Tommy

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From c50feb30b0313250339e9149410ebdd8139c5f80 Mon Sep 17 00:00:00 2001
From: "Lin.TommySC" <lin.tommysc@inventec.com>
Date: Tue, 24 Aug 2021 05:44:59 +0000
Subject: [PATCH] Linux add Transformers machine config

Initial introduction of Inventec Transformers family equipped with Aspeed 2600 BMC SoC.
---
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 arch/arm/boot/dts/Makefile                    |   1 +
 .../dts/aspeed-bmc-inventec-transformers.dts  | 362 ++++++++++++++++++
 3 files changed, 365 insertions(+)
 create mode 100644 arch/arm/boot/dts/aspeed-bmc-inventec-transformers.dts

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 355b81148b85..28c068ed0a75 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -507,6 +507,8 @@ patternProperties:
     description: Inter Control Group
   "^invensense,.*":
     description: InvenSense Inc.
+  "^inventec,.*":
+    description: Inventec Corporation
   "^inversepath,.*":
     description: Inverse Path
   "^iom,.*":
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 48d48c85de9e..930b8ba6c3c5 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1407,6 +1407,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
 	aspeed-bmc-intel-s2600wf.dtb \
 	aspeed-bmc-inspur-fp5280g2.dtb \
 	aspeed-bmc-inspur-nf5280m6.dtb \
+	aspeed-bmc-inventec-transformers.dtb \
 	aspeed-bmc-lenovo-hr630.dtb \
 	aspeed-bmc-lenovo-hr855xg2.dtb \
 	aspeed-bmc-microsoft-olympus.dtb \
diff --git a/arch/arm/boot/dts/aspeed-bmc-inventec-transformers.dts b/arch/arm/boot/dts/aspeed-bmc-inventec-transformers.dts
new file mode 100644
index 000000000000..e7866c7dba7f
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-inventec-transformers.dts
@@ -0,0 +1,362 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// Copyright 2021 Inventec Corp.
+
+/dts-v1/;
+
+#include "aspeed-g6.dtsi"
+#include "aspeed-g6-pinctrl.dtsi"
+#include <dt-bindings/i2c/i2c.h>
+#include <dt-bindings/gpio/aspeed-gpio.h>
+
+/ {
+	model = "TRANSFORMERS BMC";
+	compatible = "inventec,transformer-bmc", "aspeed,ast2600";
+
+	aliases {
+		serial4 = &uart5;
+	};
+
+	chosen {
+		stdout-path = &uart5;
+		bootargs = "console=tty0 console=ttyS4,115200n8 root=/dev/ram rw init=/linuxrc";
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x80000000 0x80000000>;
+	};
+
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		gfx_memory: framebuffer {
+			size = <0x01000000>;
+			alignment = <0x01000000>;
+			compatible = "shared-dma-pool";
+			reusable;
+		};
+
+		video_engine_memory: video {
+			size = <0x04000000>;
+			alignment = <0x01000000>;
+			compatible = "shared-dma-pool";
+			reusable;
+		};
+
+		ssp_memory: ssp_memory {
+			size = <0x00200000>;
+			alignment = <0x00100000>;
+			compatible = "shared-dma-pool";
+			no-map;
+		};
+	};
+
+	iio-hwmon {
+		compatible = "iio-hwmon";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		// UID led
+		uid {
+			label = "UID_LED";
+			gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>;
+		};
+
+		// Heart beat led
+		heartbeat {
+			label = "HB_LED";
+			gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&mdio0 {
+	status = "okay";
+
+	ethphy0: ethernet-phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <1>;
+	};
+};
+
+&mac3 {
+	status = "okay";
+	phy-mode = "rgmii";
+	phy-handle = <&ethphy0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_rgmii4_default>;
+};
+
+&fmc {
+	status = "okay";
+
+	flash@0 {
+		status = "okay";
+		m25p,fast-read;
+		label = "bmc";
+		spi-max-frequency = <33000000>;
+		spi-tx-bus-width = <2>;
+		spi-rx-bus-width = <2>;
+#include "openbmc-flash-layout.dtsi"
+	};
+
+	flash@1 {
+		status = "okay";
+		m25p,fast-read;
+		label = "bmc2";
+		spi-max-frequency = <33000000>;
+		spi-tx-bus-width = <2>;
+		spi-rx-bus-width = <2>;
+	};
+};
+
+&spi1 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_spi1_default>;
+
+	flash@0 {
+		status = "okay";
+		m25p,fast-read;
+		label = "bios";
+		spi-max-frequency = <33000000>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <1>;
+	};
+};
+
+&wdt1 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&uart5 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+
+	//Set bmc' slave address;
+	bmc_slave@10 {
+		compatible = "ipmb-dev";
+		reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
+		i2c-protocol;
+	};
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2c3 {
+	// FRU AT24C512C-SSHM-T
+	status = "okay";
+	eeprom@50 {
+		compatible = "atmel,24c512";
+		reg = <0x50>;
+		pagesize = <128>;
+	};
+};
+
+&i2c5 {
+	status = "okay";
+};
+
+&i2c6 {
+	status = "okay";
+
+	tmp75@49 {
+		compatible = "ti,tmp75";
+		reg = <0x49>;
+	};
+
+	tmp75@4f {
+		compatible = "ti,tmp75";
+		reg = <0x4f>;
+	};
+
+	tmp468@48 {
+		compatible = "ti,tmp468";
+		reg = <0x48>;
+	};
+};
+
+&i2c7 {
+	status = "okay";
+	adm1278@40 {
+		compatible = "adi,adm1278";
+		reg = <0x40>;
+	};
+};
+
+
+&i2c8 {
+	// FRU AT24C512C-SSHM-T
+	status = "okay";
+
+	eeprom@51 {
+		compatible = "atmel,24c512";
+		reg = <0x51>;
+		pagesize = <128>;
+	};
+
+	eeprom@53 {
+		compatible = "atmel,24c512";
+		reg = <0x53>;
+		pagesize = <128>;
+	};
+};
+
+&i2c9 {
+	// M.2
+	status = "okay";
+};
+
+&i2c10 {
+	// I2C EXPANDER
+	status = "okay";
+
+	i2c-switch@71 {
+		compatible = "nxp,pca9544";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x71>;
+	};
+
+	i2c-switch@73 {
+		compatible = "nxp,pca9544";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x73>;
+	};
+};
+
+&i2c11 {
+	// I2C EXPANDER
+	status = "okay";
+
+	i2c-switch@70 {
+		compatible = "nxp,pca9544";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x70>;
+
+		pcie_eeprom_riser1: i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+
+			eeprom@55 {
+				compatible = "atmel,24c512";
+				reg = <0x55>;
+				pagesize = <128>;
+			};
+		};
+
+		pcie_eeprom_riser2: i2c@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+
+			eeprom@55 {
+				compatible = "atmel,24c512";
+				reg = <0x55>;
+				pagesize = <128>;
+			};
+		};
+
+		pcie_eeprom_riser3: i2c@2 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <2>;
+
+			eeprom@55 {
+				compatible = "atmel,24c512";
+				reg = <0x55>;
+				pagesize = <128>;
+			};
+		};
+	};
+};
+
+&i2c12 {
+	status = "okay";
+
+	psu0:psu0@58 {
+		compatible = "pmbus";
+		reg = <0x58>;
+	};
+};
+
+&gpio0 {
+	status = "okay";
+	gpio-line-names =
+	/*A0-A7*/   "","","","","","","","",
+	/*B0-B7*/   "I2C_HSC_ALERT","BMC_READY","","","","","PSU1_ALERT","",
+	/*C0-C7*/   "","","","","","","","",
+	/*D0-D7*/   "","","","","","","","",
+	/*E0-E7*/   "","","","","","","","",
+	/*F0-F7*/   "","","","","RST_BMC_SGPIO","","","",
+	/*G0-G7*/   "","","JTAG_MUX_SEL","","","","","",
+	/*H0-H7*/   "","","","","RESET_OUT","POWER_OUT","","",
+	/*I0-I7*/   "","","","","","","NMI_OUT","",
+	/*J0-J7*/   "","","","","","","","",
+	/*K0-K7*/   "","","","","","","","",
+	/*L0-L7*/   "","","","","","","","",
+	/*M0-M7*/   "","","","","","","","",
+	/*N0-N7*/   "","","","","","","","",
+	/*O0-O7*/   "","","","","","","","",
+	/*P0-P7*/   "","","","TCK_MUX_SEL","BMC_ASD_JTAG_EN","","PREQ_N","",
+	/*Q0-Q7*/   "","","","","","","","",
+	/*R0-R7*/   "","","","","","","","",
+	/*S0-S7*/   "","","","","","","PCH_THERMTRIP","",
+	/*T0-T7*/   "","","","","","","","",
+	/*U0-U7*/   "","NMI_BUTTON","","","","","","",
+	/*V0-V7*/   "","","","","PS_PWROK","","","PRDY_N",
+	/*W0-W7*/   "","","","","","","","",
+	/*X0-X7*/   "","","","CPLD_CATERR","","","","",
+	/*Y0-Y7*/   "","","","","","","","",
+	/*Z0-Z7*/   "","","","","","","","",
+	/*AA0-AA7*/ "","","","","","","","",
+	/*AB0-AB7*/ "","","","","","","","",
+	/*AC0-AC7*/ "","","","","","","","";
+};
+
+&lpc_snoop {
+	status = "okay";
+	snoop-ports = <0x80>;
+};
+
+&emmc_controller {
+	status = "okay";
+	timing-phase = <0x700FF>;
+};
+
+&emmc {
+	status = "okay";
+
+	non-removable;
+	max-frequency = <52000000>;
+	sdhci-drive-type = /bits/ 8 <3>;
+	bus-width = <8>;
+};
+
+&vhub {
+	status = "okay";
+	aspeed,vhub-downstream-ports = <7>;
+	aspeed,vhub-generic-endpoints = <21>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usb2ad_default>;
+};
+
+&rtc {
+	status = "okay";
+};
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH] ARM: dts: aspeed: Adding Inventec Transformers BMC
  2021-08-25  7:34 [PATCH] ARM: dts: aspeed: Adding Inventec Transformers BMC Lin.TommySC 林世欽 TAO
@ 2021-08-25 12:13 ` Joel Stanley
  2021-08-26  2:11   ` Lin.TommySC 林世欽 TAO
  2021-08-26  2:18   ` Lin.TommySC 林世欽 TAO
  0 siblings, 2 replies; 8+ messages in thread
From: Joel Stanley @ 2021-08-25 12:13 UTC (permalink / raw)
  To: Lin.TommySC 林世欽 TAO
  Cc: Ye.Vic 葉宇清 TAO, openbmc,
	Mohammed.Habeeb ISV, Kuo.Marcel 郭士德 ISV

Hi Tommy,

On Wed, 25 Aug 2021 at 12:11, Lin.TommySC 林世欽 TAO
<Lin.TommySC@inventec.com> wrote:
>
> As titled.

Thanks for the patch.

When submitting patches for open source projects like the kernel, we
usually use git-send-email. This will send your code as an inline
diff, allowing us to review and apply it.

If you could resend that would be appreciated.

Cheers,

Joel

^ permalink raw reply	[flat|nested] 8+ messages in thread

* RE: [PATCH] ARM: dts: aspeed: Adding Inventec Transformers BMC
  2021-08-25 12:13 ` Joel Stanley
@ 2021-08-26  2:11   ` Lin.TommySC 林世欽 TAO
  2021-08-26  2:18   ` Lin.TommySC 林世欽 TAO
  1 sibling, 0 replies; 8+ messages in thread
From: Lin.TommySC 林世欽 TAO @ 2021-08-26  2:11 UTC (permalink / raw)
  To: Joel Stanley
  Cc: Ye.Vic 葉宇清 TAO, openbmc,
	Mohammed.Habeeb ISV, Kuo.Marcel 郭士德 ISV

Hi Joel,

Is it possible that I resend my mail with inline diff patch again? Because it looks like git-send-email supports only POP which is not supported by our company's mail server.

BR
Tommy

-----Original Message-----
From: Joel Stanley [mailto:joel@jms.id.au] 
Sent: Wednesday, August 25, 2021 8:13 PM
To: Lin.TommySC 林世欽 TAO <Lin.TommySC@inventec.com>
Cc: openbmc@lists.ozlabs.org; Ye.Vic 葉宇清 TAO <ye.vic@inventec.com>; Mohammed.Habeeb ISV <mohammed.habeeb@inventec.com>; Kuo.Marcel 郭士德 ISV <kuo.marcel@inventec.com>
Subject: Re: [PATCH] ARM: dts: aspeed: Adding Inventec Transformers BMC

Hi Tommy,

On Wed, 25 Aug 2021 at 12:11, Lin.TommySC 林世欽 TAO <Lin.TommySC@inventec.com> wrote:
>
> As titled.

Thanks for the patch.

When submitting patches for open source projects like the kernel, we usually use git-send-email. This will send your code as an inline diff, allowing us to review and apply it.

If you could resend that would be appreciated.

Cheers,

Joel

^ permalink raw reply	[flat|nested] 8+ messages in thread

* RE: [PATCH] ARM: dts: aspeed: Adding Inventec Transformers BMC
  2021-08-25 12:13 ` Joel Stanley
  2021-08-26  2:11   ` Lin.TommySC 林世欽 TAO
@ 2021-08-26  2:18   ` Lin.TommySC 林世欽 TAO
  2021-08-26  3:47     ` Joel Stanley
  1 sibling, 1 reply; 8+ messages in thread
From: Lin.TommySC 林世欽 TAO @ 2021-08-26  2:18 UTC (permalink / raw)
  To: Joel Stanley
  Cc: Ye.Vic 葉宇清 TAO, openbmc,
	Mohammed.Habeeb ISV, Kuo.Marcel 郭士德 ISV

Hi Joel,

Sorry for my typo. I mean it seems that git-send-email command supports only SMTP. And our mail server supports only POP and IMAP. So do you accept that I resend my mail with inline diff patch?

BR
Tommy

-----Original Message-----
From: Lin.TommySC 林世欽 TAO 
Sent: Thursday, August 26, 2021 10:12 AM
To: 'Joel Stanley' <joel@jms.id.au>
Cc: openbmc@lists.ozlabs.org; Ye.Vic 葉宇清 TAO <ye.vic@inventec.com>; Mohammed.Habeeb ISV <Mohammed.Habeeb@inventec.com>; Kuo.Marcel 郭士德 ISV <Kuo.Marcel@inventec.com>
Subject: RE: [PATCH] ARM: dts: aspeed: Adding Inventec Transformers BMC

Hi Joel,

Is it possible that I resend my mail with inline diff patch again? Because it looks like git-send-email supports only POP which is not supported by our company's mail server.

BR
Tommy

-----Original Message-----
From: Joel Stanley [mailto:joel@jms.id.au] 
Sent: Wednesday, August 25, 2021 8:13 PM
To: Lin.TommySC 林世欽 TAO <Lin.TommySC@inventec.com>
Cc: openbmc@lists.ozlabs.org; Ye.Vic 葉宇清 TAO <ye.vic@inventec.com>; Mohammed.Habeeb ISV <mohammed.habeeb@inventec.com>; Kuo.Marcel 郭士德 ISV <kuo.marcel@inventec.com>
Subject: Re: [PATCH] ARM: dts: aspeed: Adding Inventec Transformers BMC

Hi Tommy,

On Wed, 25 Aug 2021 at 12:11, Lin.TommySC 林世欽 TAO <Lin.TommySC@inventec.com> wrote:
>
> As titled.

Thanks for the patch.

When submitting patches for open source projects like the kernel, we usually use git-send-email. This will send your code as an inline diff, allowing us to review and apply it.

If you could resend that would be appreciated.

Cheers,

Joel

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] ARM: dts: aspeed: Adding Inventec Transformers BMC
  2021-08-26  2:18   ` Lin.TommySC 林世欽 TAO
@ 2021-08-26  3:47     ` Joel Stanley
  2021-09-30  1:18       ` Lin.TommySC 林世欽 TAO
  0 siblings, 1 reply; 8+ messages in thread
From: Joel Stanley @ 2021-08-26  3:47 UTC (permalink / raw)
  To: Lin.TommySC 林世欽 TAO
  Cc: Ye.Vic 葉宇清 TAO, openbmc,
	Mohammed.Habeeb ISV, Kuo.Marcel 郭士德 ISV

On Thu, 26 Aug 2021 at 02:18, Lin.TommySC 林世欽 TAO
<Lin.TommySC@inventec.com> wrote:
>
> Hi Joel,
>
> Sorry for my typo. I mean it seems that git-send-email command supports only SMTP. And our mail server supports only POP and IMAP. So do you accept that I resend my mail with inline diff patch?

The problem with pasting the patch into your email client is it often
modifies the whitespace, causing the patch to be corrupt. You can try
though.

A common workaround is to use a different address for your open source
work, such as a gmail.com account.

Cheers,

Joel

^ permalink raw reply	[flat|nested] 8+ messages in thread

* RE: [PATCH] ARM: dts: aspeed: Adding Inventec Transformers BMC
  2021-08-26  3:47     ` Joel Stanley
@ 2021-09-30  1:18       ` Lin.TommySC 林世欽 TAO
  0 siblings, 0 replies; 8+ messages in thread
From: Lin.TommySC 林世欽 TAO @ 2021-09-30  1:18 UTC (permalink / raw)
  To: Joel Stanley
  Cc: Ye.Vic 葉宇清 TAO, openbmc,
	Mohammed.Habeeb ISV, Kuo.Marcel 郭士德 ISV

Hi Joel,

I've sent my patch again using "git imap-send" but without any feedback. Would you mind checking this link?
https://lists.ozlabs.org/pipermail/openbmc/2021-August/027383.html

Thanks
Tommy

-----Original Message-----
From: Joel Stanley [mailto:joel@jms.id.au] 
Sent: Thursday, August 26, 2021 11:47 AM
To: Lin.TommySC 林世欽 TAO <Lin.TommySC@inventec.com>
Cc: openbmc@lists.ozlabs.org; Ye.Vic 葉宇清 TAO <ye.vic@inventec.com>; Mohammed.Habeeb ISV <mohammed.habeeb@inventec.com>; Kuo.Marcel 郭士德 ISV <kuo.marcel@inventec.com>
Subject: Re: [PATCH] ARM: dts: aspeed: Adding Inventec Transformers BMC

On Thu, 26 Aug 2021 at 02:18, Lin.TommySC 林世欽 TAO <Lin.TommySC@inventec.com> wrote:
>
> Hi Joel,
>
> Sorry for my typo. I mean it seems that git-send-email command supports only SMTP. And our mail server supports only POP and IMAP. So do you accept that I resend my mail with inline diff patch?

The problem with pasting the patch into your email client is it often modifies the whitespace, causing the patch to be corrupt. You can try though.

A common workaround is to use a different address for your open source work, such as a gmail.com account.

Cheers,

Joel

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] ARM: dts: aspeed: Adding Inventec Transformers BMC
  2021-08-27  1:20 ` Lin.TommySC 林世欽 TAO
@ 2021-10-06  6:44   ` Joel Stanley
  0 siblings, 0 replies; 8+ messages in thread
From: Joel Stanley @ 2021-10-06  6:44 UTC (permalink / raw)
  To: Lin.TommySC 林世欽 TAO
  Cc: Ye.Vic 葉宇清 TAO, openbmc, Mohammed.Habeeb ISV

On Fri, 27 Aug 2021 at 05:45, Lin.TommySC 林世欽 TAO
<Lin.TommySC@inventec.com> wrote:
>
> Initial introduction of Inventec Transformers family equipped with Aspeed 2600 BMC SoC.

I assume this is an x86 server? Mentioning details like this is useful
for review, but is not required.

>
> Signed-off-by: Lin.TommySC <lin.tommysc@inventec.com>

Ensure your author name is set correctly:

git config --global user.anime "Lin Tommy SC" (or whatever spelling
makes sense).

> ---
>  .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
>  arch/arm/boot/dts/Makefile                    |   1 +
>  .../dts/aspeed-bmc-inventec-transformers.dts  | 486 ++++++++++++++++++
>  3 files changed, 489 insertions(+)
>  create mode 100644 arch/arm/boot/dts/aspeed-bmc-inventec-transformers.dts
>
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> index 355b81148b85..28c068ed0a75 100644
> --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
> +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> @@ -507,6 +507,8 @@ patternProperties:
>      description: Inter Control Group
>    "^invensense,.*":
>      description: InvenSense Inc.
> +  "^inventec,.*":
> +    description: Inventec Corporation

Please send this change in a separate patch.

>    "^inversepath,.*":
>      description: Inverse Path
>    "^iom,.*":
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 48d48c85de9e..930b8ba6c3c5 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1407,6 +1407,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
>         aspeed-bmc-intel-s2600wf.dtb \
>         aspeed-bmc-inspur-fp5280g2.dtb \
>         aspeed-bmc-inspur-nf5280m6.dtb \
> +       aspeed-bmc-inventec-transformers.dtb \
>         aspeed-bmc-lenovo-hr630.dtb \
>         aspeed-bmc-lenovo-hr855xg2.dtb \
>         aspeed-bmc-microsoft-olympus.dtb \
> diff --git a/arch/arm/boot/dts/aspeed-bmc-inventec-transformers.dts b/arch/arm/boot/dts/aspeed-bmc-inventec-transformers.dts
> new file mode 100644
> index 000000000000..4ff28d1439cd
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-inventec-transformers.dts
> @@ -0,0 +1,486 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +// Copyright 2021 Inventec Corp.
> +
> +/dts-v1/;
> +
> +#include "aspeed-g6.dtsi"
> +#include "aspeed-g6-pinctrl.dtsi"
> +#include <dt-bindings/i2c/i2c.h>
> +#include <dt-bindings/gpio/aspeed-gpio.h>
> +
> +/ {
> +       model = "TRANSFORMERS BMC";
> +       compatible = "inventec,transformer-bmc", "aspeed,ast2600";
> +
> +       aliases {
> +               serial4 = &uart5;
> +       };
> +
> +       chosen {
> +               stdout-path = &uart5;
> +               bootargs = "console=tty0 console=ttyS4,115200n8 root=/dev/ram rw init=/linuxrc";

Are you sure this is correct? The console options are ok, but the
others are often not required.

> +       };
> +
> +       memory@80000000 {
> +               device_type = "memory";
> +               reg = <0x80000000 0x80000000>;
> +       };
> +
> +       reserved-memory {
> +               #address-cells = <1>;
> +               #size-cells = <1>;
> +               ranges;
> +
> +               gfx_memory: framebuffer {

Does your machine run code on the BMC to output to the display without
the host? That is what this is for.

> +                       size = <0x01000000>;
> +                       alignment = <0x01000000>;
> +                       compatible = "shared-dma-pool";
> +                       reusable;
> +               };
> +
> +               video_engine_memory: video {
> +                       size = <0x04000000>;
> +                       alignment = <0x01000000>;
> +                       compatible = "shared-dma-pool";
> +                       reusable;
> +               };
> +
> +               ssp_memory: ssp_memory {

What is ssp, out of interest?

> +                       size = <0x00200000>;
> +                       alignment = <0x00100000>;
> +                       compatible = "shared-dma-pool";
> +                       no-map;
> +               };
> +       };
> +
> +       iio-hwmon {
> +               compatible = "iio-hwmon";

This doesn't make sense without an io-channels property.

> +       };
> +
> +       leds {
> +               compatible = "gpio-leds";
> +
> +               // UID led
> +               uid {
> +                       label = "UID_LED";
> +                       gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>;
> +               };
> +
> +               // Heart beat led
> +               heartbeat {
> +                       label = "HB_LED";
> +                       gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>;
> +               };
> +       };
> +

> +&i2c0 {
> +       status = "okay";
> +
> +       //Set bmc' slave address;
> +       bmc_slave@10 {
> +               compatible = "ipmb-dev";
> +               reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
> +               i2c-protocol;
> +       };
> +};
> +
> +&i2c2 {
> +       status = "okay";
> +};
> +
> +&i2c3 {
> +       // FRU AT24C512C-SSHM-T
> +       status = "okay";
> +       eeprom@50 {
> +               compatible = "atmel,24c512";
> +               reg = <0x50>;
> +               pagesize = <128>;
> +       };
> +};
> +
> +&i2c5 {
> +       status = "okay";
> +};
> +
> +&i2c6 {
> +       status = "okay";
> +
> +       tmp75@49 {
> +               compatible = "ti,tmp75";
> +               reg = <0x49>;
> +       };
> +
> +       tmp75@4f {
> +               compatible = "ti,tmp75";
> +               reg = <0x4f>;
> +       };
> +
> +       tmp468@48 {
> +               compatible = "ti,tmp468";
> +               reg = <0x48>;
> +       };
> +};
> +
> +&i2c7 {
> +       status = "okay";
> +       adm1278@40 {
> +               compatible = "adi,adm1278";
> +               reg = <0x40>;
> +       };
> +};
> +
> +
> +&i2c8 {
> +       // FRU AT24C512C-SSHM-T
> +       status = "okay";
> +
> +       eeprom@51 {
> +               compatible = "atmel,24c512";
> +               reg = <0x51>;
> +               pagesize = <128>;
> +       };
> +
> +       eeprom@53 {
> +               compatible = "atmel,24c512";
> +               reg = <0x53>;
> +               pagesize = <128>;
> +       };
> +};
> +
> +&i2c9 {
> +       // M.2
> +       status = "okay";
> +};
> +
> +&i2c10 {
> +       // I2C EXPANDER
> +       status = "okay";
> +
> +       i2c-switch@71 {
> +               compatible = "nxp,pca9544";
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               reg = <0x71>;
> +       };
> +
> +       i2c-switch@73 {
> +               compatible = "nxp,pca9544";
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               reg = <0x73>;
> +       };
> +};
> +
> +&i2c11 {
> +       // I2C EXPANDER
> +       status = "okay";
> +
> +       i2c-switch@70 {
> +               compatible = "nxp,pca9544";
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               reg = <0x70>;
> +
> +               pcie_eeprom_riser1: i2c@0 {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       reg = <0>;
> +
> +                       eeprom@55 {
> +                               compatible = "atmel,24c512";
> +                               reg = <0x55>;
> +                               pagesize = <128>;
> +                       };
> +               };
> +
> +               pcie_eeprom_riser2: i2c@1 {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       reg = <1>;
> +
> +                       eeprom@55 {
> +                               compatible = "atmel,24c512";
> +                               reg = <0x55>;
> +                               pagesize = <128>;
> +                       };
> +               };
> +
> +               pcie_eeprom_riser3: i2c@2 {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       reg = <2>;
> +
> +                       eeprom@55 {
> +                               compatible = "atmel,24c512";
> +                               reg = <0x55>;
> +                               pagesize = <128>;
> +                       };
> +               };
> +       };
> +};
> +
> +&i2c12 {
> +       status = "okay";
> +
> +       psu0:psu0@58 {
> +               compatible = "pmbus";
> +               reg = <0x58>;
> +       };
> +};
> +
> +&gpio0 {
> +       status = "okay";
> +       gpio-line-names =
> +       /*A0-A7*/   "","","","","","","","",
> +       /*B0-B7*/   "I2C_HSC_ALERT","BMC_READY","","","","","PSU1_ALERT","",
> +       /*C0-C7*/   "","","","","","","","",
> +       /*D0-D7*/   "","","","","","","","",
> +       /*E0-E7*/   "","","","","","","","",
> +       /*F0-F7*/   "","","","","RST_BMC_SGPIO","","","",
> +       /*G0-G7*/   "","","JTAG_MUX_SEL","","","","","",
> +       /*H0-H7*/   "","","","","RESET_OUT","POWER_OUT","","",
> +       /*I0-I7*/   "","","","","","","NMI_OUT","",
> +       /*J0-J7*/   "","","","","","","","",
> +       /*K0-K7*/   "","","","","","","","",
> +       /*L0-L7*/   "","","","","","","","",
> +       /*M0-M7*/   "","","","","","","","",
> +       /*N0-N7*/   "","","","","","","","",
> +       /*O0-O7*/   "","","","","","","","",
> +       /*P0-P7*/   "","","","TCK_MUX_SEL","BMC_ASD_JTAG_EN","","PREQ_N","",
> +       /*Q0-Q7*/   "","","","","","","","",
> +       /*R0-R7*/   "","","","","","","","",
> +       /*S0-S7*/   "","","","","","","PCH_THERMTRIP","",
> +       /*T0-T7*/   "","","","","","","","",
> +       /*U0-U7*/   "","NMI_BUTTON","","","","","","",
> +       /*V0-V7*/   "","","","","PS_PWROK","","","PRDY_N",
> +       /*W0-W7*/   "","","","","","","","",
> +       /*X0-X7*/   "","","","CPLD_CATERR","","","","",
> +       /*Y0-Y7*/   "","","","","","","","",
> +       /*Z0-Z7*/   "","","","","","","","",
> +       /*AA0-AA7*/ "","","","","","","","",
> +       /*AB0-AB7*/ "","","","","","","","",
> +       /*AC0-AC7*/ "","","","","","","","";

Is this machine going to run openbmc?

If yes, please review this document and ensure your naming follows the
recommendations:

https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md


> +};
> +
> +&lpc_snoop {
> +       status = "okay";
> +       snoop-ports = <0x80>;
> +};
> +
> +&emmc_controller {
> +       status = "okay";
> +       timing-phase = <0x700FF>;

This is not the correct style for the upstream driver, please see the bindings:

Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml
Documentation/devicetree/bindings/mmc/mmc-controller.yaml

I find them hard to understand, so you may want to compare to other
machines in the tree:

arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts

&emmc {
        status = "okay";
        clk-phase-mmc-hs200 = <180>, <180>;
};


> +};
> +
> +&emmc {
> +       status = "okay";
> +
> +       non-removable;
> +       max-frequency = <52000000>;
> +       sdhci-drive-type = /bits/ 8 <3>;
> +       bus-width = <8>;
> +};
> +
> +&vhub {
> +       status = "okay";
> +       aspeed,vhub-downstream-ports = <7>;
> +       aspeed,vhub-generic-endpoints = <21>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_usb2ad_default>;
> +};
> +
> +&rtc {
> +       status = "okay";
> +};
> --
> 2.33.0
>

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH] ARM: dts: aspeed: Adding Inventec Transformers BMC
       [not found] <368f464087a749deaf32653eb96756d1@inventec.com>
@ 2021-08-27  1:20 ` Lin.TommySC 林世欽 TAO
  2021-10-06  6:44   ` Joel Stanley
  0 siblings, 1 reply; 8+ messages in thread
From: Lin.TommySC 林世欽 TAO @ 2021-08-27  1:20 UTC (permalink / raw)
  To: openbmc; +Cc: Ye.Vic 葉宇清 TAO, Mohammed.Habeeb ISV

Initial introduction of Inventec Transformers family equipped with Aspeed 2600 BMC SoC.

Signed-off-by: Lin.TommySC <lin.tommysc@inventec.com>
---
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 arch/arm/boot/dts/Makefile                    |   1 +
 .../dts/aspeed-bmc-inventec-transformers.dts  | 486 ++++++++++++++++++
 3 files changed, 489 insertions(+)
 create mode 100644 arch/arm/boot/dts/aspeed-bmc-inventec-transformers.dts

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 355b81148b85..28c068ed0a75 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -507,6 +507,8 @@ patternProperties:
     description: Inter Control Group
   "^invensense,.*":
     description: InvenSense Inc.
+  "^inventec,.*":
+    description: Inventec Corporation
   "^inversepath,.*":
     description: Inverse Path
   "^iom,.*":
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 48d48c85de9e..930b8ba6c3c5 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1407,6 +1407,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
        aspeed-bmc-intel-s2600wf.dtb \
        aspeed-bmc-inspur-fp5280g2.dtb \
        aspeed-bmc-inspur-nf5280m6.dtb \
+       aspeed-bmc-inventec-transformers.dtb \
        aspeed-bmc-lenovo-hr630.dtb \
        aspeed-bmc-lenovo-hr855xg2.dtb \
        aspeed-bmc-microsoft-olympus.dtb \
diff --git a/arch/arm/boot/dts/aspeed-bmc-inventec-transformers.dts b/arch/arm/boot/dts/aspeed-bmc-inventec-transformers.dts
new file mode 100644
index 000000000000..4ff28d1439cd
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-inventec-transformers.dts
@@ -0,0 +1,486 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// Copyright 2021 Inventec Corp.
+
+/dts-v1/;
+
+#include "aspeed-g6.dtsi"
+#include "aspeed-g6-pinctrl.dtsi"
+#include <dt-bindings/i2c/i2c.h>
+#include <dt-bindings/gpio/aspeed-gpio.h>
+
+/ {
+       model = "TRANSFORMERS BMC";
+       compatible = "inventec,transformer-bmc", "aspeed,ast2600";
+
+       aliases {
+               serial4 = &uart5;
+       };
+
+       chosen {
+               stdout-path = &uart5;
+               bootargs = "console=tty0 console=ttyS4,115200n8 root=/dev/ram rw init=/linuxrc";
+       };
+
+       memory@80000000 {
+               device_type = "memory";
+               reg = <0x80000000 0x80000000>;
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               gfx_memory: framebuffer {
+                       size = <0x01000000>;
+                       alignment = <0x01000000>;
+                       compatible = "shared-dma-pool";
+                       reusable;
+               };
+
+               video_engine_memory: video {
+                       size = <0x04000000>;
+                       alignment = <0x01000000>;
+                       compatible = "shared-dma-pool";
+                       reusable;
+               };
+
+               ssp_memory: ssp_memory {
+                       size = <0x00200000>;
+                       alignment = <0x00100000>;
+                       compatible = "shared-dma-pool";
+                       no-map;
+               };
+       };
+
+       iio-hwmon {
+               compatible = "iio-hwmon";
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               // UID led
+               uid {
+                       label = "UID_LED";
+                       gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>;
+               };
+
+               // Heart beat led
+               heartbeat {
+                       label = "HB_LED";
+                       gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>;
+               };
+       };
+
+       pwm_tacho {
+                       status = "okay";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_tach0_default
+                                                       &pinctrl_pwm1_default &pinctrl_tach1_default
+                                                       &pinctrl_pwm2_default &pinctrl_tach2_default
+                                                       &pinctrl_pwm3_default &pinctrl_tach3_default
+                                                       &pinctrl_pwm4_default &pinctrl_tach4_default
+                                                       &pinctrl_pwm5_default &pinctrl_tach5_default
+                                                       &pinctrl_pwm6_default &pinctrl_tach6_default
+                                                       &pinctrl_pwm7_default &pinctrl_tach7_default
+                                                                                               &pinctrl_tach8_default
+                                                                                               &pinctrl_tach9_default
+                                                                                               &pinctrl_tach10_default
+                                                                                               &pinctrl_tach11_default
+                                                                                               &pinctrl_tach12_default
+                                                                                               &pinctrl_tach13_default
+                                                                                               &pinctrl_tach14_default
+                                                                                               &pinctrl_tach15_default>;
+               fan@0 {
+                       reg = <0x00>;
+                       aspeed,target_pwm = <25000>;
+                       cooling-levels = <125 151 177 203 229 255>;
+                       aspeed,fan-tach-ch = <0x00>;
+                       aspeed,min_rpm = <750000>;
+               };
+
+               fan@1 {
+                       reg = <0x01>;
+                       aspeed,target_pwm = <25000>;
+                       cooling-levels = <125 151 177 203 229 255>;
+                       aspeed,fan-tach-ch = <0x01>;
+                       aspeed,min_rpm = <750000>;
+               };
+
+               fan@2 {
+                       reg = <0x02>;
+                       aspeed,target_pwm = <25000>;
+                       cooling-levels = <125 151 177 203 229 255>;
+                       aspeed,fan-tach-ch = <0x02>;
+                       aspeed,min_rpm = <750000>;
+               };
+
+               fan@3 {
+                       reg = <0x03>;
+                       aspeed,target_pwm = <25000>;
+                       cooling-levels = <125 151 177 203 229 255>;
+                       aspeed,fan-tach-ch = <0x03>;
+                       aspeed,min_rpm = <750000>;
+               };
+
+               fan@4 {
+                       reg = <0x04>;
+                       aspeed,target_pwm = <25000>;
+                       cooling-levels = <125 151 177 203 229 255>;
+                       aspeed,fan-tach-ch = <0x04>;
+                       aspeed,min_rpm = <750000>;
+               };
+
+               fan@5 {
+                       reg = <0x05>;
+                       aspeed,target_pwm = <25000>;
+                       cooling-levels = <125 151 177 203 229 255>;
+                       aspeed,fan-tach-ch = <0x05>;
+                       aspeed,min_rpm = <750000>;
+               };
+
+               fan@6 {
+                       reg = <0x06>;
+                       aspeed,target_pwm = <25000>;
+                       cooling-levels = <125 151 177 203 229 255>;
+                       aspeed,fan-tach-ch = <0x06>;
+                       aspeed,min_rpm = <750000>;
+               };
+
+               fan@7 {
+                       reg = <0x07>;
+                       aspeed,target_pwm = <25000>;
+                       cooling-levels = <125 151 177 203 229 255>;
+                       aspeed,fan-tach-ch = <0x07>;
+                       aspeed,min_rpm = <750000>;
+               };
+
+               fan@8 {
+                       reg = <0x08>;
+                       aspeed,fan-tach-ch = <0x08>;
+               };
+
+               fan@9 {
+                       reg = <0x09>;
+                       aspeed,fan-tach-ch = <0x09>;
+               };
+
+               fan@10 {
+                       reg = <0x0a>;
+                       aspeed,fan-tach-ch = <0x0a>;
+               };
+
+               fan@11 {
+                       reg = <0x0b>;
+                       aspeed,fan-tach-ch = <0x0b>;
+               };
+
+               fan@12 {
+                       reg = <0x0c>;
+                       aspeed,fan-tach-ch = <0x0c>;
+               };
+
+               fan@13 {
+                       reg = <0x0d>;
+                       aspeed,fan-tach-ch = <0x0d>;
+               };
+
+               fan@14 {
+                       reg = <0x0e>;
+                       aspeed,fan-tach-ch = <0x0e>;
+               };
+
+               fan@15 {
+                       reg = <0x0f>;
+                       aspeed,fan-tach-ch = <0x0f>;
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       ethphy0: ethernet-phy@0 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <1>;
+       };
+};
+
+&mac3 {
+       status = "okay";
+       phy-mode = "rgmii";
+       phy-handle = <&ethphy0>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_rgmii4_default>;
+};
+
+&fmc {
+       status = "okay";
+
+       flash@0 {
+               status = "okay";
+               m25p,fast-read;
+               label = "bmc";
+               spi-max-frequency = <33000000>;
+               spi-tx-bus-width = <2>;
+               spi-rx-bus-width = <2>;
+#include "openbmc-flash-layout.dtsi"
+       };
+
+       flash@1 {
+               status = "okay";
+               m25p,fast-read;
+               label = "bmc2";
+               spi-max-frequency = <33000000>;
+               spi-tx-bus-width = <2>;
+               spi-rx-bus-width = <2>;
+       };
+};
+
+&spi1 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_spi1_default>;
+
+       flash@0 {
+               status = "okay";
+               m25p,fast-read;
+               label = "bios";
+               spi-max-frequency = <33000000>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <1>;
+       };
+};
+
+&wdt1 {
+       status = "okay";
+};
+
+&uart1 {
+       status = "okay";
+};
+
+&uart5 {
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
+
+       //Set bmc' slave address;
+       bmc_slave@10 {
+               compatible = "ipmb-dev";
+               reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
+               i2c-protocol;
+       };
+};
+
+&i2c2 {
+       status = "okay";
+};
+
+&i2c3 {
+       // FRU AT24C512C-SSHM-T
+       status = "okay";
+       eeprom@50 {
+               compatible = "atmel,24c512";
+               reg = <0x50>;
+               pagesize = <128>;
+       };
+};
+
+&i2c5 {
+       status = "okay";
+};
+
+&i2c6 {
+       status = "okay";
+
+       tmp75@49 {
+               compatible = "ti,tmp75";
+               reg = <0x49>;
+       };
+
+       tmp75@4f {
+               compatible = "ti,tmp75";
+               reg = <0x4f>;
+       };
+
+       tmp468@48 {
+               compatible = "ti,tmp468";
+               reg = <0x48>;
+       };
+};
+
+&i2c7 {
+       status = "okay";
+       adm1278@40 {
+               compatible = "adi,adm1278";
+               reg = <0x40>;
+       };
+};
+
+
+&i2c8 {
+       // FRU AT24C512C-SSHM-T
+       status = "okay";
+
+       eeprom@51 {
+               compatible = "atmel,24c512";
+               reg = <0x51>;
+               pagesize = <128>;
+       };
+
+       eeprom@53 {
+               compatible = "atmel,24c512";
+               reg = <0x53>;
+               pagesize = <128>;
+       };
+};
+
+&i2c9 {
+       // M.2
+       status = "okay";
+};
+
+&i2c10 {
+       // I2C EXPANDER
+       status = "okay";
+
+       i2c-switch@71 {
+               compatible = "nxp,pca9544";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x71>;
+       };
+
+       i2c-switch@73 {
+               compatible = "nxp,pca9544";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x73>;
+       };
+};
+
+&i2c11 {
+       // I2C EXPANDER
+       status = "okay";
+
+       i2c-switch@70 {
+               compatible = "nxp,pca9544";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x70>;
+
+               pcie_eeprom_riser1: i2c@0 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0>;
+
+                       eeprom@55 {
+                               compatible = "atmel,24c512";
+                               reg = <0x55>;
+                               pagesize = <128>;
+                       };
+               };
+
+               pcie_eeprom_riser2: i2c@1 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <1>;
+
+                       eeprom@55 {
+                               compatible = "atmel,24c512";
+                               reg = <0x55>;
+                               pagesize = <128>;
+                       };
+               };
+
+               pcie_eeprom_riser3: i2c@2 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <2>;
+
+                       eeprom@55 {
+                               compatible = "atmel,24c512";
+                               reg = <0x55>;
+                               pagesize = <128>;
+                       };
+               };
+       };
+};
+
+&i2c12 {
+       status = "okay";
+
+       psu0:psu0@58 {
+               compatible = "pmbus";
+               reg = <0x58>;
+       };
+};
+
+&gpio0 {
+       status = "okay";
+       gpio-line-names =
+       /*A0-A7*/   "","","","","","","","",
+       /*B0-B7*/   "I2C_HSC_ALERT","BMC_READY","","","","","PSU1_ALERT","",
+       /*C0-C7*/   "","","","","","","","",
+       /*D0-D7*/   "","","","","","","","",
+       /*E0-E7*/   "","","","","","","","",
+       /*F0-F7*/   "","","","","RST_BMC_SGPIO","","","",
+       /*G0-G7*/   "","","JTAG_MUX_SEL","","","","","",
+       /*H0-H7*/   "","","","","RESET_OUT","POWER_OUT","","",
+       /*I0-I7*/   "","","","","","","NMI_OUT","",
+       /*J0-J7*/   "","","","","","","","",
+       /*K0-K7*/   "","","","","","","","",
+       /*L0-L7*/   "","","","","","","","",
+       /*M0-M7*/   "","","","","","","","",
+       /*N0-N7*/   "","","","","","","","",
+       /*O0-O7*/   "","","","","","","","",
+       /*P0-P7*/   "","","","TCK_MUX_SEL","BMC_ASD_JTAG_EN","","PREQ_N","",
+       /*Q0-Q7*/   "","","","","","","","",
+       /*R0-R7*/   "","","","","","","","",
+       /*S0-S7*/   "","","","","","","PCH_THERMTRIP","",
+       /*T0-T7*/   "","","","","","","","",
+       /*U0-U7*/   "","NMI_BUTTON","","","","","","",
+       /*V0-V7*/   "","","","","PS_PWROK","","","PRDY_N",
+       /*W0-W7*/   "","","","","","","","",
+       /*X0-X7*/   "","","","CPLD_CATERR","","","","",
+       /*Y0-Y7*/   "","","","","","","","",
+       /*Z0-Z7*/   "","","","","","","","",
+       /*AA0-AA7*/ "","","","","","","","",
+       /*AB0-AB7*/ "","","","","","","","",
+       /*AC0-AC7*/ "","","","","","","","";
+};
+
+&lpc_snoop {
+       status = "okay";
+       snoop-ports = <0x80>;
+};
+
+&emmc_controller {
+       status = "okay";
+       timing-phase = <0x700FF>;
+};
+
+&emmc {
+       status = "okay";
+
+       non-removable;
+       max-frequency = <52000000>;
+       sdhci-drive-type = /bits/ 8 <3>;
+       bus-width = <8>;
+};
+
+&vhub {
+       status = "okay";
+       aspeed,vhub-downstream-ports = <7>;
+       aspeed,vhub-generic-endpoints = <21>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usb2ad_default>;
+};
+
+&rtc {
+       status = "okay";
+};
--
2.33.0


^ permalink raw reply related	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2021-10-06  6:45 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-08-25  7:34 [PATCH] ARM: dts: aspeed: Adding Inventec Transformers BMC Lin.TommySC 林世欽 TAO
2021-08-25 12:13 ` Joel Stanley
2021-08-26  2:11   ` Lin.TommySC 林世欽 TAO
2021-08-26  2:18   ` Lin.TommySC 林世欽 TAO
2021-08-26  3:47     ` Joel Stanley
2021-09-30  1:18       ` Lin.TommySC 林世欽 TAO
     [not found] <368f464087a749deaf32653eb96756d1@inventec.com>
2021-08-27  1:20 ` Lin.TommySC 林世欽 TAO
2021-10-06  6:44   ` Joel Stanley

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