* [PATCH] Adding chips TCA9554 and PCA9552, to expose the presence
@ 2020-12-10 6:49 Alpana Kumari
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From: Alpana Kumari @ 2020-12-10 6:49 UTC (permalink / raw)
To: openbmc
[-- Attachment #1: Type: text/plain, Size: 6533 bytes --]
Hi,
I have added chips TCA9554 and PCA9552 which will be used for presence
detect of FRUs, and line-names for miscellaneous GPIOs .
From 38a17b3376c601a3796c1147b374d6aabfc8c12d Mon Sep 17 00:00:00 2001
From: Alpana Kumari <alpankum@in.ibm.com>
Date: Thu, 10 Dec 2020 00:04:55 -0600
Subject: [PATCH] Adding chips TCA9554 and PCA9552, to expose the presence
detect lines for the op-panel, TPM, DASD planers, cable-cards, DCMs, VRMs.
And line-names for miscellaneous GPIOs.
Change-Id: If4d7df8db5f30fb4c1155d39c50c560251fc9660
Signed-off-by: Alpana Kumari <alpankum@in.ibm.com>
---
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 176
++++++++++++++++++++++++++-
1 file changed, 171 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index bcc4568..8f9f4cd 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -196,11 +196,11 @@
&gpio0 {
gpio-line-names =
/*A0-A7*/ "","","","","","","","",
- /*B0-B7*/ "","","","","","","checkstop","",
+ /*B0-B7*/ "USERSPACE_RSTIND_BUFF","","","","","","checkstop","",
/*C0-C7*/ "","","","","","","","",
/*D0-D7*/ "","","","","","","","",
/*E0-E7*/ "","","","","","","","",
- /*F0-F7*/ "","","","","","","","",
+ /*F0-F7*/
"PIN_HOLE_RESET_IN_N","","","PIN_HOLE_RESET_OUT_N","","","","",
/*G0-G7*/ "","","","","","","","",
/*H0-H7*/
"","bmc-ingraham0","rear-enc-id0","rear-enc-fault0","","","","",
/*I0-I7*/ "","","","","","","","",
@@ -212,12 +212,12 @@
/*O0-O7*/ "","","","usb-power","","","","",
/*P0-P7*/ "","","","","pcieslot-power","","","",
/*Q0-Q7*/ "cfam-reset","","","","","","","",
- /*R0-R7*/ "","","","","","","","",
+ /*R0-R7*/ "","","","","","I2C_FLASH_MICRO_N","","",
/*S0-S7*/ "presence-ps0","presence-ps1","presence-ps2","presence-ps3",
"","","","",
/*T0-T7*/ "","","","","","","","",
/*U0-U7*/ "","","","","","","","",
- /*V0-V7*/ "","","","","","","","",
+ /*V0-V7*/ "","BMC_3RESTART_ATTEMPT_P","","","","","","",
/*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "","","","","","","","",
@@ -629,6 +629,65 @@
reg = <0x51>;
};
+ tca_pres1: tca9554@20{
+ compatible = "ti,tca9554";
+ reg = <0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio-line-names = "",
+ "RUSSEL_FW_I2C_ENABLE_N",
+ "RUSSEL_OPPANEL_PRESENCE_N",
+ "BLYTH_OPPANEL_PRESENCE_N",
+ "CPU_TPM_CARD_PRESENT_N",
+ "DASD_BP2_PRESENT_N",
+ "DASD_BP1_PRESENT_N",
+ "DASD_BP0_PRESENT_N";
+
+ gpio@0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
+
@@ -665,6 +724,104 @@
compatible = "ibm,cffps";
reg = <0x69>;
};
+
+ pca_pres1: pca9552@61 {
+ compatible = "nxp,pca9552";
+ reg = <0x61>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio-line-names =
+ "SLOT0_PRSNT_EN_RSVD", "SLOT1_PRSNT_EN_RSVD",
+ "SLOT2_PRSNT_EN_RSVD", "SLOT3_PRSNT_EN_RSVD",
+ "SLOT4_PRSNT_EN_RSVD", "SLOT0_EXPANDER_PRSNT_N",
+ "SLOT1_EXPANDER_PRSNT_N", "SLOT2_EXPANDER_PRSNT_N",
+ "SLOT3_EXPANDER_PRSNT_N", "SLOT4_EXPANDER_PRSNT_N",
+ "", "", "", "", "", "";
+
+ gpio@0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@8 {
+ reg = <8>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@9 {
+ reg = <9>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@10 {
+ reg = <10>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@11 {
+ reg = <11>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@12 {
+ reg = <12>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@13 {
+ reg = <13>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@14 {
+ reg = <14>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@15 {
+ reg = <15>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
};
&i2c4 {
@@ -1004,7 +1161,7 @@
reg = <0x51>;
};
- pca1: pca9552@61 {
+ pca_pres3: pca9552@61 {
compatible = "nxp,pca9552";
reg = <0x61>;
#address-cells = <1>;
@@ -1012,6 +1169,15 @@
gpio-controller;
#gpio-cells = <2>;
+ gpio-line-names =
+ "SLOT6_PRSNT_EN_RSVD", "SLOT7_PRSNT_EN_RSVD",
+ "SLOT8_PRSNT_EN_RSVD", "SLOT9_PRSNT_EN_RSVD",
+ "SLOT10_PRSNT_EN_RSVD", "SLOT11_PRSNT_EN_RSVD",
+ "SLOT6_EXPANDER_PRSNT_N", "SLOT7_EXPANDER_PRSNT_N",
+ "SLOT8_EXPANDER_PRSNT_N", "SLOT9_EXPANDER_PRSNT_N",
+ "SLOT10_EXPANDER_PRSNT_N", "SLOT11_EXPANDER_PRSNT_N",
+ "", "", "", "";
+
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
--
1.8.3.1
Thanks,
Alpana
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2020-12-10 6:49 [PATCH] Adding chips TCA9554 and PCA9552, to expose the presence Alpana Kumari
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