From: Daniel Baluta <daniel.baluta@nxp.com>
To: "broonie@kernel.org" <broonie@kernel.org>
Cc: "lgirdwood@gmail.com" <lgirdwood@gmail.com>,
"timur@kernel.org" <timur@kernel.org>,
"nicoleotsuka@gmail.com" <nicoleotsuka@gmail.com>,
"Xiubo.Lee@gmail.com" <Xiubo.Lee@gmail.com>,
"festevam@gmail.com" <festevam@gmail.com>,
"perex@perex.cz" <perex@perex.cz>,
"tiwai@suse.com" <tiwai@suse.com>,
"alsa-devel@alsa-project.org" <alsa-devel@alsa-project.org>,
"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
dl-linux-imx <linux-imx@nxp.com>,
Daniel Baluta <daniel.baluta@nxp.com>,
"S.j. Wang" <shengjiu.wang@nxp.com>
Subject: [PATCH] ASoC: fsl: sai: Fix clock source for mclk0
Date: Sat, 20 Apr 2019 15:41:04 +0000 [thread overview]
Message-ID: <20190420154038.14576-1-daniel.baluta@nxp.com> (raw)
SAI provide multiple master clock source options selectable
via bit MSEL of TCR2/RCR2.
All possible master clock sources are stored in sai->mclk_clk
array. Current implementation assumes that MCLK0 source is always
busclk, but this is wrong!
For example, on i.MX8QM we have:
00b - Bus Clock selected.
01b - Master Clock (MCLK) 1 option selected.
10b - Master Clock (MCLK) 2 option selected.
11b - Master Clock (MCLK) 3 option selected.
while on i.MX6SX we have:
00b - Master Clock (MCLK) 1 option selected.
01b - Master Clock (MCLK) 1 option selected.
10b - Master Clock (MCLK) 2 option selected.
11b - Master Clock (MCLK) 3 option selected.
So, this patch will read mclk0 source clock from device tree.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
---
sound/soc/fsl/fsl_sai.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index d2a4dc744fd7..faa8de87ff83 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -829,8 +829,7 @@ static int fsl_sai_probe(struct platform_device *pdev)
sai->bus_clk = NULL;
}
- sai->mclk_clk[0] = sai->bus_clk;
- for (i = 1; i < FSL_SAI_MCLK_MAX; i++) {
+ for (i = 0; i < FSL_SAI_MCLK_MAX; i++) {
sprintf(tmp, "mclk%d", i);
sai->mclk_clk[i] = devm_clk_get(&pdev->dev, tmp);
if (IS_ERR(sai->mclk_clk[i])) {
--
2.17.1
next reply other threads:[~2019-04-20 15:46 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-20 15:41 Daniel Baluta [this message]
2019-04-21 5:37 ` [PATCH] ASoC: fsl: sai: Fix clock source for mclk0 Nicolin Chen
2019-04-21 7:26 ` [alsa-devel] " Daniel Baluta
2019-04-21 8:04 ` Nicolin Chen
2019-04-21 8:26 ` Nicolin Chen
2019-04-21 8:40 ` Daniel Baluta
2019-05-28 12:39 ` Daniel Baluta
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