From: Benoit Parrot <bparrot@ti.com>
To: Hans Verkuil <hverkuil@xs4all.nl>,
Sakari Ailus <sakari.ailus@linux.intel.com>,
Rob Herring <robh+dt@kernel.org>
Cc: <linux-media@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, Benoit Parrot <bparrot@ti.com>,
Jyri Sarha <jsarha@ti.com>
Subject: [RESEND Patch v3 08/20] media: ti-vpe: cal: add CSI2 PHY LDO errata support
Date: Tue, 12 Nov 2019 08:53:35 -0600 [thread overview]
Message-ID: <20191112145347.23519-9-bparrot@ti.com> (raw)
In-Reply-To: <20191112145347.23519-1-bparrot@ti.com>
Apply Errata i913 every time the functional clock is enabled.
This should take care of suspend/resume case as well.
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
---
drivers/media/platform/ti-vpe/cal.c | 57 +++++++++++++++++++++++-
drivers/media/platform/ti-vpe/cal_regs.h | 27 +++++++++++
2 files changed, 82 insertions(+), 2 deletions(-)
diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c
index eb3727ba185d..3b04aff6c778 100644
--- a/drivers/media/platform/ti-vpe/cal.c
+++ b/drivers/media/platform/ti-vpe/cal.c
@@ -282,6 +282,12 @@ static const struct cal_data dra72x_cal_data = {
.num_csi2_phy = ARRAY_SIZE(dra72x_cal_csi_phy),
};
+static const struct cal_data dra72x_es1_cal_data = {
+ .csi2_phy_core = dra72x_cal_csi_phy,
+ .num_csi2_phy = ARRAY_SIZE(dra72x_cal_csi_phy),
+ .flags = DRA72_CAL_PRE_ES2_LDO_DISABLE,
+};
+
/*
* there is one cal_dev structure in the driver, it is shared by
* all instances.
@@ -567,9 +573,52 @@ static void cal_get_hwinfo(struct cal_dev *dev)
hwinfo);
}
-static inline int cal_runtime_get(struct cal_dev *dev)
+/*
+ * Errata i913: CSI2 LDO Needs to be disabled when module is powered on
+ *
+ * Enabling CSI2 LDO shorts it to core supply. It is crucial the 2 CSI2
+ * LDOs on the device are disabled if CSI-2 module is powered on
+ * (0x4845 B304 | 0x4845 B384 [28:27] = 0x1) or in ULPS (0x4845 B304
+ * | 0x4845 B384 [28:27] = 0x2) mode. Common concerns include: high
+ * current draw on the module supply in active mode.
+ *
+ * Errata does not apply when CSI-2 module is powered off
+ * (0x4845 B304 | 0x4845 B384 [28:27] = 0x0).
+ *
+ * SW Workaround:
+ * Set the following register bits to disable the LDO,
+ * which is essentially CSI2 REG10 bit 6:
+ *
+ * Core 0: 0x4845 B828 = 0x0000 0040
+ * Core 1: 0x4845 B928 = 0x0000 0040
+ */
+static void i913_errata(struct cal_dev *dev, unsigned int port)
{
- return pm_runtime_get_sync(&dev->pdev->dev);
+ u32 reg10 = reg_read(dev->cc[port], CAL_CSI2_PHY_REG10);
+
+ set_field(®10, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE,
+ CAL_CSI2_PHY_REG10_I933_LDO_DISABLE_MASK);
+
+ cal_dbg(1, dev, "CSI2_%d_REG10 = 0x%08x\n", port, reg10);
+ reg_write(dev->cc[port], CAL_CSI2_PHY_REG10, reg10);
+}
+
+static int cal_runtime_get(struct cal_dev *dev)
+{
+ int r;
+
+ r = pm_runtime_get_sync(&dev->pdev->dev);
+
+ if (dev->flags & DRA72_CAL_PRE_ES2_LDO_DISABLE) {
+ /*
+ * Apply errata on both port eveytime we (re-)enable
+ * the clock
+ */
+ i913_errata(dev, 0);
+ i913_errata(dev, 1);
+ }
+
+ return r;
}
static inline void cal_runtime_put(struct cal_dev *dev)
@@ -2064,6 +2113,10 @@ static const struct of_device_id cal_of_match[] = {
.compatible = "ti,dra72-cal",
.data = (void *)&dra72x_cal_data,
},
+ {
+ .compatible = "ti,dra72-pre-es2-cal",
+ .data = (void *)&dra72x_es1_cal_data,
+ },
{},
};
MODULE_DEVICE_TABLE(of, cal_of_match);
diff --git a/drivers/media/platform/ti-vpe/cal_regs.h b/drivers/media/platform/ti-vpe/cal_regs.h
index 9e6afd0770c8..a40e77f3e977 100644
--- a/drivers/media/platform/ti-vpe/cal_regs.h
+++ b/drivers/media/platform/ti-vpe/cal_regs.h
@@ -10,6 +10,30 @@
#ifndef __TI_CAL_REGS_H
#define __TI_CAL_REGS_H
+/*
+ * struct cal_dev.flags possibilities
+ *
+ * DRA72_CAL_PRE_ES2_LDO_DISABLE:
+ * Errata i913: CSI2 LDO Needs to be disabled when module is powered on
+ *
+ * Enabling CSI2 LDO shorts it to core supply. It is crucial the 2 CSI2
+ * LDOs on the device are disabled if CSI-2 module is powered on
+ * (0x4845 B304 | 0x4845 B384 [28:27] = 0x1) or in ULPS (0x4845 B304
+ * | 0x4845 B384 [28:27] = 0x2) mode. Common concerns include: high
+ * current draw on the module supply in active mode.
+ *
+ * Errata does not apply when CSI-2 module is powered off
+ * (0x4845 B304 | 0x4845 B384 [28:27] = 0x0).
+ *
+ * SW Workaround:
+ * Set the following register bits to disable the LDO,
+ * which is essentially CSI2 REG10 bit 6:
+ *
+ * Core 0: 0x4845 B828 = 0x0000 0040
+ * Core 1: 0x4845 B928 = 0x0000 0040
+ */
+#define DRA72_CAL_PRE_ES2_LDO_DISABLE BIT(0)
+
#define CAL_NUM_CSI2_PORTS 2
/* CAL register offsets */
@@ -71,6 +95,7 @@
#define CAL_CSI2_PHY_REG0 0x000
#define CAL_CSI2_PHY_REG1 0x004
#define CAL_CSI2_PHY_REG2 0x008
+#define CAL_CSI2_PHY_REG10 0x028
/* CAL Control Module Core Camerrx Control register offsets */
#define CM_CTRL_CORE_CAMERRX_CONTROL 0x000
@@ -458,6 +483,8 @@
#define CAL_CSI2_PHY_REG1_CLOCK_MISS_DETECTOR_STATUS_SUCCESS 0
#define CAL_CSI2_PHY_REG1_RESET_DONE_STATUS_MASK GENMASK(29, 28)
+#define CAL_CSI2_PHY_REG10_I933_LDO_DISABLE_MASK BIT(6)
+
#define CAL_CSI2_PHY_REG2_CCP2_SYNC_PATTERN_MASK GENMASK(23, 0)
#define CAL_CSI2_PHY_REG2_TRIGGER_CMD_RXTRIGESC3_MASK GENMASK(25, 24)
#define CAL_CSI2_PHY_REG2_TRIGGER_CMD_RXTRIGESC2_MASK GENMASK(27, 26)
--
2.17.1
next prev parent reply other threads:[~2019-11-12 14:51 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-12 14:53 [RESEND Patch v3 00/20] media: ti-vpe: cal: maintenance Benoit Parrot
2019-11-12 14:53 ` [RESEND Patch v3 01/20] dt-bindings: media: cal: update binding to use syscon Benoit Parrot
2019-11-18 17:39 ` Rob Herring
2019-11-12 14:53 ` [RESEND Patch v3 02/20] dt-bindings: media: cal: update binding example Benoit Parrot
2019-11-18 17:40 ` Rob Herring
2019-11-12 14:53 ` [RESEND Patch v3 03/20] media: ti-vpe: cal: switch BIT_MASK to BIT Benoit Parrot
2019-11-12 14:53 ` [RESEND Patch v3 04/20] media: ti-vpe: cal: Add per platform data support Benoit Parrot
2019-11-12 14:53 ` [RESEND Patch v3 05/20] media: ti-vpe: cal: Enable DMABUF export Benoit Parrot
2019-11-12 14:53 ` [RESEND Patch v3 06/20] media: ti-vpe: cal: Restrict DMA to avoid memory corruption Benoit Parrot
2019-11-12 14:53 ` [RESEND Patch v3 07/20] dt-bindings: media: cal: update binding to add PHY LDO errata support Benoit Parrot
2019-11-12 14:53 ` Benoit Parrot [this message]
2019-11-12 14:53 ` [RESEND Patch v3 09/20] media: ti-vpe: cal: Fix ths_term/ths_settle parameters Benoit Parrot
2019-11-12 14:53 ` [RESEND Patch v3 10/20] media: ti-vpe: cal: Fix pixel processing parameters Benoit Parrot
2019-11-12 14:53 ` [RESEND Patch v3 11/20] media: ti-vpe: cal: Align DPHY init sequence with docs Benoit Parrot
2019-11-12 14:53 ` [RESEND Patch v3 12/20] dt-bindings: media: cal: update binding to add DRA76x support Benoit Parrot
2019-11-12 14:53 ` [RESEND Patch v3 13/20] media: ti-vpe: cal: Add " Benoit Parrot
2019-11-12 14:53 ` [RESEND Patch v3 14/20] dt-bindings: media: cal: update binding to add AM654 support Benoit Parrot
2019-11-12 14:53 ` [RESEND Patch v3 15/20] media: ti-vpe: cal: Add " Benoit Parrot
2019-11-12 14:53 ` [RESEND Patch v3 16/20] media: ti-vpe: cal: Add subdev s_power hooks Benoit Parrot
2019-11-12 14:53 ` [RESEND Patch v3 17/20] media: ti-vpe: cal: Properly calculate max resolution boundary Benoit Parrot
2019-11-12 14:53 ` [RESEND Patch v3 18/20] media: ti-vpe: cal: Fix a WARN issued when start streaming fails Benoit Parrot
2019-11-12 14:53 ` [RESEND Patch v3 19/20] media: ti-vpe: cal: fix enum_mbus_code/frame_size subdev arguments Benoit Parrot
2019-11-12 14:53 ` [RESEND Patch v3 20/20] dt-bindings: media: cal: convert binding to yaml Benoit Parrot
2019-11-18 17:47 ` Rob Herring
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