From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
To: andrew.murray@arm.com, maz@kernel.org,
linux-kernel@vger.kernel.org, Eric Anholt <eric@anholt.net>,
Stefan Wahren <wahrenst@gmx.net>,
Florian Fainelli <f.fainelli@gmail.com>,
bcm-kernel-feedback-list@broadcom.com,
Bjorn Helgaas <bhelgaas@google.com>
Cc: james.quinlan@broadcom.com, mbrugger@suse.com,
phil@raspberrypi.org, jeremy.linton@arm.com,
Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
linux-arm-kernel@lists.infradead.org,
linux-rpi-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org
Subject: [PATCH v2 2/6] dt-bindings: PCI: Add bindings for brcmstb's PCIe device
Date: Tue, 12 Nov 2019 16:59:21 +0100 [thread overview]
Message-ID: <20191112155926.16476-3-nsaenzjulienne@suse.de> (raw)
In-Reply-To: <20191112155926.16476-1-nsaenzjulienne@suse.de>
From: Jim Quinlan <james.quinlan@broadcom.com>
The DT bindings description of the brcmstb PCIe device is described.
This node can only be used for now on the Raspberry Pi 4.
Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
Co-developed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
Changes since v1:
- Fix commit Subject
- Remove linux,pci-domain
This was based on Jim's original submission[1], converted to yaml and
adapted to the RPi4 case.
[1] https://patchwork.kernel.org/patch/10605937/
.../bindings/pci/brcm,stb-pcie.yaml | 110 ++++++++++++++++++
1 file changed, 110 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
new file mode 100644
index 000000000000..4cbb18821300
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
@@ -0,0 +1,110 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Brcmstb PCIe Host Controller Device Tree Bindings
+
+maintainers:
+ - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+
+properties:
+ compatible:
+ const: brcm,bcm2711-pcie # The Raspberry Pi 4
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ minItems: 1
+ maxItems: 2
+ items:
+ - description: PCIe host controller
+ - description: builtin MSI controller
+
+ interrupt-names:
+ minItems: 1
+ maxItems: 2
+ items:
+ - const: pcie
+ - const: msi
+
+ "#address-cells":
+ const: 3
+
+ "#size-cells":
+ const: 2
+
+ "#interrupt-cells":
+ const: 1
+
+ interrupt-map-mask: true
+
+ interrupt-map: true
+
+ ranges: true
+
+ dma-ranges: true
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: sw_pcie
+
+ msi-controller:
+ description: Identifies the node as an MSI controller.
+ type: boolean
+
+ msi-parent:
+ description: MSI controller the device is capable of using.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ brcm,enable-ssc:
+ description: Indicates usage of spread-spectrum clocking.
+ type: boolean
+
+required:
+ - compatible
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+ - "#interrupt-cells"
+ - interrupt-map-mask
+ - interrupt-map
+ - ranges
+ - dma-ranges
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ scb {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ pcie0: pcie@7d500000 {
+ compatible = "brcm,bcm2711-pcie";
+ reg = <0x0 0x7d500000 0x9310>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pcie", "msi";
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+ interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 2 &gicv2 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 3 &gicv2 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 4 &gicv2 GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
+ msi-parent = <&pcie0>;
+ msi-controller;
+ ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;
+ dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;
+ brcm,enable-ssc;
+ };
+ };
--
2.24.0
next prev parent reply other threads:[~2019-11-12 15:59 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-12 15:59 [PATCH v2 0/6] Raspberry Pi 4 PCIe support Nicolas Saenz Julienne
2019-11-12 15:59 ` [PATCH v2 1/6] linux/log2.h: Add roundup/rounddown_pow_two64() family of functions Nicolas Saenz Julienne
2019-11-19 11:13 ` Andrew Murray
2019-11-19 11:30 ` Nicolas Saenz Julienne
2019-11-19 12:43 ` Nicolas Saenz Julienne
2019-11-19 16:28 ` Andrew Murray
2019-11-19 16:55 ` Jason Gunthorpe
2019-11-19 17:00 ` Andrew Murray
2019-11-12 15:59 ` Nicolas Saenz Julienne [this message]
2019-11-18 21:23 ` [PATCH v2 2/6] dt-bindings: PCI: Add bindings for brcmstb's PCIe device Rob Herring
2019-11-19 9:35 ` Nicolas Saenz Julienne
2019-11-19 11:17 ` Andrew Murray
2019-11-19 11:28 ` Nicolas Saenz Julienne
2019-11-12 15:59 ` [PATCH v2 3/6] ARM: dts: bcm2711: Enable PCIe controller Nicolas Saenz Julienne
2019-11-12 15:59 ` [PATCH v2 4/6] PCI: brcmstb: add Broadcom STB PCIe host controller driver Nicolas Saenz Julienne
2019-11-19 16:25 ` Andrew Murray
2019-11-19 18:20 ` Jeremy Linton
2019-11-20 20:24 ` Nicolas Saenz Julienne
2019-11-19 18:34 ` Florian Fainelli
2019-11-21 12:16 ` Andrew Murray
2019-11-20 19:53 ` Nicolas Saenz Julienne
2019-11-21 12:03 ` Andrew Murray
2019-11-21 12:59 ` Nicolas Saenz Julienne
2019-11-21 15:44 ` Andrew Murray
2019-11-21 21:07 ` Jim Quinlan
2019-11-22 14:59 ` Robin Murphy
2019-11-21 13:26 ` Nicolas Saenz Julienne
2019-11-21 15:46 ` Andrew Murray
2019-11-12 15:59 ` [PATCH v2 5/6] PCI: brcmstb: add MSI capability Nicolas Saenz Julienne
2019-11-13 13:49 ` Marc Zyngier
2019-11-21 15:38 ` Andrew Murray
2019-11-21 17:19 ` Nicolas Saenz Julienne
2019-11-12 15:59 ` [PATCH v2 6/6] MAINTAINERS: Add brcmstb PCIe controller Nicolas Saenz Julienne
2019-11-19 11:18 ` [PATCH v2 0/6] Raspberry Pi 4 PCIe support Andrew Murray
2019-11-19 11:49 ` Nicolas Saenz Julienne
2019-11-21 12:18 ` Andrew Murray
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