From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: tglx@linutronix.de
Cc: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Rob Herring <robh@kernel.org>, Rob Herring <robh+dt@kernel.org>,
linux-kernel@vger.kernel.org (open list:CLOCKSOURCE,
CLOCKEVENT DRIVERS),
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS)
Subject: [PATCH 02/10] dt-bindings: timer: renesas,cmt: Document r8a774e1 CMT support
Date: Thu, 24 Sep 2020 11:05:26 +0200 [thread overview]
Message-ID: <20200924090534.2004630-2-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <20200924090534.2004630-1-daniel.lezcano@linaro.org>
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Document SoC specific bindings for RZ/G2H (r8a774e1) SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1594811350-14066-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
---
Documentation/devicetree/bindings/timer/renesas,cmt.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml
index 762b65094292..428db3a21bb9 100644
--- a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml
+++ b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml
@@ -71,6 +71,7 @@ properties:
- renesas,r8a774a1-cmt0 # 32-bit CMT0 on RZ/G2M
- renesas,r8a774b1-cmt0 # 32-bit CMT0 on RZ/G2N
- renesas,r8a774c0-cmt0 # 32-bit CMT0 on RZ/G2E
+ - renesas,r8a774e1-cmt0 # 32-bit CMT0 on RZ/G2H
- renesas,r8a7795-cmt0 # 32-bit CMT0 on R-Car H3
- renesas,r8a7796-cmt0 # 32-bit CMT0 on R-Car M3-W
- renesas,r8a77965-cmt0 # 32-bit CMT0 on R-Car M3-N
@@ -85,6 +86,7 @@ properties:
- renesas,r8a774a1-cmt1 # 48-bit CMT on RZ/G2M
- renesas,r8a774b1-cmt1 # 48-bit CMT on RZ/G2N
- renesas,r8a774c0-cmt1 # 48-bit CMT on RZ/G2E
+ - renesas,r8a774e1-cmt1 # 48-bit CMT on RZ/G2H
- renesas,r8a7795-cmt1 # 48-bit CMT on R-Car H3
- renesas,r8a7796-cmt1 # 48-bit CMT on R-Car M3-W
- renesas,r8a77965-cmt1 # 48-bit CMT on R-Car M3-N
--
2.25.1
next prev parent reply other threads:[~2020-09-24 9:06 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-24 9:04 [GIT PULL] timer drivers for v5.10 Daniel Lezcano
2020-09-24 9:05 ` [PATCH 01/10] dt-bindings: timer: renesas,cmt: Document r8a7742 CMT support Daniel Lezcano
2020-09-24 9:05 ` Daniel Lezcano [this message]
2020-09-24 9:05 ` [PATCH 03/10] clocksource/drivers/sp804: Cleanup clk_get_sys() Daniel Lezcano
2020-09-24 9:05 ` [PATCH 04/10] clocksource/drivers/sp804: Remove unused sp804_timer_disable() and timer-sp804.h Daniel Lezcano
2020-09-24 9:05 ` [PATCH 05/10] clocksource/drivers/sp804: Delete the leading "__" of some functions Daniel Lezcano
2020-09-24 9:05 ` [PATCH 06/10] clocksource/drivers/sp804: Remove a mismatched comment Daniel Lezcano
2020-09-24 9:05 ` [PATCH 07/10] clocksource/drivers/sp804: Prepare for support non-standard register offset Daniel Lezcano
2020-09-24 9:05 ` [PATCH 08/10] clocksource/drivers/sp804: Support " Daniel Lezcano
2020-09-24 9:05 ` [PATCH 09/10] clocksource/drivers/sp804: Add support for Hisilicon sp804 timer Daniel Lezcano
2020-09-24 9:05 ` [PATCH 10/10] clocksource/drivers/sp804: Enable Hisilicon sp804 timer 64bit mode Daniel Lezcano
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