From: Nicolin Chen <nicoleotsuka@gmail.com>
To: jonathanh@nvidia.com, thierry.reding@gmail.com, sboyd@kernel.org,
mturquette@baylibre.com, pgaikwad@nvidia.com,
pdeschrijver@nvidia.com
Cc: stable@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org
Subject: [PATCH] clk: tegra: Do not return 0 on failure
Date: Wed, 28 Oct 2020 17:48:20 -0700 [thread overview]
Message-ID: <20201029004820.9062-1-nicoleotsuka@gmail.com> (raw)
Return values from read_dt_param() will be either TRUE (1) or
FALSE (0), while dfll_fetch_pwm_params() returns 0 on success
or an ERR code on failure.
So this patch fixes the bug of returning 0 on failure.
Fixes: 36541f0499fe ("clk: tegra: dfll: support PWM regulator control")
Cc: <stable@vger.kernel.org>
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
---
drivers/clk/tegra/clk-dfll.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/tegra/clk-dfll.c b/drivers/clk/tegra/clk-dfll.c
index cfbaa90c7adb..a5f526bb0483 100644
--- a/drivers/clk/tegra/clk-dfll.c
+++ b/drivers/clk/tegra/clk-dfll.c
@@ -1856,13 +1856,13 @@ static int dfll_fetch_pwm_params(struct tegra_dfll *td)
&td->reg_init_uV);
if (!ret) {
dev_err(td->dev, "couldn't get initialized voltage\n");
- return ret;
+ return -EINVAL;
}
ret = read_dt_param(td, "nvidia,pwm-period-nanoseconds", &pwm_period);
if (!ret) {
dev_err(td->dev, "couldn't get PWM period\n");
- return ret;
+ return -EINVAL;
}
td->pwm_rate = (NSEC_PER_SEC / pwm_period) * (MAX_DFLL_VOLTAGES - 1);
--
2.17.1
next reply other threads:[~2020-10-29 0:59 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-29 0:48 Nicolin Chen [this message]
2020-11-20 16:16 ` [PATCH] clk: tegra: Do not return 0 on failure Thierry Reding
2020-11-20 16:18 ` Thierry Reding
2020-11-25 2:06 ` Stephen Boyd
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