From: Marek Szyprowski <m.szyprowski@samsung.com>
To: linux-samsung-soc@vger.kernel.org, linux-pci@vger.kernel.org
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Jaehoon Chung <jh80.chung@samsung.com>,
Marek Szyprowski <m.szyprowski@samsung.com>,
Jingoo Han <jingoohan1@gmail.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Rob Herring <robh@kernel.org>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Subject: [PATCH v4 3/5] dt-bindings: phy: exynos: add the samsung,exynos-pcie-phy binding
Date: Fri, 13 Nov 2020 18:01:37 +0100 [thread overview]
Message-ID: <20201113170139.29956-4-m.szyprowski@samsung.com> (raw)
In-Reply-To: <20201113170139.29956-1-m.szyprowski@samsung.com>
Add dt-bindings for the Samsung Exynos PCIe PHY controller (Exynos5433
variant). Based on the text dt-binding posted by Jaehoon Chung.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/phy/samsung,exynos-pcie-phy.yaml | 51 +++++++++++++++++++
1 file changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
new file mode 100644
index 000000000000..ac0af40be52d
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/samsung,exynos-pcie-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung SoC series PCIe PHY Device Tree Bindings
+
+maintainers:
+ - Marek Szyprowski <m.szyprowski@samsung.com>
+ - Jaehoon Chung <jh80.chung@samsung.com>
+
+properties:
+ "#phy-cells":
+ const: 0
+
+ compatible:
+ const: samsung,exynos5433-pcie-phy
+
+ reg:
+ maxItems: 1
+
+ samsung,pmu-syscon:
+ $ref: '/schemas/types.yaml#/definitions/phandle'
+ description: phandle for PMU system controller interface, used to
+ control PMU registers bits for PCIe PHY
+
+ samsung,fsys-sysreg:
+ $ref: '/schemas/types.yaml#/definitions/phandle'
+ description: phandle for FSYS sysreg interface, used to control
+ sysreg registers bits for PCIe PHY
+
+required:
+ - "#phy-cells"
+ - compatible
+ - reg
+ - samsung,pmu-syscon
+ - samsung,fsys-sysreg
+
+additionalProperties: false
+
+examples:
+ - |
+ pcie_phy: pcie-phy@15680000 {
+ compatible = "samsung,exynos5433-pcie-phy";
+ reg = <0x15680000 0x1000>;
+ samsung,pmu-syscon = <&pmu_system_controller>;
+ samsung,fsys-sysreg = <&syscon_fsys>;
+ #phy-cells = <0>;
+ };
+...
--
2.17.1
next prev parent reply other threads:[~2020-11-13 17:02 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20201113170156eucas1p176314e4076c593d1f2e68159be880f86@eucas1p1.samsung.com>
2020-11-13 17:01 ` [PATCH v4 0/5] Add DW PCIe support for Exynos5433 SoCs Marek Szyprowski
[not found] ` <CGME20201113170156eucas1p27318509e20996cd7b774a991bbd729c6@eucas1p2.samsung.com>
2020-11-13 17:01 ` [PATCH v4 1/5] dt-bindings: PCI: exynos: drop samsung,exynos5440-pcie binding Marek Szyprowski
[not found] ` <CGME20201113170157eucas1p1586185df931144982527eb3aa988a127@eucas1p1.samsung.com>
2020-11-13 17:01 ` [PATCH v4 2/5] dt-bindings: PCI: exynos: add the samsung,exynos-pcie binding Marek Szyprowski
[not found] ` <CGME20201113170158eucas1p1a1fa871bfc1513e3bb62b56c28454e68@eucas1p1.samsung.com>
2020-11-13 17:01 ` Marek Szyprowski [this message]
[not found] ` <CGME20201113170158eucas1p14b9e58e35f929e14aeb4f533071c8a47@eucas1p1.samsung.com>
2020-11-13 17:01 ` [PATCH v4 4/5] phy: samsung: phy-exynos-pcie: rework driver to support Exynos5433 PCIe PHY Marek Szyprowski
2020-11-20 9:41 ` Vinod Koul
2020-11-20 9:58 ` Marek Szyprowski
2020-11-20 10:11 ` Vinod Koul
[not found] ` <CGME20201120102654eucas1p2f7395e14632a019a58f0ed5002eff556@eucas1p2.samsung.com>
2020-11-20 10:26 ` [PATCH v4 4/5 REBASED RESEND] " Marek Szyprowski
2020-11-20 10:36 ` Vinod Koul
[not found] ` <CGME20201113170159eucas1p2a479cba641c51368e0f15b6f8eaeb5f4@eucas1p2.samsung.com>
2020-11-13 17:01 ` [PATCH v4 5/5] PCI: dwc: exynos: Rework the driver to support Exynos5433 variant Marek Szyprowski
2020-11-23 9:53 ` [PATCH v4 0/5] Add DW PCIe support for Exynos5433 SoCs Lorenzo Pieralisi
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