From: Fenglin Wu <quic_fenglinw@quicinc.com>
To: <linux-arm-msm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
"Stephen Boyd" <sboyd@kernel.org>
Cc: <collinsd@codeaurora.org>, <subbaram@codeaurora.org>,
<quic_fenglinw@quicinc.com>
Subject: [spmi-pmic-arb fixes and optimization patches V1 5/9] spmi: pmic-arb: correct duplicate APID to PPID mapping logic
Date: Wed, 28 Jul 2021 12:30:05 +0800 [thread overview]
Message-ID: <1627446609-9064-6-git-send-email-quic_fenglinw@quicinc.com> (raw)
In-Reply-To: <1627446609-9064-1-git-send-email-quic_fenglinw@quicinc.com>
From: David Collins <collinsd@codeaurora.org>
Correct the way that duplicate PPID mappings are handled for PMIC
arbiter v5. The final APID mapped to a given PPID should be the
one which has write owner = APPS EE, if it exists, or if not
that, then the first APID mapped to the PPID, if it exists.
Signed-off-by: David Collins <collinsd@codeaurora.org>
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
---
drivers/spmi/spmi-pmic-arb.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index 59c445b..f1b72d8 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -918,7 +918,8 @@ static int pmic_arb_read_apid_map_v5(struct spmi_pmic_arb *pmic_arb)
* version 5, there is more than one APID mapped to each PPID.
* The owner field for each of these mappings specifies the EE which is
* allowed to write to the APID. The owner of the last (highest) APID
- * for a given PPID will receive interrupts from the PPID.
+ * which has the IRQ owner bit set for a given PPID will receive
+ * interrupts from the PPID.
*/
for (i = 0; ; i++, apidd++) {
offset = pmic_arb->ver_ops->apid_map_offset(i);
@@ -941,16 +942,16 @@ static int pmic_arb_read_apid_map_v5(struct spmi_pmic_arb *pmic_arb)
apid = pmic_arb->ppid_to_apid[ppid] & ~PMIC_ARB_APID_VALID;
prev_apidd = &pmic_arb->apid_data[apid];
- if (valid && is_irq_ee &&
- prev_apidd->write_ee == pmic_arb->ee) {
+ if (!valid || apidd->write_ee == pmic_arb->ee) {
+ /* First PPID mapping or one for this EE */
+ pmic_arb->ppid_to_apid[ppid] = i | PMIC_ARB_APID_VALID;
+ } else if (valid && is_irq_ee &&
+ prev_apidd->write_ee == pmic_arb->ee) {
/*
* Duplicate PPID mapping after the one for this EE;
* override the irq owner
*/
prev_apidd->irq_ee = apidd->irq_ee;
- } else if (!valid || is_irq_ee) {
- /* First PPID mapping or duplicate for another EE */
- pmic_arb->ppid_to_apid[ppid] = i | PMIC_ARB_APID_VALID;
}
apidd->ppid = ppid;
--
Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2021-07-28 4:31 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-28 4:30 [spmi-pmic-arb fixes and optimization patches V1 0/9] *** SUBJECT HERE *** Fenglin Wu
2021-07-28 4:30 ` [spmi-pmic-arb fixes and optimization patches V1 1/9] spmi: pmic-arb: add a print in cleanup_irq Fenglin Wu
2021-07-28 4:30 ` [spmi-pmic-arb fixes and optimization patches V1 2/9] spmi: pmic-arb: do not ack and clear peripheral interrupts " Fenglin Wu
2021-07-28 4:30 ` [spmi-pmic-arb fixes and optimization patches V1 3/9] spmi: pmic-arb: check apid against limits before calling irq handler Fenglin Wu
2021-07-28 4:30 ` [spmi-pmic-arb fixes and optimization patches V1 4/9] spmi: pmic-arb: add support to dispatch interrupt based on IRQ status Fenglin Wu
2021-07-28 4:30 ` Fenglin Wu [this message]
2021-07-28 4:30 ` [spmi-pmic-arb fixes and optimization patches V1 6/9] spmi: pmic-arb: block access for invalid PMIC arbiter v5 SPMI writes Fenglin Wu
2021-07-28 4:30 ` [spmi-pmic-arb fixes and optimization patches V1 7/9] spmi: pmic-arb: support updating interrupt type flags Fenglin Wu
2021-07-28 4:30 ` [spmi-pmic-arb fixes and optimization patches V1 8/9] spmi: pmic-arb: make interrupt support optional Fenglin Wu
2021-07-28 4:30 ` [spmi-pmic-arb fixes and optimization patches V1 9/9] spmi: pmic-arb: increase SPMI transaction timeout delay Fenglin Wu
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