From: Kishon Vijay Abraham I <kishon@ti.com>
To: <devicetree@vger.kernel.org>, <linux-doc@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-omap@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Cc: <arnd@arndb.de>, <tony@atomide.com>, <jg1.han@samsung.com>,
<kishon@ti.com>, Dan Murphy <dmurphy@ti.com>
Subject: [TEMP PATCH v2 17/18] PCI: host: pcie-dra7xx: use reset framework APIs to reset PCIe
Date: Thu, 29 May 2014 12:08:19 +0530 [thread overview]
Message-ID: <1401345500-20188-18-git-send-email-kishon@ti.com> (raw)
In-Reply-To: <1401345500-20188-1-git-send-email-kishon@ti.com>
Get reset nodes from dt and use reset framework APIs to reset PCIe.
This is needed since reset is handled by the SoC.
Cc: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
Documentation/devicetree/bindings/pci/ti-pci.txt | 4 ++++
drivers/pci/host/pci-dra7xx.c | 10 ++++++++++
2 files changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt
index d07d2eb..3649c2e 100644
--- a/Documentation/devicetree/bindings/pci/ti-pci.txt
+++ b/Documentation/devicetree/bindings/pci/ti-pci.txt
@@ -22,6 +22,8 @@ PCIe Designware Controller
num-lanes,
interrupt-map-mask,
interrupt-map : as specified in ../designware-pcie.txt
+ - resets: phandle used if reset is handled be soc
+ - reset-names: name given to the phandle
Example:
axi {
@@ -45,6 +47,8 @@ axi {
ti,hwmods = "pcie1";
phys = <&pcie1_phy>;
phy-names = "pcie-phy0";
+ resets = <&prm_resets &device_reset>;
+ reset-names = "reset";
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc 1>,
<0 0 0 2 &pcie_intc 2>,
diff --git a/drivers/pci/host/pci-dra7xx.c b/drivers/pci/host/pci-dra7xx.c
index 8fb3a2e..17f5e6a 100644
--- a/drivers/pci/host/pci-dra7xx.c
+++ b/drivers/pci/host/pci-dra7xx.c
@@ -22,6 +22,7 @@
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/resource.h>
+#include <linux/reset.h>
#include <linux/types.h>
#include "pcie-designware.h"
@@ -332,6 +333,7 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
char name[10];
+ struct reset_control *rstc;
dra7xx = devm_kzalloc(dev, sizeof(*dra7xx), GFP_KERNEL);
if (!dra7xx)
@@ -355,6 +357,14 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev)
if (!base)
return -ENOMEM;
+ rstc = devm_reset_control_get(dev, "reset");
+ if (IS_ERR(rstc))
+ return PTR_ERR(rstc);
+
+ ret = reset_control_deassert(rstc);
+ if (ret)
+ return ret;
+
phy_count = of_property_count_strings(np, "phy-names");
if (phy_count < 0) {
dev_err(dev, "unable to find the strings\n");
--
1.7.9.5
next prev parent reply other threads:[~2014-05-29 6:40 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-29 6:38 [PATCH v2 00/18] PCIe support for DRA7xx Kishon Vijay Abraham I
2014-05-29 6:38 ` [PATCH v2 01/18] phy: phy-omap-pipe3: Add support for PCIe PHY Kishon Vijay Abraham I
2014-05-29 6:38 ` [PATCH v2 02/18] phy: pipe3: insert delay to enumerate in GEN2 mode Kishon Vijay Abraham I
2014-05-29 6:38 ` [PATCH v2 03/18] PCI: designware: Configuration space should be specified in 'reg' Kishon Vijay Abraham I
2014-05-29 7:11 ` Mohit KUMAR DCG
2014-05-29 13:16 ` Kishon Vijay Abraham I
2014-05-29 15:03 ` Kumar Gala
2014-05-29 15:18 ` Liviu Dudau
2014-05-29 16:03 ` Kumar Gala
2014-05-29 16:30 ` Jason Gunthorpe
2014-05-29 16:51 ` Kumar Gala
2014-05-29 16:32 ` Murali Karicheri
2014-05-30 5:30 ` Kishon Vijay Abraham I
2014-05-30 14:15 ` Karicheri, Muralidharan
2014-06-18 9:14 ` Kishon Vijay Abraham I
2014-06-18 9:27 ` Jingoo Han
2014-05-29 6:38 ` [PATCH v2 04/18] PCI: designware: use untranslated address while programming ATU Kishon Vijay Abraham I
2014-06-18 9:08 ` Kishon Vijay Abraham I
2014-06-20 16:18 ` Arnd Bergmann
2014-06-20 17:45 ` Rob Herring
2014-06-20 18:54 ` Arnd Bergmann
2014-05-29 6:38 ` [PATCH v2 05/18] PCI: host: pcie-dra7xx: add support for pcie-dra7xx controller Kishon Vijay Abraham I
2014-05-29 6:38 ` [PATCH v2 06/18] ARM: dts: DRA7: Add divider table to optfclk_pciephy_div clock Kishon Vijay Abraham I
2014-06-19 11:10 ` Tero Kristo
2014-06-19 12:45 ` Kishon Vijay Abraham I
2014-06-19 13:27 ` Tero Kristo
2014-05-29 6:38 ` [PATCH v2 07/18] ARM: dts: DRA7: Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck Kishon Vijay Abraham I
2014-06-19 11:12 ` Tero Kristo
2014-06-19 13:00 ` Kishon Vijay Abraham I
2014-06-19 13:24 ` Tero Kristo
2014-05-29 6:38 ` [PATCH v2 08/18] arm: dra7xx: Add hwmod data for pcie1 phy and pcie2 phy Kishon Vijay Abraham I
2014-05-29 6:38 ` [PATCH v2 09/18] arm: dra7xx: Add hwmod data for pcie1 and pcie2 subsystems Kishon Vijay Abraham I
2014-05-29 6:38 ` [PATCH v2 10/18] ARM: dts: dra7xx-clocks: Add missing 32khz clocks used for PHY Kishon Vijay Abraham I
2014-06-19 11:16 ` Tero Kristo
2014-06-19 13:23 ` Kishon Vijay Abraham I
2014-06-19 13:26 ` Tero Kristo
2014-05-29 6:38 ` [PATCH v2 11/18] ARM: dts: dra7: Add dt data for PCIe PHY control module Kishon Vijay Abraham I
2014-05-29 6:38 ` [PATCH v2 12/18] ARM: dts: dra7xx-clocks: rename pcie clocks to accommodate second PHY instance Kishon Vijay Abraham I
2014-05-29 6:38 ` [PATCH v2 13/18] ARM: dts: dra7xx-clocks: Add missing clocks for second PCIe " Kishon Vijay Abraham I
2014-06-19 11:20 ` Tero Kristo
2014-06-19 13:25 ` Kishon Vijay Abraham I
2014-05-29 6:38 ` [PATCH v2 14/18] ARM: dts: dra7: Add dt data for PCIe PHY Kishon Vijay Abraham I
2014-05-29 6:38 ` [PATCH v2 15/18] ARM: dts: dra7: Add dt data for PCIe controller Kishon Vijay Abraham I
2014-05-29 6:38 ` [PATCH v2 16/18] ARM: OMAP: Enable PCI for DRA7 Kishon Vijay Abraham I
2014-05-29 6:48 ` Jingoo Han
2014-05-29 13:17 ` Kishon Vijay Abraham I
2014-05-29 17:52 ` Rob Herring
2014-05-29 17:54 ` Will Deacon
2014-05-29 6:38 ` Kishon Vijay Abraham I [this message]
2014-05-29 6:38 ` [TEMP PATCH v2 18/18] ARM: dts: dra7: Add *resets* property for PCIe dt node Kishon Vijay Abraham I
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