From: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
To: agross@kernel.org
Cc: bjorn.andersson@linaro.org, mturquette@baylibre.com,
robh+dt@kernel.org, linux-arm-msm@vger.kernel.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org,
konrad.dybcio@somainline.org, marijn.suijten@somainline.org,
martin.botka@somainline.org,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@somainline.org>
Subject: [PATCH v2 9/9] dt-bindings: clock: Add QCOM SDM630 and SDM660 graphics clock bindings
Date: Wed, 13 Jan 2021 19:38:17 +0100 [thread overview]
Message-ID: <20210113183817.447866-10-angelogioacchino.delregno@somainline.org> (raw)
In-Reply-To: <20210113183817.447866-1-angelogioacchino.delregno@somainline.org>
Add device tree bindings for graphics clock controller for
Qualcomm Technology Inc's SDM630 and SDM660 SoCs.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
---
.../bindings/clock/qcom,gpucc-sdm660.yaml | 76 +++++++++++++++++++
1 file changed, 76 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,gpucc-sdm660.yaml
diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc-sdm660.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc-sdm660.yaml
new file mode 100644
index 000000000000..6631f25d7699
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,gpucc-sdm660.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,gpucc-sdm660.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Graphics Clock & Reset Controller Binding for SDM630 and SDM660
+
+maintainers:
+ - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
+
+description: |
+ Qualcomm graphics clock control module which supports the clocks, resets and
+ power domains on SDM630 and SDM660.
+
+ See also dt-bindings/clock/qcom,gpucc-sdm660.h.
+
+properties:
+ compatible:
+ enum:
+ - qcom,gpucc-sdm630
+ - qcom,gpucc-sdm660
+
+ clocks:
+ items:
+ - description: Board XO source
+ - description: GPLL0 main gpu branch
+ - description: GPLL0 divider gpu branch
+
+ clock-names:
+ items:
+ - const: xo
+ - const: gcc_gpu_gpll0_clk
+ - const: gcc_gpu_gpll0_div_clk
+
+ '#clock-cells':
+ const: 1
+
+ '#reset-cells':
+ const: 1
+
+ '#power-domain-cells':
+ const: 1
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - '#clock-cells'
+ - '#reset-cells'
+ - '#power-domain-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-sdm660.h>
+ #include <dt-bindings/clock/qcom,rpmcc.h>
+
+ clock-controller@5065000 {
+ compatible = "qcom,gpucc-sdm660";
+ reg = <0x05065000 0x9038>;
+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
+ <&gcc GCC_GPU_GPLL0_CLK>,
+ <&gcc GCC_GPU_GPLL0_DIV_CLK>;
+ clock-names = "xo", "gcc_gpu_gpll0_clk",
+ "gcc_gpu_gpll0_div_clk";
+ #clock-cells = <1>;
+ #power-domain-cells = <1>;
+ #reset-cells = <1>;
+ };
+...
--
2.29.2
next prev parent reply other threads:[~2021-01-13 18:40 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-13 18:38 [PATCH v2 0/9] SDM630/660 GCC/MMCC/GPUCC clock controllers AngeloGioacchino Del Regno
2021-01-13 18:38 ` [PATCH v2 1/9] clk: qcom: gcc-sdm660: Mark MMSS NoC CFG AHB clock as critical AngeloGioacchino Del Regno
2021-02-11 20:18 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 2/9] clk: qcom: gcc-sdm660: Mark GPU " AngeloGioacchino Del Regno
2021-02-11 20:18 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 3/9] clk: qcom: Add SDM660 Multimedia Clock Controller (MMCC) driver AngeloGioacchino Del Regno
2021-01-26 13:39 ` Stanimir Varbanov
2021-01-26 14:11 ` AngeloGioacchino Del Regno
2021-02-08 13:51 ` Konrad Dybcio
2021-02-11 20:19 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 4/9] dt-bindings: clock: Add support for the SDM630 and SDM660 mmcc AngeloGioacchino Del Regno
2021-01-25 20:49 ` Rob Herring
2021-02-11 20:19 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 5/9] clk: qcom: rcg2: Stop hardcoding gfx3d pingpong parent numbers AngeloGioacchino Del Regno
2021-02-11 20:19 ` Stephen Boyd
2021-02-11 21:46 ` AngeloGioacchino Del Regno
2021-01-13 18:38 ` [PATCH v2 6/9] clk: qcom: mmcc-msm8996: Migrate gfx3d clock to clk_rcg2_gfx3d AngeloGioacchino Del Regno
2021-01-26 14:31 ` Bjorn Andersson
2021-02-11 20:20 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 7/9] clk: qcom: gdsc: Implement NO_RET_PERIPH flag AngeloGioacchino Del Regno
2021-02-11 20:20 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 8/9] clk: qcom: Add SDM660 GPU Clock Controller (GPUCC) driver AngeloGioacchino Del Regno
2021-02-11 20:21 ` Stephen Boyd
2021-01-13 18:38 ` AngeloGioacchino Del Regno [this message]
2021-01-25 21:03 ` [PATCH v2 9/9] dt-bindings: clock: Add QCOM SDM630 and SDM660 graphics clock bindings Rob Herring
2021-02-11 20:21 ` Stephen Boyd
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