From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: Hans de Goede <hdegoede@redhat.com>
Cc: "Rafael J . Wysocki" <rjw@rjwysocki.net>,
Mark Gross <markgross@kernel.org>,
Andy Shevchenko <andy@infradead.org>,
Wolfram Sang <wsa@the-dreams.de>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Daniel Scally <djrscally@gmail.com>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Len Brown <lenb@kernel.org>,
ACPI Devel Maling List <linux-acpi@vger.kernel.org>,
Platform Driver <platform-driver-x86@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-i2c <linux-i2c@vger.kernel.org>,
Sakari Ailus <sakari.ailus@linux.intel.com>,
Kate Hsuan <hpa@redhat.com>,
Linux Media Mailing List <linux-media@vger.kernel.org>,
linux-clk <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v4 05/11] clk: Introduce clk-tps68470 driver
Date: Mon, 25 Oct 2021 14:24:05 +0300 [thread overview]
Message-ID: <CAHp75VdfwA_3QK2Fo1S34rRZWHCMNzzHug4AKsRfOrKu4CU_YA@mail.gmail.com> (raw)
In-Reply-To: <20211025094119.82967-6-hdegoede@redhat.com>
On Mon, Oct 25, 2021 at 12:42 PM Hans de Goede <hdegoede@redhat.com> wrote:
>
> The TPS68470 PMIC provides Clocks, GPIOs and Regulators. At present in
> the kernel the Regulators and Clocks are controlled by an OpRegion
> driver designed to work with power control methods defined in ACPI, but
> some platforms lack those methods, meaning drivers need to be able to
> consume the resources of these chips through the usual frameworks.
>
> This commit adds a driver for the clocks provided by the tps68470,
> and is designed to bind to the platform_device registered by the
> intel_skl_int3472 module.
...
> +/*
> + * The PLL is used to multiply the crystal oscillator
> + * frequency range of 3 MHz to 27 MHz by a programmable
> + * factor of F = (M/N)*(1/P) such that the output
> + * available at the HCLK_A or HCLK_B pins are in the range
> + * of 4 MHz to 64 MHz in increments of 0.1 MHz
Missed (grammatical) period.
> + *
> + * hclk_# = osc_in * (((plldiv*2)+320) / (xtaldiv+30)) * (1 / 2^postdiv)
> + *
> + * PLL_REF_CLK should be as close as possible to 100kHz
> + * PLL_REF_CLK = input clk / XTALDIV[7:0] + 30)
> + *
> + * PLL_VCO_CLK = (PLL_REF_CLK * (plldiv*2 + 320))
> + *
> + * BOOST should be as close as possible to 2Mhz
> + * BOOST = PLL_VCO_CLK / (BOOSTDIV[4:0] + 16) *
> + *
> + * BUCK should be as close as possible to 5.2Mhz
> + * BUCK = PLL_VCO_CLK / (BUCKDIV[3:0] + 5)
> + *
> + * osc_in xtaldiv plldiv postdiv hclk_#
> + * 20Mhz 170 32 1 19.2Mhz
> + * 20Mhz 170 40 1 20Mhz
> + * 20Mhz 170 80 1 24Mhz
> + *
Redundant empty line.
> + */
...
> + /* disable clock first */
Disable
first...
> + /* and then tri-state the clock outputs */
...and
...
> + for (i = 0; i < ARRAY_SIZE(clk_freqs); i++) {
> + diff = clk_freqs[i].freq - rate;
> + if (diff == 0)
> + return i;
> + diff = abs(diff);
This needs a comment why higher (lower) frequency is okay.
> + if (diff < best_diff) {
> + best_diff = diff;
> + best_idx = i;
> + }
> + }
...
> + if (pdata) {
> + ret = devm_clk_hw_register_clkdev(&pdev->dev,
> + &tps68470_clkdata->clkout_hw,
> + pdata->consumer_con_id,
> + pdata->consumer_dev_name);
if (ret)
return ret;
> + }
> +
> + return ret;
return 0;
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2021-10-25 11:25 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-25 9:41 [PATCH v4 00/11] Add support for X86/ACPI camera sensor/PMIC setup with clk and regulator platform data Hans de Goede
2021-10-25 9:41 ` [PATCH v4 01/11] ACPI: delay enumeration of devices with a _DEP pointing to an INT3472 device Hans de Goede
2021-10-27 18:52 ` Rafael J. Wysocki
2021-11-01 11:16 ` Hans de Goede
2021-10-25 9:41 ` [PATCH v4 02/11] i2c: acpi: Use acpi_dev_ready_for_enumeration() helper Hans de Goede
2021-10-27 18:53 ` Rafael J. Wysocki
2021-10-25 9:41 ` [PATCH v4 03/11] platform_data: Add linux/platform_data/tps68470.h file Hans de Goede
2021-10-25 9:41 ` [PATCH v4 04/11] regulator: Introduce tps68470-regulator driver Hans de Goede
2021-10-25 11:11 ` Andy Shevchenko
2021-11-01 10:20 ` Hans de Goede
2021-10-28 16:23 ` Mark Brown
2021-11-09 12:14 ` Sakari Ailus
2021-11-09 12:29 ` Andy Shevchenko
2021-11-11 15:13 ` Hans de Goede
2021-10-25 9:41 ` [PATCH v4 05/11] clk: Introduce clk-tps68470 driver Hans de Goede
2021-10-25 11:24 ` Andy Shevchenko [this message]
2021-11-01 10:27 ` Hans de Goede
2021-11-01 10:42 ` Andy Shevchenko
2021-11-01 11:00 ` Hans de Goede
2021-11-01 11:11 ` Andy Shevchenko
2021-10-25 9:41 ` [PATCH v4 06/11] platform/x86: int3472: Enable I2c daisy chain Hans de Goede
2021-10-25 9:41 ` [PATCH v4 07/11] platform/x86: int3472: Split into 2 drivers Hans de Goede
2021-10-25 9:41 ` [PATCH v4 08/11] platform/x86: int3472: Add get_sensor_adev_and_name() helper Hans de Goede
2021-10-25 11:31 ` Andy Shevchenko
2021-11-01 10:31 ` Hans de Goede
2021-11-01 10:44 ` Andy Shevchenko
2021-11-01 10:46 ` Andy Shevchenko
2021-11-01 10:49 ` Hans de Goede
2021-11-01 10:51 ` Andy Shevchenko
2021-11-01 10:48 ` Hans de Goede
2021-10-25 9:41 ` [PATCH v4 09/11] platform/x86: int3472: Pass tps68470_clk_platform_data to the tps68470-regulator MFD-cell Hans de Goede
2021-10-25 11:33 ` Andy Shevchenko
2021-10-25 9:41 ` [PATCH v4 10/11] platform/x86: int3472: Pass tps68470_regulator_platform_data " Hans de Goede
2021-10-25 11:38 ` Andy Shevchenko
2021-11-01 11:31 ` Hans de Goede
2021-11-01 14:25 ` Andy Shevchenko
2021-10-25 9:41 ` [PATCH v4 11/11] platform/x86: int3472: Deal with probe ordering issues Hans de Goede
2021-10-25 11:40 ` Andy Shevchenko
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