From: liweiwei <liweiwei@iscas.ac.cn>
To: Richard Henderson <richard.henderson@linaro.org>,
LIU Zhiwei <zhiwei_liu@linux.alibaba.com>,
qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Cc: liweiwei@iscas.ac.cn, palmer@dabbelt.com,
alistair.francis@wdc.com, bin.meng@windriver.com,
dbarboza@ventanamicro.com, wangjunqiang@iscas.ac.cn,
lazyparser@gmail.com
Subject: Re: [PATCH 1/5] target/riscv: Fix effective address for pointer mask
Date: Tue, 28 Mar 2023 11:33:22 +0800 [thread overview]
Message-ID: <04639827-2706-69d8-56d9-5e278742168d@iscas.ac.cn> (raw)
In-Reply-To: <389e5dd1-12fc-8b71-8e6a-74db1179fa47@linaro.org>
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On 2023/3/28 11:18, Richard Henderson wrote:
> On 3/27/23 19:48, liweiwei wrote:
>>
>> On 2023/3/28 10:20, LIU Zhiwei wrote:
>>>
>>> On 2023/3/27 18:00, Weiwei Li wrote:
>>>> Since pointer mask works on effective address, and the xl works on the
>>>> generation of effective address, so xl related calculation should
>>>> be done
>>>> before pointer mask.
>>>
>>> Incorrect. It has been done.
>>>
>>> When updating the pm_mask, we have already considered the env->xl.
>>>
>>> You can see it in riscv_cpu_update_mask
>>>
>>> if (env->xl == MXL_RV32) {
>>> env->cur_pmmask = mask & UINT32_MAX;
>>> env->cur_pmbase = base & UINT32_MAX;
>>> } else {
>>> env->cur_pmmask = mask;
>>> env->cur_pmbase = base;
>>> }
>>>
>> Yeah, I missed this part. Then we should ensure cur_pmmask/base is
>> updated when xl changes.
>
> Is that even possible? XL can change on priv level changes (SXL, UXL).
Yeah. Not possible, since only UXL is changable currently, and SXL/UXL
can only be changed in higher priv level.
So the recompute for xl in write_mstatus() seems redundant.
Maybe there is a way to change current xl in future if misa.mxl is
changable.
Regards,
Weiwei Li
>
>
> r~
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next prev parent reply other threads:[~2023-03-28 3:33 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-27 10:00 [PATCH 0/5] target/riscv: Fix pointer mask related support Weiwei Li
2023-03-27 10:00 ` [PATCH 1/5] target/riscv: Fix effective address for pointer mask Weiwei Li
2023-03-27 13:19 ` Daniel Henrique Barboza
2023-03-28 2:20 ` LIU Zhiwei
2023-03-28 2:48 ` liweiwei
2023-03-28 3:18 ` Richard Henderson
2023-03-28 3:24 ` LIU Zhiwei
2023-03-28 3:33 ` liweiwei [this message]
2023-03-28 7:25 ` LIU Zhiwei
2023-03-28 10:26 ` liweiwei
2023-03-27 10:00 ` [PATCH 2/5] target/riscv: Use sign-extended data address when xl = 32 Weiwei Li
2023-03-27 13:20 ` Daniel Henrique Barboza
2023-03-28 2:14 ` LIU Zhiwei
2023-03-28 3:07 ` liweiwei
2023-03-27 10:00 ` [PATCH 3/5] target/riscv: Fix pointer mask transformation for vector address Weiwei Li
2023-03-27 13:20 ` Daniel Henrique Barboza
2023-03-28 2:21 ` LIU Zhiwei
2023-03-27 10:00 ` [PATCH 4/5] target/riscv: take xl into consideration " Weiwei Li
2023-03-27 13:21 ` Daniel Henrique Barboza
2023-03-28 2:21 ` LIU Zhiwei
2023-03-27 10:00 ` [PATCH 5/5] target/riscv: Add pointer mask support for instruction fetch Weiwei Li
2023-03-27 13:28 ` Daniel Henrique Barboza
2023-03-27 15:13 ` Daniel Henrique Barboza
2023-03-27 18:04 ` Richard Henderson
2023-03-28 1:55 ` liweiwei
2023-03-28 2:31 ` LIU Zhiwei
2023-03-28 3:14 ` liweiwei
2023-03-28 3:31 ` Richard Henderson
2023-03-28 4:09 ` liweiwei
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