From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: pbonzini@redhat.com, ehabkost@redhat.com
Subject: [Qemu-devel] [PATCH 14/14] target-i386: Enable XCR0 features for user-mode
Date: Thu, 9 Jul 2015 09:17:29 +0100 [thread overview]
Message-ID: <1436429849-18052-15-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1436429849-18052-1-git-send-email-rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
target-i386/cpu.c | 22 ++++++++++++++++++++--
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index c19ff8a..2402c2a 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2654,7 +2654,17 @@ static void x86_cpu_reset(CPUState *s)
cpu_set_fpuc(env, 0x37f);
env->mxcsr = 0x1f80;
- env->xstate_bv = XSTATE_FP | XSTATE_SSE;
+
+ /* ??? This variable is somewhat silly. Methinks KVM should be
+ using XCR0 to store into the XSTATE_BV field. Either that or
+ there's more missing information, e.g. the AVX bits. */
+ env->xstate_bv = XSTATE_FP;
+ if (env->features[FEAT_1_EDX] & CPUID_SSE) {
+ env->xstate_bv |= XSTATE_SSE;
+ }
+ if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_MPX) {
+ env->xstate_bv |= XSTATE_BNDREGS | XSTATE_BNDCSR;
+ }
env->pat = 0x0007040600070406ULL;
env->msr_ia32_misc_enable = MSR_IA32_MISC_ENABLE_DEFAULT;
@@ -2665,7 +2675,15 @@ static void x86_cpu_reset(CPUState *s)
cpu_breakpoint_remove_all(s, BP_CPU);
cpu_watchpoint_remove_all(s, BP_CPU);
- env->xcr0 = 1;
+ env->xcr0 = XSTATE_FP;
+
+#ifdef CONFIG_USER_ONLY
+ /* Enable all the features for user-mode. */
+ env->xcr0 = env->xstate_bv;
+ if (env->features[FEAT_1_ECX] & CPUID_EXT_XSAVE) {
+ cpu_x86_update_cr4(env, CR4_OSFXSR_MASK | CR4_OSXSAVE_MASK);
+ }
+#endif
/*
* SDM 11.11.5 requires:
--
2.4.3
next prev parent reply other threads:[~2015-07-09 8:18 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-09 8:17 [Qemu-devel] [PATCH 00/14] target-i386: Implement MPX extension Richard Henderson
2015-07-09 8:17 ` [Qemu-devel] [PATCH 01/14] target-i386: Split fxsave/fxrstor implementation Richard Henderson
2015-07-09 8:17 ` [Qemu-devel] [PATCH 02/14] target-i386: Rearrange processing of 0F 01 Richard Henderson
2015-07-09 8:17 ` [Qemu-devel] [PATCH 03/14] target-i386: Add XSAVE extension Richard Henderson
2015-07-09 13:16 ` Paolo Bonzini
2015-07-09 8:17 ` [Qemu-devel] [PATCH 04/14] target-i386: Implement XSAVEOPT Richard Henderson
2015-07-09 13:06 ` Paolo Bonzini
2015-07-10 7:00 ` Richard Henderson
2015-07-09 8:17 ` [Qemu-devel] [PATCH 05/14] target-i386: Enable control registers for MPX Richard Henderson
2015-07-09 13:12 ` Paolo Bonzini
2015-07-09 13:18 ` Paolo Bonzini
2015-07-10 7:44 ` Richard Henderson
2016-02-09 13:28 ` Paolo Bonzini
2016-02-09 15:50 ` Eric Blake
2016-02-09 15:50 ` Paolo Bonzini
2016-02-09 19:08 ` Richard Henderson
2015-07-09 8:17 ` [Qemu-devel] [PATCH 06/14] target-i386: Perform set/reset_inhibit_irq inline Richard Henderson
2015-07-09 8:17 ` [Qemu-devel] [PATCH 07/14] target-i386: Split up gen_lea_modrm Richard Henderson
2015-07-09 8:17 ` [Qemu-devel] [PATCH 08/14] target-i386: Implement BNDMK Richard Henderson
2015-07-09 8:17 ` [Qemu-devel] [PATCH 09/14] target-i386: Implement BNDMOV Richard Henderson
2015-07-09 8:17 ` [Qemu-devel] [PATCH 10/14] target-i386: Implement BNDCL, BNDCU, BNDCN Richard Henderson
2015-07-09 8:17 ` [Qemu-devel] [PATCH 11/14] target-i386: Update BNDSTATUS for exceptions raised by BOUND Richard Henderson
2015-07-09 8:17 ` [Qemu-devel] [PATCH 12/14] target-i386: Implement BNDLDX, BNDSTX Richard Henderson
2015-07-09 8:17 ` [Qemu-devel] [PATCH 13/14] target-i386: Clear bndregs during legacy near jumps Richard Henderson
2015-07-09 8:17 ` Richard Henderson [this message]
2015-07-09 13:15 ` [Qemu-devel] [PATCH 14/14] target-i386: Enable XCR0 features for user-mode Paolo Bonzini
2015-07-10 7:24 ` Richard Henderson
2015-07-10 9:36 ` Paolo Bonzini
2015-11-17 17:43 ` [Qemu-devel] [PATCH 00/14] target-i386: Implement MPX extension Paolo Bonzini
2015-11-18 9:43 ` Richard Henderson
2015-11-18 10:13 ` Paolo Bonzini
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