From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PULL 19/28] target-i386: Use gen_lea_v_seg in stack subroutines
Date: Mon, 8 Feb 2016 18:03:10 +0100 [thread overview]
Message-ID: <1454950999-64128-20-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1454950999-64128-1-git-send-email-pbonzini@redhat.com>
From: Richard Henderson <rth@twiddle.net>
I.e. gen_push_v, gen_pop_T0, gen_stack_A0.
More centralization of handling of segment bases.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1450379966-28198-5-git-send-email-rth@twiddle.net>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target-i386/translate.c | 52 +++++++++++++------------------------------------
1 file changed, 13 insertions(+), 39 deletions(-)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 86a6aa1..098a797 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -459,10 +459,9 @@ static inline void gen_jmp_im(target_ulong pc)
/* Compute SEG:REG into A0. SEG is selected from the override segment
(OVR_SEG) and the default segment (DEF_SEG). OVR_SEG may be -1 to
indicate no override. */
-static void gen_lea_v_seg(DisasContext *s, TCGv a0, int def_seg, int ovr_seg)
+static void gen_lea_v_seg(DisasContext *s, TCGMemOp aflag, TCGv a0,
+ int def_seg, int ovr_seg)
{
- TCGMemOp aflag = s->aflag;
-
switch (aflag) {
#ifdef TARGET_X86_64
case MO_64:
@@ -520,12 +519,12 @@ static void gen_lea_v_seg(DisasContext *s, TCGv a0, int def_seg, int ovr_seg)
static inline void gen_string_movl_A0_ESI(DisasContext *s)
{
- gen_lea_v_seg(s, cpu_regs[R_ESI], R_DS, s->override);
+ gen_lea_v_seg(s, s->aflag, cpu_regs[R_ESI], R_DS, s->override);
}
static inline void gen_string_movl_A0_EDI(DisasContext *s)
{
- gen_lea_v_seg(s, cpu_regs[R_EDI], R_ES, -1);
+ gen_lea_v_seg(s, s->aflag, cpu_regs[R_EDI], R_ES, -1);
}
static inline void gen_op_movl_T0_Dshift(TCGMemOp ot)
@@ -1984,7 +1983,7 @@ static void gen_lea_modrm(CPUX86State *env, DisasContext *s, int modrm)
tcg_abort();
}
- gen_lea_v_seg(s, sum, def_seg, ovr_seg);
+ gen_lea_v_seg(s, s->aflag, sum, def_seg, ovr_seg);
}
static void gen_nop_modrm(CPUX86State *env, DisasContext *s, int modrm)
@@ -2047,7 +2046,7 @@ static void gen_nop_modrm(CPUX86State *env, DisasContext *s, int modrm)
/* used for LEA and MOV AX, mem */
static void gen_add_A0_ds_seg(DisasContext *s)
{
- gen_lea_v_seg(s, cpu_A0, R_DS, s->override);
+ gen_lea_v_seg(s, s->aflag, cpu_A0, R_DS, s->override);
}
/* generate modrm memory load or store of 'reg'. TMP0 is used if reg ==
@@ -2272,21 +2271,12 @@ static void gen_push_v(DisasContext *s, TCGv val)
tcg_gen_subi_tl(cpu_A0, cpu_regs[R_ESP], size);
- if (CODE64(s)) {
- /* No special handling. */
- } else if (s->ss32) {
+ if (!CODE64(s)) {
if (s->addseg) {
new_esp = cpu_tmp4;
tcg_gen_mov_tl(new_esp, cpu_A0);
- gen_op_addl_A0_seg(s, R_SS);
- } else {
- tcg_gen_ext32u_tl(cpu_A0, cpu_A0);
}
- } else {
- new_esp = cpu_tmp4;
- tcg_gen_ext16u_tl(cpu_A0, cpu_A0);
- tcg_gen_mov_tl(new_esp, cpu_A0);
- gen_op_addl_A0_seg(s, R_SS);
+ gen_lea_v_seg(s, a_ot, cpu_A0, R_SS, -1);
}
gen_op_st_v(s, d_ot, val, cpu_A0);
@@ -2297,37 +2287,21 @@ static void gen_push_v(DisasContext *s, TCGv val)
static TCGMemOp gen_pop_T0(DisasContext *s)
{
TCGMemOp d_ot = mo_pushpop(s, s->dflag);
- TCGv addr = cpu_A0;
- if (CODE64(s)) {
- addr = cpu_regs[R_ESP];
- } else if (!s->ss32) {
- tcg_gen_ext16u_tl(cpu_A0, cpu_regs[R_ESP]);
- gen_op_addl_A0_seg(s, R_SS);
- } else if (s->addseg) {
- tcg_gen_mov_tl(cpu_A0, cpu_regs[R_ESP]);
- gen_op_addl_A0_seg(s, R_SS);
- } else {
- tcg_gen_ext32u_tl(cpu_A0, cpu_regs[R_ESP]);
- }
+ gen_lea_v_seg(s, mo_stacksize(s), cpu_regs[R_ESP], R_SS, -1);
+ gen_op_ld_v(s, d_ot, cpu_T[0], cpu_A0);
- gen_op_ld_v(s, d_ot, cpu_T[0], addr);
return d_ot;
}
-static void gen_pop_update(DisasContext *s, TCGMemOp ot)
+static inline void gen_pop_update(DisasContext *s, TCGMemOp ot)
{
gen_stack_update(s, 1 << ot);
}
-static void gen_stack_A0(DisasContext *s)
+static inline void gen_stack_A0(DisasContext *s)
{
- gen_op_movl_A0_reg(R_ESP);
- if (!s->ss32)
- tcg_gen_ext16u_tl(cpu_A0, cpu_A0);
- tcg_gen_mov_tl(cpu_T[1], cpu_A0);
- if (s->addseg)
- gen_op_addl_A0_seg(s, R_SS);
+ gen_lea_v_seg(s, s->ss32 ? MO_32 : MO_16, cpu_regs[R_ESP], R_SS, -1);
}
/* NOTE: wrap around in 16 bit not fully handled */
--
1.8.3.1
next prev parent reply other threads:[~2016-02-08 17:03 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-08 17:02 [Qemu-devel] [PULL 00/28] Misc changes for 2016-02-08 Paolo Bonzini
2016-02-08 17:02 ` [Qemu-devel] [PULL 01/28] memory: add early bail out from cpu_physical_memory_set_dirty_range Paolo Bonzini
2016-02-08 17:02 ` [Qemu-devel] [PULL 02/28] memory: RCU ram_list.dirty_memory[] for safe RAM hotplug Paolo Bonzini
2016-02-08 17:02 ` [Qemu-devel] [PULL 03/28] qemu-char: Keep pty slave file descriptor open until the master is closed Paolo Bonzini
2016-02-08 17:02 ` [Qemu-devel] [PULL 04/28] configure: sanity check the glib library that pkg-config finds Paolo Bonzini
2016-02-08 17:02 ` [Qemu-devel] [PULL 05/28] include/qemu/atomic.h: default to __atomic functions Paolo Bonzini
2016-02-08 17:02 ` [Qemu-devel] [PULL 06/28] scsi: push WWN fields up to SCSIDevice Paolo Bonzini
2016-02-08 17:02 ` [Qemu-devel] [PULL 07/28] scsi-generic: grab device and port SAS addresses from backend Paolo Bonzini
2016-02-08 17:02 ` [Qemu-devel] [PULL 08/28] hw: Add support for LSI SAS1068 (mptsas) device Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 09/28] qemu-nbd: Fix unintended texi verbatim formatting Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 10/28] qemu-nbd: Minor texi updates Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 11/28] qemu-nbd: Fix texi sentence capitalisation Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 12/28] scripts/kvm/kvm_stat: Fix tracefs access checking Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 13/28] nbd: avoid unaligned uint64_t store Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 14/28] kvm-all: trace: strerror fixup Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 15/28] char: fix repeated registration of tcp chardev I/O handlers Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 16/28] target-i386: Create gen_lea_v_seg Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 17/28] target-i386: Introduce mo_stacksize Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 18/28] target-i386: Use gen_lea_v_seg in gen_lea_modrm Paolo Bonzini
2016-02-08 17:03 ` Paolo Bonzini [this message]
2016-02-08 17:03 ` [Qemu-devel] [PULL 20/28] target-i386: Access segs via TCG registers Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 21/28] target-i386: Use gen_lea_v_seg in pusha/popa Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 22/28] target-i386: Rewrite gen_enter inline Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 23/28] target-i386: Rewrite leave Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 24/28] target-i386: Tidy gen_add_A0_im Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 25/28] target-i386: Deconstruct the cpu_T array Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 26/28] ipmi: do not take/drop iothread lock Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 27/28] ipmi_bmc_sim: Fix off by one in check Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 28/28] ipmi_bmc_sim: Add break to correct watchdog NMI check Paolo Bonzini
2016-02-09 9:21 ` [Qemu-devel] [PULL 00/28] Misc changes for 2016-02-08 Peter Maydell
2016-02-09 11:10 ` Paolo Bonzini
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