From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PULL 22/28] target-i386: Rewrite gen_enter inline
Date: Mon, 8 Feb 2016 18:03:13 +0100 [thread overview]
Message-ID: <1454950999-64128-23-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1454950999-64128-1-git-send-email-pbonzini@redhat.com>
From: Richard Henderson <rth@twiddle.net>
Use gen_lea_v_seg for centralized segment base knowledge. Unify
code across 32- and 64-bit. Fix note about "must save state"
before using the out-of-line helpers.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1450379966-28198-8-git-send-email-rth@twiddle.net>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target-i386/helper.h | 4 ---
target-i386/seg_helper.c | 74 --------------------------------------
target-i386/translate.c | 93 ++++++++++++++++++------------------------------
3 files changed, 34 insertions(+), 137 deletions(-)
diff --git a/target-i386/helper.h b/target-i386/helper.h
index ecfcfd1..3a25c3b 100644
--- a/target-i386/helper.h
+++ b/target-i386/helper.h
@@ -44,10 +44,6 @@ DEF_HELPER_FLAGS_3(set_dr, TCG_CALL_NO_WG, void, env, int, tl)
DEF_HELPER_FLAGS_2(get_dr, TCG_CALL_NO_WG, tl, env, int)
DEF_HELPER_2(invlpg, void, env, tl)
-DEF_HELPER_4(enter_level, void, env, int, int, tl)
-#ifdef TARGET_X86_64
-DEF_HELPER_4(enter64_level, void, env, int, int, tl)
-#endif
DEF_HELPER_1(sysenter, void, env)
DEF_HELPER_2(sysexit, void, env, int)
#ifdef TARGET_X86_64
diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
index 4f26941..b5f3d72 100644
--- a/target-i386/seg_helper.c
+++ b/target-i386/seg_helper.c
@@ -1379,80 +1379,6 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
return ret;
}
-void helper_enter_level(CPUX86State *env, int level, int data32,
- target_ulong t1)
-{
- target_ulong ssp;
- uint32_t esp_mask, esp, ebp;
-
- esp_mask = get_sp_mask(env->segs[R_SS].flags);
- ssp = env->segs[R_SS].base;
- ebp = env->regs[R_EBP];
- esp = env->regs[R_ESP];
- if (data32) {
- /* 32 bit */
- esp -= 4;
- while (--level) {
- esp -= 4;
- ebp -= 4;
- cpu_stl_data_ra(env, ssp + (esp & esp_mask),
- cpu_ldl_data_ra(env, ssp + (ebp & esp_mask),
- GETPC()),
- GETPC());
- }
- esp -= 4;
- cpu_stl_data_ra(env, ssp + (esp & esp_mask), t1, GETPC());
- } else {
- /* 16 bit */
- esp -= 2;
- while (--level) {
- esp -= 2;
- ebp -= 2;
- cpu_stw_data_ra(env, ssp + (esp & esp_mask),
- cpu_lduw_data_ra(env, ssp + (ebp & esp_mask),
- GETPC()),
- GETPC());
- }
- esp -= 2;
- cpu_stw_data_ra(env, ssp + (esp & esp_mask), t1, GETPC());
- }
-}
-
-#ifdef TARGET_X86_64
-void helper_enter64_level(CPUX86State *env, int level, int data64,
- target_ulong t1)
-{
- target_ulong esp, ebp;
-
- ebp = env->regs[R_EBP];
- esp = env->regs[R_ESP];
-
- if (data64) {
- /* 64 bit */
- esp -= 8;
- while (--level) {
- esp -= 8;
- ebp -= 8;
- cpu_stq_data_ra(env, esp, cpu_ldq_data_ra(env, ebp, GETPC()),
- GETPC());
- }
- esp -= 8;
- cpu_stq_data_ra(env, esp, t1, GETPC());
- } else {
- /* 16 bit */
- esp -= 2;
- while (--level) {
- esp -= 2;
- ebp -= 2;
- cpu_stw_data_ra(env, esp, cpu_lduw_data_ra(env, ebp, GETPC()),
- GETPC());
- }
- esp -= 2;
- cpu_stw_data_ra(env, esp, t1, GETPC());
- }
-}
-#endif
-
void helper_lldt(CPUX86State *env, int selector)
{
SegmentCache *dt;
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 78168aa..b2f8790 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -373,11 +373,6 @@ static inline void gen_op_mov_v_reg(TCGMemOp ot, TCGv t0, int reg)
}
}
-static inline void gen_op_movl_A0_reg(int reg)
-{
- tcg_gen_mov_tl(cpu_A0, cpu_regs[reg]);
-}
-
static inline void gen_op_addl_A0_im(int32_t val)
{
tcg_gen_addi_tl(cpu_A0, cpu_A0, val);
@@ -420,17 +415,6 @@ static inline void gen_op_add_reg_T0(TCGMemOp size, int reg)
gen_op_mov_reg_v(size, reg, cpu_tmp0);
}
-static inline void gen_op_addl_A0_seg(DisasContext *s, int reg)
-{
- if (CODE64(s)) {
- tcg_gen_ext32u_tl(cpu_A0, cpu_A0);
- tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_seg_base[reg]);
- } else {
- tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_seg_base[reg]);
- tcg_gen_ext32u_tl(cpu_A0, cpu_A0);
- }
-}
-
static inline void gen_op_ld_v(DisasContext *s, int idx, TCGv t0, TCGv a0)
{
tcg_gen_qemu_ld_tl(t0, a0, s->mem_index, idx | MO_LE);
@@ -2337,51 +2321,42 @@ static void gen_popa(DisasContext *s)
static void gen_enter(DisasContext *s, int esp_addend, int level)
{
- TCGMemOp ot = mo_pushpop(s, s->dflag);
- int opsize = 1 << ot;
+ TCGMemOp d_ot = mo_pushpop(s, s->dflag);
+ TCGMemOp a_ot = CODE64(s) ? MO_64 : s->ss32 ? MO_32 : MO_16;
+ int size = 1 << d_ot;
- level &= 0x1f;
-#ifdef TARGET_X86_64
- if (CODE64(s)) {
- gen_op_movl_A0_reg(R_ESP);
- gen_op_addq_A0_im(-opsize);
- tcg_gen_mov_tl(cpu_T[1], cpu_A0);
-
- /* push bp */
- gen_op_mov_v_reg(MO_32, cpu_T[0], R_EBP);
- gen_op_st_v(s, ot, cpu_T[0], cpu_A0);
- if (level) {
- /* XXX: must save state */
- gen_helper_enter64_level(cpu_env, tcg_const_i32(level),
- tcg_const_i32((ot == MO_64)),
- cpu_T[1]);
- }
- gen_op_mov_reg_v(ot, R_EBP, cpu_T[1]);
- tcg_gen_addi_tl(cpu_T[1], cpu_T[1], -esp_addend + (-opsize * level));
- gen_op_mov_reg_v(MO_64, R_ESP, cpu_T[1]);
- } else
-#endif
- {
- gen_op_movl_A0_reg(R_ESP);
- gen_op_addl_A0_im(-opsize);
- if (!s->ss32)
- tcg_gen_ext16u_tl(cpu_A0, cpu_A0);
- tcg_gen_mov_tl(cpu_T[1], cpu_A0);
- if (s->addseg)
- gen_op_addl_A0_seg(s, R_SS);
- /* push bp */
- gen_op_mov_v_reg(MO_32, cpu_T[0], R_EBP);
- gen_op_st_v(s, ot, cpu_T[0], cpu_A0);
- if (level) {
- /* XXX: must save state */
- gen_helper_enter_level(cpu_env, tcg_const_i32(level),
- tcg_const_i32(s->dflag - 1),
- cpu_T[1]);
- }
- gen_op_mov_reg_v(ot, R_EBP, cpu_T[1]);
- tcg_gen_addi_tl(cpu_T[1], cpu_T[1], -esp_addend + (-opsize * level));
- gen_op_mov_reg_v(MO_16 + s->ss32, R_ESP, cpu_T[1]);
+ /* Push BP; compute FrameTemp into T1. */
+ tcg_gen_subi_tl(cpu_T[1], cpu_regs[R_ESP], size);
+ gen_lea_v_seg(s, a_ot, cpu_T[1], R_SS, -1);
+ gen_op_st_v(s, d_ot, cpu_regs[R_EBP], cpu_A0);
+
+ level &= 31;
+ if (level != 0) {
+ int i;
+
+ /* Copy level-1 pointers from the previous frame. */
+ for (i = 1; i < level; ++i) {
+ tcg_gen_subi_tl(cpu_A0, cpu_regs[R_EBP], size * i);
+ gen_lea_v_seg(s, a_ot, cpu_A0, R_SS, -1);
+ gen_op_ld_v(s, d_ot, cpu_tmp0, cpu_A0);
+
+ tcg_gen_subi_tl(cpu_A0, cpu_T[1], size * i);
+ gen_lea_v_seg(s, a_ot, cpu_A0, R_SS, -1);
+ gen_op_st_v(s, d_ot, cpu_tmp0, cpu_A0);
+ }
+
+ /* Push the current FrameTemp as the last level. */
+ tcg_gen_subi_tl(cpu_A0, cpu_T[1], size * level);
+ gen_lea_v_seg(s, a_ot, cpu_A0, R_SS, -1);
+ gen_op_st_v(s, d_ot, cpu_T[1], cpu_A0);
}
+
+ /* Copy the FrameTemp value to EBP. */
+ gen_op_mov_reg_v(a_ot, R_EBP, cpu_T[1]);
+
+ /* Compute the final value of ESP. */
+ tcg_gen_subi_tl(cpu_T[1], cpu_T[1], esp_addend + size * level);
+ gen_op_mov_reg_v(a_ot, R_ESP, cpu_T[1]);
}
static void gen_exception(DisasContext *s, int trapno, target_ulong cur_eip)
--
1.8.3.1
next prev parent reply other threads:[~2016-02-08 17:03 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-08 17:02 [Qemu-devel] [PULL 00/28] Misc changes for 2016-02-08 Paolo Bonzini
2016-02-08 17:02 ` [Qemu-devel] [PULL 01/28] memory: add early bail out from cpu_physical_memory_set_dirty_range Paolo Bonzini
2016-02-08 17:02 ` [Qemu-devel] [PULL 02/28] memory: RCU ram_list.dirty_memory[] for safe RAM hotplug Paolo Bonzini
2016-02-08 17:02 ` [Qemu-devel] [PULL 03/28] qemu-char: Keep pty slave file descriptor open until the master is closed Paolo Bonzini
2016-02-08 17:02 ` [Qemu-devel] [PULL 04/28] configure: sanity check the glib library that pkg-config finds Paolo Bonzini
2016-02-08 17:02 ` [Qemu-devel] [PULL 05/28] include/qemu/atomic.h: default to __atomic functions Paolo Bonzini
2016-02-08 17:02 ` [Qemu-devel] [PULL 06/28] scsi: push WWN fields up to SCSIDevice Paolo Bonzini
2016-02-08 17:02 ` [Qemu-devel] [PULL 07/28] scsi-generic: grab device and port SAS addresses from backend Paolo Bonzini
2016-02-08 17:02 ` [Qemu-devel] [PULL 08/28] hw: Add support for LSI SAS1068 (mptsas) device Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 09/28] qemu-nbd: Fix unintended texi verbatim formatting Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 10/28] qemu-nbd: Minor texi updates Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 11/28] qemu-nbd: Fix texi sentence capitalisation Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 12/28] scripts/kvm/kvm_stat: Fix tracefs access checking Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 13/28] nbd: avoid unaligned uint64_t store Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 14/28] kvm-all: trace: strerror fixup Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 15/28] char: fix repeated registration of tcp chardev I/O handlers Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 16/28] target-i386: Create gen_lea_v_seg Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 17/28] target-i386: Introduce mo_stacksize Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 18/28] target-i386: Use gen_lea_v_seg in gen_lea_modrm Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 19/28] target-i386: Use gen_lea_v_seg in stack subroutines Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 20/28] target-i386: Access segs via TCG registers Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 21/28] target-i386: Use gen_lea_v_seg in pusha/popa Paolo Bonzini
2016-02-08 17:03 ` Paolo Bonzini [this message]
2016-02-08 17:03 ` [Qemu-devel] [PULL 23/28] target-i386: Rewrite leave Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 24/28] target-i386: Tidy gen_add_A0_im Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 25/28] target-i386: Deconstruct the cpu_T array Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 26/28] ipmi: do not take/drop iothread lock Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 27/28] ipmi_bmc_sim: Fix off by one in check Paolo Bonzini
2016-02-08 17:03 ` [Qemu-devel] [PULL 28/28] ipmi_bmc_sim: Add break to correct watchdog NMI check Paolo Bonzini
2016-02-09 9:21 ` [Qemu-devel] [PULL 00/28] Misc changes for 2016-02-08 Peter Maydell
2016-02-09 11:10 ` Paolo Bonzini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1454950999-64128-23-git-send-email-pbonzini@redhat.com \
--to=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).