[Qemu-devel] [PULL 0/3] MIPS queue for July 15th, 2019

[Qemu-devel] [PULL 0/3] MIPS queue for July 15th, 2019

[Aleksandar Markovic]

From: Aleksandar Markovic <amarkovic@wavecomp.com>

The following changes since commit 5ea8ec2fcf57cb9af24ad2cf17b4d64adb03afdf:

  Merge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2019-07-15' into staging (2019-07-15 16:11:47 +0100)

are available in the git repository at:

  https://github.com/AMarkovic/qemu tags/mips-queue-jul-15-2019

for you to fetch changes up to 0d0304f2c4967c892a3216638fc4cb078afa2b44:

  target/mips: Add missing 'break' for certain cases of MTTR handling (2019-07-15 22:22:05 +0200)

----------------------------------------------------------------

MIPS queue for July 15th, 2019

Notes:

  - two patches from the serieas 'MIPS fixes for 4.1' did not get
  reviewed on time to be included for 4.1 rc1, so they are left
  possibly for 4.1 rc2

Highlights:

  - fixes for missing 'break' in switch statements

----------------------------------------------------------------

Aleksandar Markovic (3):
  target/mips: Add missing 'break' for a case of MTHC0 handling
  target/mips: Add missing 'break' for certain cases of MFTR handling
  target/mips: Add missing 'break' for certain cases of MTTR handling

 target/mips/translate.c | 5 +++++
 1 file changed, 5 insertions(+)

-- 
2.7.4

[Qemu-devel] [PULL 1/3] target/mips: Add missing 'break' for a case of MTHC0 handling

[Aleksandar Markovic]

From: Aleksandar Markovic <amarkovic@wavecomp.com>

This was found by GCC 8.3 static analysis.

Fixes: 5fb2dcd1792

Reported-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1563220847-14630-3-git-send-email-aleksandar.markovic@rt-rk.com>
---
 target/mips/translate.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index f96f141..cce1f12 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -6745,6 +6745,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         default:
             goto cp0_unimplemented;
         }
+        break;
     case CP0_REGISTER_17:
         switch (sel) {
         case 0:
-- 
2.7.4

[Qemu-devel] [PULL 2/3] target/mips: Add missing 'break' for certain cases of MFTR handling

[Aleksandar Markovic]

From: Aleksandar Markovic <amarkovic@wavecomp.com>

This was found by GCC 8.3 static analysis.

Fixes: ead9360e2fb

Reported-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1563220847-14630-4-git-send-email-aleksandar.markovic@rt-rk.com>
---
 target/mips/translate.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index cce1f12..b4898d5 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -9826,6 +9826,7 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
                 gen_mfc0(ctx, t0, rt, sel);
                 break;
             }
+            break;
         case 12:
             switch (sel) {
             case 0:
@@ -9835,6 +9836,7 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
                 gen_mfc0(ctx, t0, rt, sel);
                 break;
             }
+            break;
         case 13:
             switch (sel) {
             case 0:
-- 
2.7.4

[Qemu-devel] [PULL 3/3] target/mips: Add missing 'break' for certain cases of MTTR handling

[Aleksandar Markovic]

From: Aleksandar Markovic <amarkovic@wavecomp.com>

This was found by GCC 8.3 static analysis.

Fixes: ead9360e2fb

Reported-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1563220847-14630-5-git-send-email-aleksandar.markovic@rt-rk.com>
---
 target/mips/translate.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index b4898d5..3575eff 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -10055,6 +10055,7 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
                 gen_mtc0(ctx, t0, rd, sel);
                 break;
             }
+            break;
         case 12:
             switch (sel) {
             case 0:
@@ -10064,6 +10065,7 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
                 gen_mtc0(ctx, t0, rd, sel);
                 break;
             }
+            break;
         case 13:
             switch (sel) {
             case 0:
-- 
2.7.4

Re: [Qemu-devel] [PULL 0/3] MIPS queue for July 15th, 2019

[Peter Maydell]

On Mon, 15 Jul 2019 at 21:29, Aleksandar Markovic
<aleksandar.markovic@rt-rk.com> wrote:
>
> From: Aleksandar Markovic <amarkovic@wavecomp.com>
>
> The following changes since commit 5ea8ec2fcf57cb9af24ad2cf17b4d64adb03afdf:
>
>   Merge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2019-07-15' into staging (2019-07-15 16:11:47 +0100)
>
> are available in the git repository at:
>
>   https://github.com/AMarkovic/qemu tags/mips-queue-jul-15-2019
>
> for you to fetch changes up to 0d0304f2c4967c892a3216638fc4cb078afa2b44:
>
>   target/mips: Add missing 'break' for certain cases of MTTR handling (2019-07-15 22:22:05 +0200)
>
> ----------------------------------------------------------------
>
> MIPS queue for July 15th, 2019
>
> Notes:
>
>   - two patches from the serieas 'MIPS fixes for 4.1' did not get
>   reviewed on time to be included for 4.1 rc1, so they are left
>   possibly for 4.1 rc2
>
> Highlights:
>
>   - fixes for missing 'break' in switch statements


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.1
for any user-visible changes.

-- PMM