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From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: "Philippe Mathieu-Daudé" <philmd@redhat.com>, qemu-devel@nongnu.org
Cc: Huacai Chen <chenhc@lemote.com>,
	aleksandar.qemu.devel@gmail.com, richard.henderson@linaro.org,
	aleksandar.rikalo@rt-rk.com, aurelien@aurel32.net
Subject: Re: [PATCH for-5.0, v1] target/mips: Fix loongson multimedia condition instructions
Date: Tue, 31 Mar 2020 00:18:34 +0800	[thread overview]
Message-ID: <1B369970-E78B-4A05-A80E-D7AB527E3A4E@flygoat.com> (raw)
In-Reply-To: <39c28108-5d85-d611-c2ea-abbbf913b981@redhat.com>



于 2020年3月30日 GMT+08:00 下午11:39:44, "Philippe Mathieu-Daudé" <philmd@redhat.com> 写到:
>Hi Jiaxun Yang,
>
>On 3/24/20 1:22 PM, Jiaxun Yang wrote:
>> Loongson multimedia condition instructions were previously
>implemented as
>> write 0 to rd due to lack of documentation. So I just confirmed with
>Loongson
>> about their encoding and implemented them correctly.
>
>If you have a binary using loongson multimedia instructions, can you
>add 
>a test? So this code won't bitrot.

I know ffmpeg uses it.
But I think that's too fat.

>
>I'm in particular interested by a test covering the MAC2008 
>instructions. You can look at examples in the tests/tcg/mips/
>directory, 
>Aleksandar added a lot of tests there.

I'm going to try that.

Thanks.

>
>Thanks,
>
>Phil.
>
>> 
>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>> Acked-by: Huacai Chen <chenhc@lemote.com>
>> ---
>> v1: Use deposit opreations according to Richard's suggestion.
>> ---
>>   target/mips/translate.c | 35 +++++++++++++++++++++++++++++++----
>>   1 file changed, 31 insertions(+), 4 deletions(-)
>> 
>> diff --git a/target/mips/translate.c b/target/mips/translate.c
>> index d745bd2803..25b595a17d 100644
>> --- a/target/mips/translate.c
>> +++ b/target/mips/translate.c
>> @@ -5529,6 +5529,7 @@ static void
>gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
>>   {
>>       uint32_t opc, shift_max;
>>       TCGv_i64 t0, t1;
>> +    TCGCond cond;
>>   
>>       opc = MASK_LMI(ctx->opcode);
>>       switch (opc) {
>> @@ -5862,14 +5863,39 @@ static void
>gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
>>   
>>       case OPC_SEQU_CP2:
>>       case OPC_SEQ_CP2:
>> +        cond = TCG_COND_EQ;
>> +        goto do_cc_cond;
>> +        break;
>>       case OPC_SLTU_CP2:
>> +        cond = TCG_COND_LTU;
>> +        goto do_cc_cond;
>> +        break;
>>       case OPC_SLT_CP2:
>> +        cond = TCG_COND_LT;
>> +        goto do_cc_cond;
>> +        break;
>>       case OPC_SLEU_CP2:
>> +        cond = TCG_COND_LEU;
>> +        goto do_cc_cond;
>> +        break;
>>       case OPC_SLE_CP2:
>> -        /*
>> -         * ??? Document is unclear: Set FCC[CC].  Does that mean the
>> -         * FD field is the CC field?
>> -         */
>> +        cond = TCG_COND_LE;
>> +    do_cc_cond:
>> +        {
>> +            int cc = (ctx->opcode >> 8) & 0x7;
>> +            TCGv_i64 t64 = tcg_temp_new_i64();
>> +            TCGv_i32 t32 = tcg_temp_new_i32();
>> +
>> +            tcg_gen_setcond_i64(cond, t64, t0, t1);
>> +            tcg_gen_extrl_i64_i32(t32, t64);
>> +            tcg_gen_deposit_i32(fpu_fcr31, fpu_fcr31, t32,
>> +                                get_fp_bit(cc), 1);
>> +
>> +            tcg_temp_free_i32(t32);
>> +            tcg_temp_free_i64(t64);
>> +        }
>> +        goto no_rd;
>> +        break;
>>       default:
>>           MIPS_INVAL("loongson_cp2");
>>           generate_exception_end(ctx, EXCP_RI);
>> @@ -5878,6 +5904,7 @@ static void
>gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
>>   
>>       gen_store_fpr64(ctx, t0, rd);
>>   
>> +no_rd:
>>       tcg_temp_free_i64(t0);
>>       tcg_temp_free_i64(t1);
>>   }
>> 

-- 
Jiaxun Yang


  reply	other threads:[~2020-03-30 16:21 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-24 12:22 [PATCH for-5.0, v1] target/mips: Fix loongson multimedia condition instructions Jiaxun Yang
2020-03-24 14:59 ` Richard Henderson
2020-03-25 10:44   ` Aleksandar Markovic
2020-03-25 10:47     ` Aleksandar Markovic
2020-03-25 11:13       ` Aleksandar Markovic
2020-03-26  1:30     ` Richard Henderson
2020-03-27 12:46       ` Aleksandar Markovic
2020-03-24 16:56 ` Aleksandar Markovic
2020-03-24 17:08   ` Jiaxun Yang
2020-03-24 17:26     ` Aleksandar Markovic
2020-03-30 15:39 ` Philippe Mathieu-Daudé
2020-03-30 16:18   ` Jiaxun Yang [this message]
2020-03-30 16:22     ` Philippe Mathieu-Daudé
2020-03-30 16:30       ` Jiaxun Yang
2020-03-30 19:01         ` Aleksandar Markovic
2020-04-01 14:36 ` Aleksandar Markovic

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