* [Qemu-devel] [PULL 00/12] softfloat header updates
@ 2019-08-19 12:16 Alex Bennée
2019-08-19 12:16 ` [Qemu-devel] [PULL 01/12] fpu: replace LIT64 usage with UINT64_C for specialize constants Alex Bennée
` (12 more replies)
0 siblings, 13 replies; 14+ messages in thread
From: Alex Bennée @ 2019-08-19 12:16 UTC (permalink / raw)
To: peter.maydell; +Cc: Alex Bennée, qemu-devel
The following changes since commit afd760539308a5524accf964107cdb1d54a059e3:
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190816' into staging (2019-08-16 17:21:40 +0100)
are available in the Git repository at:
https://github.com/stsquad/qemu.git tags/pull-softfloat-headers-190819-1
for you to fetch changes up to 5f8ab0004e878a6cd0f50fa8659df4a4f853eea8:
targets (various): use softfloat-helpers.h where we can (2019-08-19 12:07:13 +0100)
----------------------------------------------------------------
Softfloat updates
- minor refactoring of constants
- drop LIT64 macro
- re-organise header inclusion
----------------------------------------------------------------
Alex Bennée (12):
fpu: replace LIT64 usage with UINT64_C for specialize constants
fpu: convert float[16/32/64]_squash_denormal to new modern style
fpu: use min/max values from stdint.h for integral overflow
fpu: replace LIT64 with UINT64_C macros
target/m68k: replace LIT64 with UINT64_C macros
fpu: remove the LIT64 macro
fpu: move inline helpers into a separate header
fpu: make softfloat-macros "self-contained"
fpu: rename softfloat-specialize.h -> .inc.c
target/mips: rationalise softfloat includes
target/riscv: rationalise softfloat includes
targets (various): use softfloat-helpers.h where we can
...oat-specialize.h => softfloat-specialize.inc.c} | 26 +-
fpu/softfloat.c | 264 ++++++++++-----------
include/fpu/softfloat-helpers.h | 132 +++++++++++
include/fpu/softfloat-macros.h | 8 +-
include/fpu/softfloat.h | 65 +----
linux-user/mips/cpu_loop.c | 1 +
target/alpha/helper.c | 2 +-
target/m68k/softfloat.c | 98 ++++----
target/microblaze/cpu.c | 2 +-
target/mips/cpu.h | 8 +-
target/mips/internal.h | 7 +
target/mips/msa_helper.c | 1 +
target/mips/op_helper.c | 1 +
target/riscv/cpu.c | 1 +
target/riscv/cpu.h | 2 +-
target/riscv/fpu_helper.c | 1 +
target/s390x/cpu.c | 2 +-
target/sh4/cpu.c | 3 +-
target/tricore/helper.c | 2 +-
target/unicore32/cpu.c | 1 -
20 files changed, 342 insertions(+), 285 deletions(-)
rename fpu/{softfloat-specialize.h => softfloat-specialize.inc.c} (98%)
create mode 100644 include/fpu/softfloat-helpers.h
--
2.20.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [Qemu-devel] [PULL 01/12] fpu: replace LIT64 usage with UINT64_C for specialize constants
2019-08-19 12:16 [Qemu-devel] [PULL 00/12] softfloat header updates Alex Bennée
@ 2019-08-19 12:16 ` Alex Bennée
2019-08-19 12:16 ` [Qemu-devel] [PULL 02/12] fpu: convert float[16/32/64]_squash_denormal to new modern style Alex Bennée
` (11 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Bennée @ 2019-08-19 12:16 UTC (permalink / raw)
To: peter.maydell
Cc: Richard Henderson, Alex Bennée, qemu-devel, Aurelien Jarno
We have a wrapper that does the right thing from stdint.h so lets use
it for our constants in softfloat-specialize.h
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
index 7b8895726c5..5ab2fa19415 100644
--- a/fpu/softfloat-specialize.h
+++ b/fpu/softfloat-specialize.h
@@ -196,11 +196,11 @@ floatx80 floatx80_default_nan(float_status *status)
/* None of the targets that have snan_bit_is_one use floatx80. */
assert(!snan_bit_is_one(status));
#if defined(TARGET_M68K)
- r.low = LIT64(0xFFFFFFFFFFFFFFFF);
+ r.low = UINT64_C(0xFFFFFFFFFFFFFFFF);
r.high = 0x7FFF;
#else
/* X86 */
- r.low = LIT64(0xC000000000000000);
+ r.low = UINT64_C(0xC000000000000000);
r.high = 0xFFFF;
#endif
return r;
@@ -212,9 +212,9 @@ floatx80 floatx80_default_nan(float_status *status)
#define floatx80_infinity_high 0x7FFF
#if defined(TARGET_M68K)
-#define floatx80_infinity_low LIT64(0x0000000000000000)
+#define floatx80_infinity_low UINT64_C(0x0000000000000000)
#else
-#define floatx80_infinity_low LIT64(0x8000000000000000)
+#define floatx80_infinity_low UINT64_C(0x8000000000000000)
#endif
const floatx80 floatx80_infinity
@@ -667,7 +667,7 @@ int float64_is_signaling_nan(float64 a_, float_status *status)
return ((a << 1) >= 0xFFF0000000000000ULL);
} else {
return (((a >> 51) & 0xFFF) == 0xFFE)
- && (a & LIT64(0x0007FFFFFFFFFFFF));
+ && (a & UINT64_C(0x0007FFFFFFFFFFFF));
}
#endif
}
@@ -707,7 +707,7 @@ static float64 commonNaNToFloat64(commonNaNT a, float_status *status)
if (mantissa) {
return make_float64(
(((uint64_t) a.sign) << 63)
- | LIT64(0x7FF0000000000000)
+ | UINT64_C(0x7FF0000000000000)
| (a.high >> 12));
} else {
return float64_default_nan(status);
@@ -790,7 +790,7 @@ int floatx80_is_quiet_nan(floatx80 a, float_status *status)
&& (a.low == aLow);
} else {
return ((a.high & 0x7FFF) == 0x7FFF)
- && (LIT64(0x8000000000000000) <= ((uint64_t)(a.low << 1)));
+ && (UINT64_C(0x8000000000000000) <= ((uint64_t)(a.low << 1)));
}
#endif
}
@@ -812,7 +812,7 @@ int floatx80_is_signaling_nan(floatx80 a, float_status *status)
} else {
uint64_t aLow;
- aLow = a.low & ~LIT64(0x4000000000000000);
+ aLow = a.low & ~UINT64_C(0x4000000000000000);
return ((a.high & 0x7FFF) == 0x7FFF)
&& (uint64_t)(aLow << 1)
&& (a.low == aLow);
@@ -829,7 +829,7 @@ floatx80 floatx80_silence_nan(floatx80 a, float_status *status)
{
/* None of the targets that have snan_bit_is_one use floatx80. */
assert(!snan_bit_is_one(status));
- a.low |= LIT64(0xC000000000000000);
+ a.low |= UINT64_C(0xC000000000000000);
return a;
}
@@ -874,7 +874,7 @@ static floatx80 commonNaNToFloatx80(commonNaNT a, float_status *status)
}
if (a.high >> 1) {
- z.low = LIT64(0x8000000000000000) | a.high >> 1;
+ z.low = UINT64_C(0x8000000000000000) | a.high >> 1;
z.high = (((uint16_t)a.sign) << 15) | 0x7FFF;
} else {
z = floatx80_default_nan(status);
@@ -969,7 +969,7 @@ int float128_is_signaling_nan(float128 a, float_status *status)
&& (a.low || (a.high & 0x0000FFFFFFFFFFFFULL));
} else {
return (((a.high >> 47) & 0xFFFF) == 0xFFFE)
- && (a.low || (a.high & LIT64(0x00007FFFFFFFFFFF)));
+ && (a.low || (a.high & UINT64_C(0x00007FFFFFFFFFFF)));
}
#endif
}
@@ -987,7 +987,7 @@ float128 float128_silence_nan(float128 a, float_status *status)
if (snan_bit_is_one(status)) {
return float128_default_nan(status);
} else {
- a.high |= LIT64(0x0000800000000000);
+ a.high |= UINT64_C(0x0000800000000000);
return a;
}
#endif
@@ -1025,7 +1025,7 @@ static float128 commonNaNToFloat128(commonNaNT a, float_status *status)
}
shift128Right(a.high, a.low, 16, &z.high, &z.low);
- z.high |= (((uint64_t)a.sign) << 63) | LIT64(0x7FFF000000000000);
+ z.high |= (((uint64_t)a.sign) << 63) | UINT64_C(0x7FFF000000000000);
return z;
}
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Qemu-devel] [PULL 02/12] fpu: convert float[16/32/64]_squash_denormal to new modern style
2019-08-19 12:16 [Qemu-devel] [PULL 00/12] softfloat header updates Alex Bennée
2019-08-19 12:16 ` [Qemu-devel] [PULL 01/12] fpu: replace LIT64 usage with UINT64_C for specialize constants Alex Bennée
@ 2019-08-19 12:16 ` Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 03/12] fpu: use min/max values from stdint.h for integral overflow Alex Bennée
` (10 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Bennée @ 2019-08-19 12:16 UTC (permalink / raw)
To: peter.maydell; +Cc: Alex Bennée, qemu-devel, Aurelien Jarno
This also allows us to remove the extractFloat16exp/frac helpers. We
avoid using the floatXX_pack_raw functions as they are slight overkill
for masking out all but the top bit of the number. The generated code
is almost exactly the same as makes no difference to the
pre-conversion code.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 2ba36ec3703..53855892b9f 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -414,24 +414,6 @@ float64_gen2(float64 xa, float64 xb, float_status *s,
return soft(ua.s, ub.s, s);
}
-/*----------------------------------------------------------------------------
-| Returns the fraction bits of the half-precision floating-point value `a'.
-*----------------------------------------------------------------------------*/
-
-static inline uint32_t extractFloat16Frac(float16 a)
-{
- return float16_val(a) & 0x3ff;
-}
-
-/*----------------------------------------------------------------------------
-| Returns the exponent bits of the half-precision floating-point value `a'.
-*----------------------------------------------------------------------------*/
-
-static inline int extractFloat16Exp(float16 a)
-{
- return (float16_val(a) >> 10) & 0x1f;
-}
-
/*----------------------------------------------------------------------------
| Returns the fraction bits of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
@@ -3306,6 +3288,55 @@ float64 float64_silence_nan(float64 a, float_status *status)
return float64_pack_raw(p);
}
+
+/*----------------------------------------------------------------------------
+| If `a' is denormal and we are in flush-to-zero mode then set the
+| input-denormal exception and return zero. Otherwise just return the value.
+*----------------------------------------------------------------------------*/
+
+static bool parts_squash_denormal(FloatParts p, float_status *status)
+{
+ if (p.exp == 0 && p.frac != 0) {
+ float_raise(float_flag_input_denormal, status);
+ return true;
+ }
+
+ return false;
+}
+
+float16 float16_squash_input_denormal(float16 a, float_status *status)
+{
+ if (status->flush_inputs_to_zero) {
+ FloatParts p = float16_unpack_raw(a);
+ if (parts_squash_denormal(p, status)) {
+ return float16_set_sign(float16_zero, p.sign);
+ }
+ }
+ return a;
+}
+
+float32 float32_squash_input_denormal(float32 a, float_status *status)
+{
+ if (status->flush_inputs_to_zero) {
+ FloatParts p = float32_unpack_raw(a);
+ if (parts_squash_denormal(p, status)) {
+ return float32_set_sign(float32_zero, p.sign);
+ }
+ }
+ return a;
+}
+
+float64 float64_squash_input_denormal(float64 a, float_status *status)
+{
+ if (status->flush_inputs_to_zero) {
+ FloatParts p = float64_unpack_raw(a);
+ if (parts_squash_denormal(p, status)) {
+ return float64_set_sign(float64_zero, p.sign);
+ }
+ }
+ return a;
+}
+
/*----------------------------------------------------------------------------
| Takes a 64-bit fixed-point value `absZ' with binary point between bits 6
| and 7, and returns the properly rounded 32-bit integer corresponding to the
@@ -3482,21 +3513,6 @@ static int64_t roundAndPackUint64(flag zSign, uint64_t absZ0,
return absZ0;
}
-/*----------------------------------------------------------------------------
-| If `a' is denormal and we are in flush-to-zero mode then set the
-| input-denormal exception and return zero. Otherwise just return the value.
-*----------------------------------------------------------------------------*/
-float32 float32_squash_input_denormal(float32 a, float_status *status)
-{
- if (status->flush_inputs_to_zero) {
- if (extractFloat32Exp(a) == 0 && extractFloat32Frac(a) != 0) {
- float_raise(float_flag_input_denormal, status);
- return make_float32(float32_val(a) & 0x80000000);
- }
- }
- return a;
-}
-
/*----------------------------------------------------------------------------
| Normalizes the subnormal single-precision floating-point value represented
| by the denormalized significand `aSig'. The normalized exponent and
@@ -3635,21 +3651,6 @@ static float32
}
-/*----------------------------------------------------------------------------
-| If `a' is denormal and we are in flush-to-zero mode then set the
-| input-denormal exception and return zero. Otherwise just return the value.
-*----------------------------------------------------------------------------*/
-float64 float64_squash_input_denormal(float64 a, float_status *status)
-{
- if (status->flush_inputs_to_zero) {
- if (extractFloat64Exp(a) == 0 && extractFloat64Frac(a) != 0) {
- float_raise(float_flag_input_denormal, status);
- return make_float64(float64_val(a) & (1ULL << 63));
- }
- }
- return a;
-}
-
/*----------------------------------------------------------------------------
| Normalizes the subnormal double-precision floating-point value represented
| by the denormalized significand `aSig'. The normalized exponent and
@@ -4981,21 +4982,6 @@ int float32_unordered_quiet(float32 a, float32 b, float_status *status)
return 0;
}
-/*----------------------------------------------------------------------------
-| If `a' is denormal and we are in flush-to-zero mode then set the
-| input-denormal exception and return zero. Otherwise just return the value.
-*----------------------------------------------------------------------------*/
-float16 float16_squash_input_denormal(float16 a, float_status *status)
-{
- if (status->flush_inputs_to_zero) {
- if (extractFloat16Exp(a) == 0 && extractFloat16Frac(a) != 0) {
- float_raise(float_flag_input_denormal, status);
- return make_float16(float16_val(a) & 0x8000);
- }
- }
- return a;
-}
-
/*----------------------------------------------------------------------------
| Returns the result of converting the double-precision floating-point value
| `a' to the extended double-precision floating-point format. The conversion
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Qemu-devel] [PULL 03/12] fpu: use min/max values from stdint.h for integral overflow
2019-08-19 12:16 [Qemu-devel] [PULL 00/12] softfloat header updates Alex Bennée
2019-08-19 12:16 ` [Qemu-devel] [PULL 01/12] fpu: replace LIT64 usage with UINT64_C for specialize constants Alex Bennée
2019-08-19 12:16 ` [Qemu-devel] [PULL 02/12] fpu: convert float[16/32/64]_squash_denormal to new modern style Alex Bennée
@ 2019-08-19 12:17 ` Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 04/12] fpu: replace LIT64 with UINT64_C macros Alex Bennée
` (9 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Bennée @ 2019-08-19 12:17 UTC (permalink / raw)
To: peter.maydell
Cc: Richard Henderson, Alex Bennée, qemu-devel, Aurelien Jarno
Remove some more use of LIT64 while making the meaning more clear. We
also avoid the need of casts as the results by definition fit into the
return type.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 53855892b9f..d2cdf4a4a3b 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -3384,7 +3384,7 @@ static int32_t roundAndPackInt32(flag zSign, uint64_t absZ, float_status *status
if ( zSign ) z = - z;
if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) {
float_raise(float_flag_invalid, status);
- return zSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
+ return zSign ? INT32_MIN : INT32_MAX;
}
if (roundBits) {
status->float_exception_flags |= float_flag_inexact;
@@ -3444,9 +3444,7 @@ static int64_t roundAndPackInt64(flag zSign, uint64_t absZ0, uint64_t absZ1,
if ( z && ( ( z < 0 ) ^ zSign ) ) {
overflow:
float_raise(float_flag_invalid, status);
- return
- zSign ? (int64_t) LIT64( 0x8000000000000000 )
- : LIT64( 0x7FFFFFFFFFFFFFFF );
+ return zSign ? INT64_MIN : INT64_MAX;
}
if (absZ1) {
status->float_exception_flags |= float_flag_inexact;
@@ -3497,7 +3495,7 @@ static int64_t roundAndPackUint64(flag zSign, uint64_t absZ0,
++absZ0;
if (absZ0 == 0) {
float_raise(float_flag_invalid, status);
- return LIT64(0xFFFFFFFFFFFFFFFF);
+ return UINT64_MAX;
}
absZ0 &= ~(((uint64_t)(absZ1<<1) == 0) & roundNearestEven);
}
@@ -5518,9 +5516,9 @@ int64_t floatx80_to_int64(floatx80 a, float_status *status)
if ( shiftCount ) {
float_raise(float_flag_invalid, status);
if (!aSign || floatx80_is_any_nan(a)) {
- return LIT64( 0x7FFFFFFFFFFFFFFF );
+ return INT64_MAX;
}
- return (int64_t) LIT64( 0x8000000000000000 );
+ return INT64_MIN;
}
aSigExtra = 0;
}
@@ -5561,10 +5559,10 @@ int64_t floatx80_to_int64_round_to_zero(floatx80 a, float_status *status)
if ( ( a.high != 0xC03E ) || aSig ) {
float_raise(float_flag_invalid, status);
if ( ! aSign || ( ( aExp == 0x7FFF ) && aSig ) ) {
- return LIT64( 0x7FFFFFFFFFFFFFFF );
+ return INT64_MAX;
}
}
- return (int64_t) LIT64( 0x8000000000000000 );
+ return INT64_MIN;
}
else if ( aExp < 0x3FFF ) {
if (aExp | aSig) {
@@ -6623,7 +6621,7 @@ int32_t float128_to_int32_round_to_zero(float128 a, float_status *status)
if ( ( z < 0 ) ^ aSign ) {
invalid:
float_raise(float_flag_invalid, status);
- return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
+ return aSign ? INT32_MIN : INT32_MAX;
}
if ( ( aSig0<<shiftCount ) != savedASig ) {
status->float_exception_flags |= float_flag_inexact;
@@ -6662,9 +6660,9 @@ int64_t float128_to_int64(float128 a, float_status *status)
&& ( aSig1 || ( aSig0 != LIT64( 0x0001000000000000 ) ) )
)
) {
- return LIT64( 0x7FFFFFFFFFFFFFFF );
+ return INT64_MAX;
}
- return (int64_t) LIT64( 0x8000000000000000 );
+ return INT64_MIN;
}
shortShift128Left( aSig0, aSig1, - shiftCount, &aSig0, &aSig1 );
}
@@ -6710,10 +6708,10 @@ int64_t float128_to_int64_round_to_zero(float128 a, float_status *status)
else {
float_raise(float_flag_invalid, status);
if ( ! aSign || ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) ) {
- return LIT64( 0x7FFFFFFFFFFFFFFF );
+ return INT64_MAX;
}
}
- return (int64_t) LIT64( 0x8000000000000000 );
+ return INT64_MIN;
}
z = ( aSig0<<shiftCount ) | ( aSig1>>( ( - shiftCount ) & 63 ) );
if ( (uint64_t) ( aSig1<<shiftCount ) ) {
@@ -6764,19 +6762,19 @@ uint64_t float128_to_uint64(float128 a, float_status *status)
if (aSign && (aExp > 0x3FFE)) {
float_raise(float_flag_invalid, status);
if (float128_is_any_nan(a)) {
- return LIT64(0xFFFFFFFFFFFFFFFF);
+ return UINT64_MAX;
} else {
return 0;
}
}
if (aExp) {
- aSig0 |= LIT64(0x0001000000000000);
+ aSig0 |= UINT64_C(0x0001000000000000);
}
shiftCount = 0x402F - aExp;
if (shiftCount <= 0) {
if (0x403E < aExp) {
float_raise(float_flag_invalid, status);
- return LIT64(0xFFFFFFFFFFFFFFFF);
+ return UINT64_MAX;
}
shortShift128Left(aSig0, aSig1, -shiftCount, &aSig0, &aSig1);
} else {
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Qemu-devel] [PULL 04/12] fpu: replace LIT64 with UINT64_C macros
2019-08-19 12:16 [Qemu-devel] [PULL 00/12] softfloat header updates Alex Bennée
` (2 preceding siblings ...)
2019-08-19 12:17 ` [Qemu-devel] [PULL 03/12] fpu: use min/max values from stdint.h for integral overflow Alex Bennée
@ 2019-08-19 12:17 ` Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 05/12] target/m68k: " Alex Bennée
` (8 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Bennée @ 2019-08-19 12:17 UTC (permalink / raw)
To: peter.maydell
Cc: Richard Henderson, Alex Bennée, qemu-devel, Aurelien Jarno
In our quest to eliminate the home rolled LIT64 macro we fixup usage
inside the softfloat code. While we are at it we remove some of the
extraneous spaces to closer fit the house style.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index d2cdf4a4a3b..7ef0638d7e4 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -447,7 +447,7 @@ static inline flag extractFloat32Sign(float32 a)
static inline uint64_t extractFloat64Frac(float64 a)
{
- return float64_val(a) & LIT64(0x000FFFFFFFFFFFFF);
+ return float64_val(a) & UINT64_C(0x000FFFFFFFFFFFFF);
}
/*----------------------------------------------------------------------------
@@ -3251,7 +3251,7 @@ float128 float128_default_nan(float_status *status)
*/
r.low = -(p.frac & 1);
r.high = p.frac >> (DECOMPOSED_BINARY_POINT - 48);
- r.high |= LIT64(0x7FFF000000000000);
+ r.high |= UINT64_C(0x7FFF000000000000);
r.high |= (uint64_t)p.sign << 63;
return r;
@@ -3758,7 +3758,7 @@ static float64 roundAndPackFloat64(flag zSign, int zExp, uint64_t zSig,
(status->float_detect_tininess
== float_tininess_before_rounding)
|| ( zExp < -1 )
- || ( zSig + roundIncrement < LIT64( 0x8000000000000000 ) );
+ || ( zSig + roundIncrement < UINT64_C(0x8000000000000000) );
shift64RightJamming( zSig, - zExp, &zSig );
zExp = 0;
roundBits = zSig & 0x3FF;
@@ -3858,12 +3858,12 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign,
roundNearestEven = ( roundingMode == float_round_nearest_even );
if ( roundingPrecision == 80 ) goto precision80;
if ( roundingPrecision == 64 ) {
- roundIncrement = LIT64( 0x0000000000000400 );
- roundMask = LIT64( 0x00000000000007FF );
+ roundIncrement = UINT64_C(0x0000000000000400);
+ roundMask = UINT64_C(0x00000000000007FF);
}
else if ( roundingPrecision == 32 ) {
- roundIncrement = LIT64( 0x0000008000000000 );
- roundMask = LIT64( 0x000000FFFFFFFFFF );
+ roundIncrement = UINT64_C(0x0000008000000000);
+ roundMask = UINT64_C(0x000000FFFFFFFFFF);
}
else {
goto precision80;
@@ -3927,7 +3927,7 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign,
zSig0 += roundIncrement;
if ( zSig0 < roundIncrement ) {
++zExp;
- zSig0 = LIT64( 0x8000000000000000 );
+ zSig0 = UINT64_C(0x8000000000000000);
}
roundIncrement = roundMask + 1;
if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {
@@ -3957,7 +3957,7 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign,
if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) {
if ( ( 0x7FFE < zExp )
|| ( ( zExp == 0x7FFE )
- && ( zSig0 == LIT64( 0xFFFFFFFFFFFFFFFF ) )
+ && ( zSig0 == UINT64_C(0xFFFFFFFFFFFFFFFF) )
&& increment
)
) {
@@ -3980,7 +3980,7 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign,
== float_tininess_before_rounding)
|| ( zExp < 0 )
|| ! increment
- || ( zSig0 < LIT64( 0xFFFFFFFFFFFFFFFF ) );
+ || ( zSig0 < UINT64_C(0xFFFFFFFFFFFFFFFF) );
shift64ExtraRightJamming( zSig0, zSig1, 1 - zExp, &zSig0, &zSig1 );
zExp = 0;
if (isTiny && zSig1) {
@@ -4022,7 +4022,7 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign,
++zSig0;
if ( zSig0 == 0 ) {
++zExp;
- zSig0 = LIT64( 0x8000000000000000 );
+ zSig0 = UINT64_C(0x8000000000000000);
}
else {
zSig0 &= ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );
@@ -4084,7 +4084,7 @@ static inline uint64_t extractFloat128Frac1( float128 a )
static inline uint64_t extractFloat128Frac0( float128 a )
{
- return a.high & LIT64( 0x0000FFFFFFFFFFFF );
+ return a.high & UINT64_C(0x0000FFFFFFFFFFFF);
}
@@ -4230,8 +4230,8 @@ static float128 roundAndPackFloat128(flag zSign, int32_t zExp,
if ( ( 0x7FFD < zExp )
|| ( ( zExp == 0x7FFD )
&& eq128(
- LIT64( 0x0001FFFFFFFFFFFF ),
- LIT64( 0xFFFFFFFFFFFFFFFF ),
+ UINT64_C(0x0001FFFFFFFFFFFF),
+ UINT64_C(0xFFFFFFFFFFFFFFFF),
zSig0,
zSig1
)
@@ -4248,8 +4248,8 @@ static float128 roundAndPackFloat128(flag zSign, int32_t zExp,
packFloat128(
zSign,
0x7FFE,
- LIT64( 0x0000FFFFFFFFFFFF ),
- LIT64( 0xFFFFFFFFFFFFFFFF )
+ UINT64_C(0x0000FFFFFFFFFFFF),
+ UINT64_C(0xFFFFFFFFFFFFFFFF)
);
}
return packFloat128( zSign, 0x7FFF, 0, 0 );
@@ -4267,8 +4267,8 @@ static float128 roundAndPackFloat128(flag zSign, int32_t zExp,
|| lt128(
zSig0,
zSig1,
- LIT64( 0x0001FFFFFFFFFFFF ),
- LIT64( 0xFFFFFFFFFFFFFFFF )
+ UINT64_C(0x0001FFFFFFFFFFFF),
+ UINT64_C(0xFFFFFFFFFFFFFFFF)
);
shift128ExtraRightJamming(
zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );
@@ -5011,7 +5011,7 @@ floatx80 float64_to_floatx80(float64 a, float_status *status)
}
return
packFloatx80(
- aSign, aExp + 0x3C00, ( aSig | LIT64( 0x0010000000000000 ) )<<11 );
+ aSign, aExp + 0x3C00, (aSig | UINT64_C(0x0010000000000000)) << 11);
}
@@ -5095,8 +5095,8 @@ float64 float64_rem(float64 a, float64 b, float_status *status)
normalizeFloat64Subnormal( aSig, &aExp, &aSig );
}
expDiff = aExp - bExp;
- aSig = ( aSig | LIT64( 0x0010000000000000 ) )<<11;
- bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11;
+ aSig = (aSig | UINT64_C(0x0010000000000000)) << 11;
+ bSig = (bSig | UINT64_C(0x0010000000000000)) << 11;
if ( expDiff < 0 ) {
if ( expDiff < -1 ) return a;
aSig >>= 1;
@@ -5169,13 +5169,13 @@ float64 float64_log2(float64 a, float_status *status)
}
aExp -= 0x3FF;
- aSig |= LIT64( 0x0010000000000000 );
+ aSig |= UINT64_C(0x0010000000000000);
zSign = aExp < 0;
zSig = (uint64_t)aExp << 52;
for (i = 1LL << 51; i > 0; i >>= 1) {
mul64To128( aSig, aSig, &aSig0, &aSig1 );
aSig = ( aSig0 << 12 ) | ( aSig1 >> 52 );
- if ( aSig & LIT64( 0x0020000000000000 ) ) {
+ if ( aSig & UINT64_C(0x0020000000000000) ) {
aSig >>= 1;
zSig |= i;
}
@@ -5555,7 +5555,7 @@ int64_t floatx80_to_int64_round_to_zero(floatx80 a, float_status *status)
aSign = extractFloatx80Sign( a );
shiftCount = aExp - 0x403E;
if ( 0 <= shiftCount ) {
- aSig &= LIT64( 0x7FFFFFFFFFFFFFFF );
+ aSig &= UINT64_C(0x7FFFFFFFFFFFFFFF);
if ( ( a.high != 0xC03E ) || aSig ) {
float_raise(float_flag_invalid, status);
if ( ! aSign || ( ( aExp == 0x7FFF ) && aSig ) ) {
@@ -5724,23 +5724,23 @@ floatx80 floatx80_round_to_int(floatx80 a, float_status *status)
if ( ( aExp == 0x3FFE ) && (uint64_t) ( extractFloatx80Frac( a )<<1 )
) {
return
- packFloatx80( aSign, 0x3FFF, LIT64( 0x8000000000000000 ) );
+ packFloatx80( aSign, 0x3FFF, UINT64_C(0x8000000000000000));
}
break;
case float_round_ties_away:
if (aExp == 0x3FFE) {
- return packFloatx80(aSign, 0x3FFF, LIT64(0x8000000000000000));
+ return packFloatx80(aSign, 0x3FFF, UINT64_C(0x8000000000000000));
}
break;
case float_round_down:
return
aSign ?
- packFloatx80( 1, 0x3FFF, LIT64( 0x8000000000000000 ) )
+ packFloatx80( 1, 0x3FFF, UINT64_C(0x8000000000000000))
: packFloatx80( 0, 0, 0 );
case float_round_up:
return
aSign ? packFloatx80( 1, 0, 0 )
- : packFloatx80( 0, 0x3FFF, LIT64( 0x8000000000000000 ) );
+ : packFloatx80( 0, 0x3FFF, UINT64_C(0x8000000000000000));
}
return packFloatx80( aSign, 0, 0 );
}
@@ -5776,7 +5776,7 @@ floatx80 floatx80_round_to_int(floatx80 a, float_status *status)
z.low &= ~ roundBitsMask;
if ( z.low == 0 ) {
++z.high;
- z.low = LIT64( 0x8000000000000000 );
+ z.low = UINT64_C(0x8000000000000000);
}
if (z.low != a.low) {
status->float_exception_flags |= float_flag_inexact;
@@ -5849,7 +5849,7 @@ static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, flag zSign,
if ( (int64_t) zSig0 < 0 ) goto roundAndPack;
shiftRight1:
shift64ExtraRightJamming( zSig0, zSig1, 1, &zSig0, &zSig1 );
- zSig0 |= LIT64( 0x8000000000000000 );
+ zSig0 |= UINT64_C(0x8000000000000000);
++zExp;
roundAndPack:
return roundAndPackFloatx80(status->floatx80_rounding_precision,
@@ -6171,7 +6171,7 @@ floatx80 floatx80_rem(floatx80 a, floatx80 b, float_status *status)
if ( (uint64_t) ( aSig0<<1 ) == 0 ) return a;
normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 );
}
- bSig |= LIT64( 0x8000000000000000 );
+ bSig |= UINT64_C(0x8000000000000000);
zSign = aSign;
expDiff = aExp - bExp;
aSig1 = 0;
@@ -6273,7 +6273,7 @@ floatx80 floatx80_sqrt(floatx80 a, float_status *status)
add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
}
zSig1 = estimateDiv128To64( rem1, 0, doubleZSig0 );
- if ( ( zSig1 & LIT64( 0x3FFFFFFFFFFFFFFF ) ) <= 5 ) {
+ if ( ( zSig1 & UINT64_C(0x3FFFFFFFFFFFFFFF) ) <= 5 ) {
if ( zSig1 == 0 ) zSig1 = 1;
mul64To128( doubleZSig0, zSig1, &term1, &term2 );
sub128( rem1, 0, term1, term2, &rem1, &rem2 );
@@ -6572,7 +6572,7 @@ int32_t float128_to_int32(float128 a, float_status *status)
aExp = extractFloat128Exp( a );
aSign = extractFloat128Sign( a );
if ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) aSign = 0;
- if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
+ if ( aExp ) aSig0 |= UINT64_C(0x0001000000000000);
aSig0 |= ( aSig1 != 0 );
shiftCount = 0x4028 - aExp;
if ( 0 < shiftCount ) shift64RightJamming( aSig0, shiftCount, &aSig0 );
@@ -6612,7 +6612,7 @@ int32_t float128_to_int32_round_to_zero(float128 a, float_status *status)
}
return 0;
}
- aSig0 |= LIT64( 0x0001000000000000 );
+ aSig0 |= UINT64_C(0x0001000000000000);
shiftCount = 0x402F - aExp;
savedASig = aSig0;
aSig0 >>= shiftCount;
@@ -6650,14 +6650,14 @@ int64_t float128_to_int64(float128 a, float_status *status)
aSig0 = extractFloat128Frac0( a );
aExp = extractFloat128Exp( a );
aSign = extractFloat128Sign( a );
- if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
+ if ( aExp ) aSig0 |= UINT64_C(0x0001000000000000);
shiftCount = 0x402F - aExp;
if ( shiftCount <= 0 ) {
if ( 0x403E < aExp ) {
float_raise(float_flag_invalid, status);
if ( ! aSign
|| ( ( aExp == 0x7FFF )
- && ( aSig1 || ( aSig0 != LIT64( 0x0001000000000000 ) ) )
+ && ( aSig1 || ( aSig0 != UINT64_C(0x0001000000000000) ) )
)
) {
return INT64_MAX;
@@ -6694,13 +6694,13 @@ int64_t float128_to_int64_round_to_zero(float128 a, float_status *status)
aSig0 = extractFloat128Frac0( a );
aExp = extractFloat128Exp( a );
aSign = extractFloat128Sign( a );
- if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
+ if ( aExp ) aSig0 |= UINT64_C(0x0001000000000000);
shiftCount = aExp - 0x402F;
if ( 0 < shiftCount ) {
if ( 0x403E <= aExp ) {
- aSig0 &= LIT64( 0x0000FFFFFFFFFFFF );
- if ( ( a.high == LIT64( 0xC03E000000000000 ) )
- && ( aSig1 < LIT64( 0x0002000000000000 ) ) ) {
+ aSig0 &= UINT64_C(0x0000FFFFFFFFFFFF);
+ if ( ( a.high == UINT64_C(0xC03E000000000000) )
+ && ( aSig1 < UINT64_C(0x0002000000000000) ) ) {
if (aSig1) {
status->float_exception_flags |= float_flag_inexact;
}
@@ -6913,7 +6913,7 @@ float64 float128_to_float64(float128 a, float_status *status)
shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );
aSig0 |= ( aSig1 != 0 );
if ( aExp || aSig0 ) {
- aSig0 |= LIT64( 0x4000000000000000 );
+ aSig0 |= UINT64_C(0x4000000000000000);
aExp -= 0x3C01;
}
return roundAndPackFloat64(aSign, aExp, aSig0, status);
@@ -6949,7 +6949,7 @@ floatx80 float128_to_floatx80(float128 a, float_status *status)
normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
}
else {
- aSig0 |= LIT64( 0x0001000000000000 );
+ aSig0 |= UINT64_C(0x0001000000000000);
}
shortShift128Left( aSig0, aSig1, 15, &aSig0, &aSig1 );
return roundAndPackFloatx80(80, aSign, aExp, aSig0, aSig1, status);
@@ -7145,7 +7145,7 @@ static float128 addFloat128Sigs(float128 a, float128 b, flag zSign,
--expDiff;
}
else {
- bSig0 |= LIT64( 0x0001000000000000 );
+ bSig0 |= UINT64_C(0x0001000000000000);
}
shift128ExtraRightJamming(
bSig0, bSig1, 0, expDiff, &bSig0, &bSig1, &zSig2 );
@@ -7162,7 +7162,7 @@ static float128 addFloat128Sigs(float128 a, float128 b, flag zSign,
++expDiff;
}
else {
- aSig0 |= LIT64( 0x0001000000000000 );
+ aSig0 |= UINT64_C(0x0001000000000000);
}
shift128ExtraRightJamming(
aSig0, aSig1, 0, - expDiff, &aSig0, &aSig1, &zSig2 );
@@ -7186,14 +7186,14 @@ static float128 addFloat128Sigs(float128 a, float128 b, flag zSign,
return packFloat128( zSign, 0, zSig0, zSig1 );
}
zSig2 = 0;
- zSig0 |= LIT64( 0x0002000000000000 );
+ zSig0 |= UINT64_C(0x0002000000000000);
zExp = aExp;
goto shiftRight1;
}
- aSig0 |= LIT64( 0x0001000000000000 );
+ aSig0 |= UINT64_C(0x0001000000000000);
add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
--zExp;
- if ( zSig0 < LIT64( 0x0002000000000000 ) ) goto roundAndPack;
+ if ( zSig0 < UINT64_C(0x0002000000000000) ) goto roundAndPack;
++zExp;
shiftRight1:
shift128ExtraRightJamming(
@@ -7257,10 +7257,10 @@ static float128 subFloat128Sigs(float128 a, float128 b, flag zSign,
++expDiff;
}
else {
- aSig0 |= LIT64( 0x4000000000000000 );
+ aSig0 |= UINT64_C(0x4000000000000000);
}
shift128RightJamming( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );
- bSig0 |= LIT64( 0x4000000000000000 );
+ bSig0 |= UINT64_C(0x4000000000000000);
bBigger:
sub128( bSig0, bSig1, aSig0, aSig1, &zSig0, &zSig1 );
zExp = bExp;
@@ -7277,10 +7277,10 @@ static float128 subFloat128Sigs(float128 a, float128 b, flag zSign,
--expDiff;
}
else {
- bSig0 |= LIT64( 0x4000000000000000 );
+ bSig0 |= UINT64_C(0x4000000000000000);
}
shift128RightJamming( bSig0, bSig1, expDiff, &bSig0, &bSig1 );
- aSig0 |= LIT64( 0x4000000000000000 );
+ aSig0 |= UINT64_C(0x4000000000000000);
aBigger:
sub128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
zExp = aExp;
@@ -7382,12 +7382,12 @@ float128 float128_mul(float128 a, float128 b, float_status *status)
normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
}
zExp = aExp + bExp - 0x4000;
- aSig0 |= LIT64( 0x0001000000000000 );
+ aSig0 |= UINT64_C(0x0001000000000000);
shortShift128Left( bSig0, bSig1, 16, &bSig0, &bSig1 );
mul128To256( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1, &zSig2, &zSig3 );
add128( zSig0, zSig1, aSig0, aSig1, &zSig0, &zSig1 );
zSig2 |= ( zSig3 != 0 );
- if ( LIT64( 0x0002000000000000 ) <= zSig0 ) {
+ if (UINT64_C( 0x0002000000000000) <= zSig0 ) {
shift128ExtraRightJamming(
zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );
++zExp;
@@ -7454,9 +7454,9 @@ float128 float128_div(float128 a, float128 b, float_status *status)
}
zExp = aExp - bExp + 0x3FFD;
shortShift128Left(
- aSig0 | LIT64( 0x0001000000000000 ), aSig1, 15, &aSig0, &aSig1 );
+ aSig0 | UINT64_C(0x0001000000000000), aSig1, 15, &aSig0, &aSig1 );
shortShift128Left(
- bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 );
+ bSig0 | UINT64_C(0x0001000000000000), bSig1, 15, &bSig0, &bSig1 );
if ( le128( bSig0, bSig1, aSig0, aSig1 ) ) {
shift128Right( aSig0, aSig1, 1, &aSig0, &aSig1 );
++zExp;
@@ -7532,14 +7532,14 @@ float128 float128_rem(float128 a, float128 b, float_status *status)
expDiff = aExp - bExp;
if ( expDiff < -1 ) return a;
shortShift128Left(
- aSig0 | LIT64( 0x0001000000000000 ),
+ aSig0 | UINT64_C(0x0001000000000000),
aSig1,
15 - ( expDiff < 0 ),
&aSig0,
&aSig1
);
shortShift128Left(
- bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 );
+ bSig0 | UINT64_C(0x0001000000000000), bSig1, 15, &bSig0, &bSig1 );
q = le128( bSig0, bSig1, aSig0, aSig1 );
if ( q ) sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
expDiff -= 64;
@@ -7625,7 +7625,7 @@ float128 float128_sqrt(float128 a, float_status *status)
normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
}
zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFE;
- aSig0 |= LIT64( 0x0001000000000000 );
+ aSig0 |= UINT64_C(0x0001000000000000);
zSig0 = estimateSqrt32( aExp, aSig0>>17 );
shortShift128Left( aSig0, aSig1, 13 - ( aExp & 1 ), &aSig0, &aSig1 );
zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 );
@@ -8046,7 +8046,7 @@ float128 float128_scalbn(float128 a, int n, float_status *status)
return a;
}
if (aExp != 0) {
- aSig0 |= LIT64( 0x0001000000000000 );
+ aSig0 |= UINT64_C(0x0001000000000000);
} else if (aSig0 == 0 && aSig1 == 0) {
return a;
} else {
diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h
index be83a833ec9..3a956736742 100644
--- a/include/fpu/softfloat-macros.h
+++ b/include/fpu/softfloat-macros.h
@@ -618,13 +618,13 @@ static inline uint64_t estimateDiv128To64(uint64_t a0, uint64_t a1, uint64_t b)
uint64_t rem0, rem1, term0, term1;
uint64_t z;
- if ( b <= a0 ) return LIT64( 0xFFFFFFFFFFFFFFFF );
+ if ( b <= a0 ) return UINT64_C(0xFFFFFFFFFFFFFFFF);
b0 = b>>32;
- z = ( b0<<32 <= a0 ) ? LIT64( 0xFFFFFFFF00000000 ) : ( a0 / b0 )<<32;
+ z = ( b0<<32 <= a0 ) ? UINT64_C(0xFFFFFFFF00000000) : ( a0 / b0 )<<32;
mul64To128( b, z, &term0, &term1 );
sub128( a0, a1, term0, term1, &rem0, &rem1 );
while ( ( (int64_t) rem0 ) < 0 ) {
- z -= LIT64( 0x100000000 );
+ z -= UINT64_C(0x100000000);
b1 = b<<32;
add128( rem0, rem1, b0, b1, &rem0, &rem1 );
}
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Qemu-devel] [PULL 05/12] target/m68k: replace LIT64 with UINT64_C macros
2019-08-19 12:16 [Qemu-devel] [PULL 00/12] softfloat header updates Alex Bennée
` (3 preceding siblings ...)
2019-08-19 12:17 ` [Qemu-devel] [PULL 04/12] fpu: replace LIT64 with UINT64_C macros Alex Bennée
@ 2019-08-19 12:17 ` Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 06/12] fpu: remove the LIT64 macro Alex Bennée
` (7 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Bennée @ 2019-08-19 12:17 UTC (permalink / raw)
To: peter.maydell
Cc: Richard Henderson, Alex Bennée, qemu-devel, Laurent Vivier
In our quest to eliminate the home rolled LIT64 macro we fixup usage
inside for m68k's many constants.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
diff --git a/target/m68k/softfloat.c b/target/m68k/softfloat.c
index 591a6f1dcec..24c313ed690 100644
--- a/target/m68k/softfloat.c
+++ b/target/m68k/softfloat.c
@@ -26,7 +26,7 @@
#define pi_exp 0x4000
#define piby2_exp 0x3FFF
-#define pi_sig LIT64(0xc90fdaa22168c235)
+#define pi_sig UINT64_C(0xc90fdaa22168c235)
static floatx80 propagateFloatx80NaNOneArg(floatx80 a, float_status *status)
{
@@ -87,7 +87,7 @@ floatx80 floatx80_mod(floatx80 a, floatx80 b, float_status *status)
}
normalizeFloatx80Subnormal(aSig0, &aExp, &aSig0);
}
- bSig |= LIT64(0x8000000000000000);
+ bSig |= UINT64_C(0x8000000000000000);
zSign = aSign;
expDiff = aExp - bExp;
aSig1 = 0;
@@ -289,7 +289,7 @@ floatx80 floatx80_move(floatx80 a, float_status *status)
*/
#define one_exp 0x3FFF
-#define one_sig LIT64(0x8000000000000000)
+#define one_sig UINT64_C(0x8000000000000000)
/*
* Function for compactifying extended double-precision floating point values.
@@ -373,7 +373,7 @@ floatx80 floatx80_lognp1(floatx80 a, float_status *status)
k = aExp - 0x3FFF;
fp1 = int32_to_floatx80(k, status);
- fSig = (aSig & LIT64(0xFE00000000000000)) | LIT64(0x0100000000000000);
+ fSig = (aSig & UINT64_C(0xFE00000000000000)) | UINT64_C(0x0100000000000000);
j = (fSig >> 56) & 0x7E; /* DISPLACEMENT FOR 1/F */
f = packFloatx80(0, 0x3FFF, fSig); /* F */
@@ -384,7 +384,7 @@ floatx80 floatx80_lognp1(floatx80 a, float_status *status)
lp1cont1:
/* LP1CONT1 */
fp0 = floatx80_mul(fp0, log_tbl[j], status); /* FP0 IS U = (Y-F)/F */
- logof2 = packFloatx80(0, 0x3FFE, LIT64(0xB17217F7D1CF79AC));
+ logof2 = packFloatx80(0, 0x3FFE, UINT64_C(0xB17217F7D1CF79AC));
klog2 = floatx80_mul(fp1, logof2, status); /* FP1 IS K*LOG2 */
fp2 = floatx80_mul(fp0, fp0, status); /* FP2 IS V=U*U */
@@ -431,7 +431,7 @@ floatx80 floatx80_lognp1(floatx80 a, float_status *status)
} else if (compact < 0x3FFEF07D || compact > 0x3FFF8841) {
/* |X| < 1/16 or |X| > -1/16 */
/* LP1CARE */
- fSig = (aSig & LIT64(0xFE00000000000000)) | LIT64(0x0100000000000000);
+ fSig = (aSig & UINT64_C(0xFE00000000000000)) | UINT64_C(0x0100000000000000);
f = packFloatx80(0, 0x3FFF, fSig); /* F */
j = (fSig >> 56) & 0x7E; /* DISPLACEMENT FOR 1/F */
@@ -562,7 +562,7 @@ floatx80 floatx80_logn(floatx80 a, float_status *status)
k += adjk;
fp1 = int32_to_floatx80(k, status);
- fSig = (aSig & LIT64(0xFE00000000000000)) | LIT64(0x0100000000000000);
+ fSig = (aSig & UINT64_C(0xFE00000000000000)) | UINT64_C(0x0100000000000000);
j = (fSig >> 56) & 0x7E; /* DISPLACEMENT FOR 1/F */
f = packFloatx80(0, 0x3FFF, fSig); /* F */
@@ -572,7 +572,7 @@ floatx80 floatx80_logn(floatx80 a, float_status *status)
/* LP1CONT1 */
fp0 = floatx80_mul(fp0, log_tbl[j], status); /* FP0 IS U = (Y-F)/F */
- logof2 = packFloatx80(0, 0x3FFE, LIT64(0xB17217F7D1CF79AC));
+ logof2 = packFloatx80(0, 0x3FFE, UINT64_C(0xB17217F7D1CF79AC));
klog2 = floatx80_mul(fp1, logof2, status); /* FP1 IS K*LOG2 */
fp2 = floatx80_mul(fp0, fp0, status); /* FP2 IS V=U*U */
@@ -712,7 +712,7 @@ floatx80 floatx80_log10(floatx80 a, float_status *status)
status->floatx80_rounding_precision = 80;
fp0 = floatx80_logn(a, status);
- fp1 = packFloatx80(0, 0x3FFD, LIT64(0xDE5BD8A937287195)); /* INV_L10 */
+ fp1 = packFloatx80(0, 0x3FFD, UINT64_C(0xDE5BD8A937287195)); /* INV_L10 */
status->float_rounding_mode = user_rnd_mode;
status->floatx80_rounding_precision = user_rnd_prec;
@@ -778,7 +778,7 @@ floatx80 floatx80_log2(floatx80 a, float_status *status)
a = int32_to_floatx80(aExp - 0x3FFF, status);
} else {
fp0 = floatx80_logn(a, status);
- fp1 = packFloatx80(0, 0x3FFF, LIT64(0xB8AA3B295C17F0BC)); /* INV_L2 */
+ fp1 = packFloatx80(0, 0x3FFF, UINT64_C(0xB8AA3B295C17F0BC)); /* INV_L2 */
status->float_rounding_mode = user_rnd_mode;
status->floatx80_rounding_precision = user_rnd_prec;
@@ -862,7 +862,7 @@ floatx80 floatx80_etox(floatx80 a, float_status *status)
fp0 = floatx80_mul(fp0, float32_to_floatx80(
make_float32(0xBC317218), status),
status); /* N * L1, L1 = lead(-log2/64) */
- l2 = packFloatx80(0, 0x3FDC, LIT64(0x82E308654361C4C6));
+ l2 = packFloatx80(0, 0x3FDC, UINT64_C(0x82E308654361C4C6));
fp2 = floatx80_mul(fp2, l2, status); /* N * L2, L1+L2 = -log2/64 */
fp0 = floatx80_add(fp0, fp1, status); /* X + N*L1 */
fp0 = floatx80_add(fp0, fp2, status); /* R */
@@ -1082,7 +1082,7 @@ floatx80 floatx80_twotox(floatx80 a, float_status *status)
make_float32(0x3C800000), status),
status); /* (1/64)*N */
fp0 = floatx80_sub(fp0, fp1, status); /* X - (1/64)*INT(64 X) */
- fp2 = packFloatx80(0, 0x3FFE, LIT64(0xB17217F7D1CF79AC)); /* LOG2 */
+ fp2 = packFloatx80(0, 0x3FFE, UINT64_C(0xB17217F7D1CF79AC)); /* LOG2 */
fp0 = floatx80_mul(fp0, fp2, status); /* R */
/* EXPR */
@@ -1233,11 +1233,11 @@ floatx80 floatx80_tentox(floatx80 a, float_status *status)
fp1 = floatx80_mul(fp1, float64_to_floatx80(
make_float64(0x3F734413509F8000), status),
status); /* N*(LOG2/64LOG10)_LEAD */
- fp3 = packFloatx80(1, 0x3FCD, LIT64(0xC0219DC1DA994FD2));
+ fp3 = packFloatx80(1, 0x3FCD, UINT64_C(0xC0219DC1DA994FD2));
fp2 = floatx80_mul(fp2, fp3, status); /* N*(LOG2/64LOG10)_TRAIL */
fp0 = floatx80_sub(fp0, fp1, status); /* X - N L_LEAD */
fp0 = floatx80_sub(fp0, fp2, status); /* X - N L_TRAIL */
- fp2 = packFloatx80(0, 0x4000, LIT64(0x935D8DDDAAA8AC17)); /* LOG10 */
+ fp2 = packFloatx80(0, 0x4000, UINT64_C(0x935D8DDDAAA8AC17)); /* LOG10 */
fp0 = floatx80_mul(fp0, fp2, status); /* R */
/* EXPR */
@@ -1329,9 +1329,9 @@ floatx80 floatx80_tan(floatx80 a, float_status *status)
fp1 = packFloatx80(0, 0, 0);
if (compact == 0x7FFEFFFF) {
twopi1 = packFloatx80(aSign ^ 1, 0x7FFE,
- LIT64(0xC90FDAA200000000));
+ UINT64_C(0xC90FDAA200000000));
twopi2 = packFloatx80(aSign ^ 1, 0x7FDC,
- LIT64(0x85A308D300000000));
+ UINT64_C(0x85A308D300000000));
fp0 = floatx80_add(fp0, twopi1, status);
fp1 = fp0;
fp0 = floatx80_add(fp0, twopi2, status);
@@ -1350,9 +1350,9 @@ floatx80 floatx80_tan(floatx80 a, float_status *status)
endflag = 0;
}
invtwopi = packFloatx80(0, 0x3FFE - l,
- LIT64(0xA2F9836E4E44152A)); /* INVTWOPI */
- twopi1 = packFloatx80(0, 0x3FFF + l, LIT64(0xC90FDAA200000000));
- twopi2 = packFloatx80(0, 0x3FDD + l, LIT64(0x85A308D300000000));
+ UINT64_C(0xA2F9836E4E44152A)); /* INVTWOPI */
+ twopi1 = packFloatx80(0, 0x3FFF + l, UINT64_C(0xC90FDAA200000000));
+ twopi2 = packFloatx80(0, 0x3FDD + l, UINT64_C(0x85A308D300000000));
/* SIGN(INARG)*2^63 IN SGL */
twoto63 = packFloat32(xSign, 0xBE, 0);
@@ -1415,17 +1415,17 @@ floatx80 floatx80_tan(floatx80 a, float_status *status)
fp3 = floatx80_add(fp3, float64_to_floatx80(
make_float64(0xBF346F59B39BA65F), status),
status); /* Q3+SQ4 */
- fp4 = packFloatx80(0, 0x3FF6, LIT64(0xE073D3FC199C4A00));
+ fp4 = packFloatx80(0, 0x3FF6, UINT64_C(0xE073D3FC199C4A00));
fp2 = floatx80_add(fp2, fp4, status); /* P2+SP3 */
fp3 = floatx80_mul(fp3, fp0, status); /* S(Q3+SQ4) */
fp2 = floatx80_mul(fp2, fp0, status); /* S(P2+SP3) */
- fp4 = packFloatx80(0, 0x3FF9, LIT64(0xD23CD68415D95FA1));
+ fp4 = packFloatx80(0, 0x3FF9, UINT64_C(0xD23CD68415D95FA1));
fp3 = floatx80_add(fp3, fp4, status); /* Q2+S(Q3+SQ4) */
- fp4 = packFloatx80(1, 0x3FFC, LIT64(0x8895A6C5FB423BCA));
+ fp4 = packFloatx80(1, 0x3FFC, UINT64_C(0x8895A6C5FB423BCA));
fp2 = floatx80_add(fp2, fp4, status); /* P1+S(P2+SP3) */
fp3 = floatx80_mul(fp3, fp0, status); /* S(Q2+S(Q3+SQ4)) */
fp2 = floatx80_mul(fp2, fp0, status); /* S(P1+S(P2+SP3)) */
- fp4 = packFloatx80(1, 0x3FFD, LIT64(0xEEF57E0DA84BC8CE));
+ fp4 = packFloatx80(1, 0x3FFD, UINT64_C(0xEEF57E0DA84BC8CE));
fp3 = floatx80_add(fp3, fp4, status); /* Q1+S(Q2+S(Q3+SQ4)) */
fp2 = floatx80_mul(fp2, fp1, status); /* RS(P1+S(P2+SP3)) */
fp0 = floatx80_mul(fp0, fp3, status); /* S(Q1+S(Q2+S(Q3+SQ4))) */
@@ -1459,17 +1459,17 @@ floatx80 floatx80_tan(floatx80 a, float_status *status)
fp3 = floatx80_add(fp3, float64_to_floatx80(
make_float64(0xBF346F59B39BA65F), status),
status); /* Q3+SQ4 */
- fp4 = packFloatx80(0, 0x3FF6, LIT64(0xE073D3FC199C4A00));
+ fp4 = packFloatx80(0, 0x3FF6, UINT64_C(0xE073D3FC199C4A00));
fp2 = floatx80_add(fp2, fp4, status); /* P2+SP3 */
fp3 = floatx80_mul(fp3, fp1, status); /* S(Q3+SQ4) */
fp2 = floatx80_mul(fp2, fp1, status); /* S(P2+SP3) */
- fp4 = packFloatx80(0, 0x3FF9, LIT64(0xD23CD68415D95FA1));
+ fp4 = packFloatx80(0, 0x3FF9, UINT64_C(0xD23CD68415D95FA1));
fp3 = floatx80_add(fp3, fp4, status); /* Q2+S(Q3+SQ4) */
- fp4 = packFloatx80(1, 0x3FFC, LIT64(0x8895A6C5FB423BCA));
+ fp4 = packFloatx80(1, 0x3FFC, UINT64_C(0x8895A6C5FB423BCA));
fp2 = floatx80_add(fp2, fp4, status); /* P1+S(P2+SP3) */
fp3 = floatx80_mul(fp3, fp1, status); /* S(Q2+S(Q3+SQ4)) */
fp2 = floatx80_mul(fp2, fp1, status); /* S(P1+S(P2+SP3)) */
- fp4 = packFloatx80(1, 0x3FFD, LIT64(0xEEF57E0DA84BC8CE));
+ fp4 = packFloatx80(1, 0x3FFD, UINT64_C(0xEEF57E0DA84BC8CE));
fp3 = floatx80_add(fp3, fp4, status); /* Q1+S(Q2+S(Q3+SQ4)) */
fp2 = floatx80_mul(fp2, fp0, status); /* RS(P1+S(P2+SP3)) */
fp1 = floatx80_mul(fp1, fp3, status); /* S(Q1+S(Q2+S(Q3+SQ4))) */
@@ -1539,9 +1539,9 @@ floatx80 floatx80_sin(floatx80 a, float_status *status)
fp1 = packFloatx80(0, 0, 0);
if (compact == 0x7FFEFFFF) {
twopi1 = packFloatx80(aSign ^ 1, 0x7FFE,
- LIT64(0xC90FDAA200000000));
+ UINT64_C(0xC90FDAA200000000));
twopi2 = packFloatx80(aSign ^ 1, 0x7FDC,
- LIT64(0x85A308D300000000));
+ UINT64_C(0x85A308D300000000));
fp0 = floatx80_add(fp0, twopi1, status);
fp1 = fp0;
fp0 = floatx80_add(fp0, twopi2, status);
@@ -1560,9 +1560,9 @@ floatx80 floatx80_sin(floatx80 a, float_status *status)
endflag = 0;
}
invtwopi = packFloatx80(0, 0x3FFE - l,
- LIT64(0xA2F9836E4E44152A)); /* INVTWOPI */
- twopi1 = packFloatx80(0, 0x3FFF + l, LIT64(0xC90FDAA200000000));
- twopi2 = packFloatx80(0, 0x3FDD + l, LIT64(0x85A308D300000000));
+ UINT64_C(0xA2F9836E4E44152A)); /* INVTWOPI */
+ twopi1 = packFloatx80(0, 0x3FFF + l, UINT64_C(0xC90FDAA200000000));
+ twopi2 = packFloatx80(0, 0x3FDD + l, UINT64_C(0x85A308D300000000));
/* SIGN(INARG)*2^63 IN SGL */
twoto63 = packFloat32(xSign, 0xBE, 0);
@@ -1650,11 +1650,11 @@ floatx80 floatx80_sin(floatx80 a, float_status *status)
fp2 = floatx80_add(fp2, float64_to_floatx80(
make_float64(0x3EFA01A01A01D423), status),
status); /* B4+T(B6+TB8) */
- fp4 = packFloatx80(1, 0x3FF5, LIT64(0xB60B60B60B61D438));
+ fp4 = packFloatx80(1, 0x3FF5, UINT64_C(0xB60B60B60B61D438));
fp3 = floatx80_add(fp3, fp4, status); /* B3+T(B5+TB7) */
fp2 = floatx80_mul(fp2, fp1, status); /* T(B4+T(B6+TB8)) */
fp1 = floatx80_mul(fp1, fp3, status); /* T(B3+T(B5+TB7)) */
- fp4 = packFloatx80(0, 0x3FFA, LIT64(0xAAAAAAAAAAAAAB5E));
+ fp4 = packFloatx80(0, 0x3FFA, UINT64_C(0xAAAAAAAAAAAAAB5E));
fp2 = floatx80_add(fp2, fp4, status); /* B2+T(B4+T(B6+TB8)) */
fp1 = floatx80_add(fp1, float32_to_floatx80(
make_float32(0xBF000000), status),
@@ -1702,11 +1702,11 @@ floatx80 floatx80_sin(floatx80 a, float_status *status)
fp3 = floatx80_add(fp3, float64_to_floatx80(
make_float64(0xBF2A01A01A018B59), status),
status); /* A3+T(A5+TA7) */
- fp4 = packFloatx80(0, 0x3FF8, LIT64(0x88888888888859AF));
+ fp4 = packFloatx80(0, 0x3FF8, UINT64_C(0x88888888888859AF));
fp2 = floatx80_add(fp2, fp4, status); /* A2+T(A4+TA6) */
fp1 = floatx80_mul(fp1, fp3, status); /* T(A3+T(A5+TA7)) */
fp2 = floatx80_mul(fp2, fp0, status); /* S(A2+T(A4+TA6)) */
- fp4 = packFloatx80(1, 0x3FFC, LIT64(0xAAAAAAAAAAAAAA99));
+ fp4 = packFloatx80(1, 0x3FFC, UINT64_C(0xAAAAAAAAAAAAAA99));
fp1 = floatx80_add(fp1, fp4, status); /* A1+T(A3+T(A5+TA7)) */
fp1 = floatx80_add(fp1, fp2,
status); /* [A1+T(A3+T(A5+TA7))]+
@@ -1778,9 +1778,9 @@ floatx80 floatx80_cos(floatx80 a, float_status *status)
fp1 = packFloatx80(0, 0, 0);
if (compact == 0x7FFEFFFF) {
twopi1 = packFloatx80(aSign ^ 1, 0x7FFE,
- LIT64(0xC90FDAA200000000));
+ UINT64_C(0xC90FDAA200000000));
twopi2 = packFloatx80(aSign ^ 1, 0x7FDC,
- LIT64(0x85A308D300000000));
+ UINT64_C(0x85A308D300000000));
fp0 = floatx80_add(fp0, twopi1, status);
fp1 = fp0;
fp0 = floatx80_add(fp0, twopi2, status);
@@ -1799,9 +1799,9 @@ floatx80 floatx80_cos(floatx80 a, float_status *status)
endflag = 0;
}
invtwopi = packFloatx80(0, 0x3FFE - l,
- LIT64(0xA2F9836E4E44152A)); /* INVTWOPI */
- twopi1 = packFloatx80(0, 0x3FFF + l, LIT64(0xC90FDAA200000000));
- twopi2 = packFloatx80(0, 0x3FDD + l, LIT64(0x85A308D300000000));
+ UINT64_C(0xA2F9836E4E44152A)); /* INVTWOPI */
+ twopi1 = packFloatx80(0, 0x3FFF + l, UINT64_C(0xC90FDAA200000000));
+ twopi2 = packFloatx80(0, 0x3FDD + l, UINT64_C(0x85A308D300000000));
/* SIGN(INARG)*2^63 IN SGL */
twoto63 = packFloat32(xSign, 0xBE, 0);
@@ -1890,11 +1890,11 @@ floatx80 floatx80_cos(floatx80 a, float_status *status)
fp2 = floatx80_add(fp2, float64_to_floatx80(
make_float64(0x3EFA01A01A01D423), status),
status); /* B4+T(B6+TB8) */
- fp4 = packFloatx80(1, 0x3FF5, LIT64(0xB60B60B60B61D438));
+ fp4 = packFloatx80(1, 0x3FF5, UINT64_C(0xB60B60B60B61D438));
fp3 = floatx80_add(fp3, fp4, status); /* B3+T(B5+TB7) */
fp2 = floatx80_mul(fp2, fp1, status); /* T(B4+T(B6+TB8)) */
fp1 = floatx80_mul(fp1, fp3, status); /* T(B3+T(B5+TB7)) */
- fp4 = packFloatx80(0, 0x3FFA, LIT64(0xAAAAAAAAAAAAAB5E));
+ fp4 = packFloatx80(0, 0x3FFA, UINT64_C(0xAAAAAAAAAAAAAB5E));
fp2 = floatx80_add(fp2, fp4, status); /* B2+T(B4+T(B6+TB8)) */
fp1 = floatx80_add(fp1, float32_to_floatx80(
make_float32(0xBF000000), status),
@@ -1941,11 +1941,11 @@ floatx80 floatx80_cos(floatx80 a, float_status *status)
fp3 = floatx80_add(fp3, float64_to_floatx80(
make_float64(0xBF2A01A01A018B59), status),
status); /* A3+T(A5+TA7) */
- fp4 = packFloatx80(0, 0x3FF8, LIT64(0x88888888888859AF));
+ fp4 = packFloatx80(0, 0x3FF8, UINT64_C(0x88888888888859AF));
fp2 = floatx80_add(fp2, fp4, status); /* A2+T(A4+TA6) */
fp1 = floatx80_mul(fp1, fp3, status); /* T(A3+T(A5+TA7)) */
fp2 = floatx80_mul(fp2, fp0, status); /* S(A2+T(A4+TA6)) */
- fp4 = packFloatx80(1, 0x3FFC, LIT64(0xAAAAAAAAAAAAAA99));
+ fp4 = packFloatx80(1, 0x3FFC, UINT64_C(0xAAAAAAAAAAAAAA99));
fp1 = floatx80_add(fp1, fp4, status); /* A1+T(A3+T(A5+TA7)) */
fp1 = floatx80_add(fp1, fp2, status);
/* [A1+T(A3+T(A5+TA7))]+[S(A2+T(A4+TA6))] */
@@ -2114,8 +2114,8 @@ floatx80 floatx80_atan(floatx80 a, float_status *status)
}
}
} else {
- aSig &= LIT64(0xF800000000000000);
- aSig |= LIT64(0x0400000000000000);
+ aSig &= UINT64_C(0xF800000000000000);
+ aSig |= UINT64_C(0x0400000000000000);
xsave = packFloatx80(aSign, aExp, aSig); /* F */
fp0 = a;
fp1 = a; /* X */
@@ -2430,7 +2430,7 @@ floatx80 floatx80_etoxm1(floatx80 a, float_status *status)
fp0 = floatx80_mul(fp0, float32_to_floatx80(
make_float32(0xBC317218), status),
status); /* N * L1, L1 = lead(-log2/64) */
- l2 = packFloatx80(0, 0x3FDC, LIT64(0x82E308654361C4C6));
+ l2 = packFloatx80(0, 0x3FDC, UINT64_C(0x82E308654361C4C6));
fp2 = floatx80_mul(fp2, l2, status); /* N * L2, L1+L2 = -log2/64 */
fp0 = floatx80_add(fp0, fp1, status); /* X + N*L1 */
fp0 = floatx80_add(fp0, fp2, status); /* R */
@@ -2562,7 +2562,7 @@ floatx80 floatx80_etoxm1(floatx80 a, float_status *status)
fp2 = floatx80_add(fp2, float64_to_floatx80(
make_float64(0x3FA5555555555555), status),
status); /* B3 */
- fp3 = packFloatx80(0, 0x3FFC, LIT64(0xAAAAAAAAAAAAAAAB));
+ fp3 = packFloatx80(0, 0x3FFC, UINT64_C(0xAAAAAAAAAAAAAAAB));
fp1 = floatx80_add(fp1, fp3, status); /* B2 */
fp2 = floatx80_mul(fp2, fp0, status);
fp1 = floatx80_mul(fp1, fp0, status);
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Qemu-devel] [PULL 06/12] fpu: remove the LIT64 macro
2019-08-19 12:16 [Qemu-devel] [PULL 00/12] softfloat header updates Alex Bennée
` (4 preceding siblings ...)
2019-08-19 12:17 ` [Qemu-devel] [PULL 05/12] target/m68k: " Alex Bennée
@ 2019-08-19 12:17 ` Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 07/12] fpu: move inline helpers into a separate header Alex Bennée
` (6 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Bennée @ 2019-08-19 12:17 UTC (permalink / raw)
To: peter.maydell
Cc: Richard Henderson, Alex Bennée, qemu-devel, Aurelien Jarno
Now the rest of the code has been cleaned up we can remove this.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 3ff3fa52245..d9333eb65b8 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -82,8 +82,6 @@ this code that are retained.
#ifndef SOFTFLOAT_H
#define SOFTFLOAT_H
-#define LIT64( a ) a##LL
-
/*----------------------------------------------------------------------------
| Software IEC/IEEE floating-point ordering relations
*----------------------------------------------------------------------------*/
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Qemu-devel] [PULL 07/12] fpu: move inline helpers into a separate header
2019-08-19 12:16 [Qemu-devel] [PULL 00/12] softfloat header updates Alex Bennée
` (5 preceding siblings ...)
2019-08-19 12:17 ` [Qemu-devel] [PULL 06/12] fpu: remove the LIT64 macro Alex Bennée
@ 2019-08-19 12:17 ` Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 08/12] fpu: make softfloat-macros "self-contained" Alex Bennée
` (5 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Bennée @ 2019-08-19 12:17 UTC (permalink / raw)
To: peter.maydell
Cc: Richard Henderson, Alex Bennée, qemu-devel, Aurelien Jarno,
Philippe Mathieu-Daudé
There are a bunch of users of the inline helpers who do not need
access to the entire softfloat API. Move those inline helpers into a
new header file which can be included without bringing in the rest of
the world.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
diff --git a/include/fpu/softfloat-helpers.h b/include/fpu/softfloat-helpers.h
new file mode 100644
index 00000000000..e0baf24c8f5
--- /dev/null
+++ b/include/fpu/softfloat-helpers.h
@@ -0,0 +1,132 @@
+/*
+ * QEMU float support - standalone helpers
+ *
+ * This is provided for files that don't need the access to the full
+ * set of softfloat functions. Typically this is cpu initialisation
+ * code which wants to set default rounding and exceptions modes.
+ *
+ * The code in this source file is derived from release 2a of the SoftFloat
+ * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
+ * some later contributions) are provided under that license, as detailed below.
+ * It has subsequently been modified by contributors to the QEMU Project,
+ * so some portions are provided under:
+ * the SoftFloat-2a license
+ * the BSD license
+ * GPL-v2-or-later
+ *
+ * Any future contributions to this file after December 1st 2014 will be
+ * taken to be licensed under the Softfloat-2a license unless specifically
+ * indicated otherwise.
+ */
+
+/*
+===============================================================================
+This C header file is part of the SoftFloat IEC/IEEE Floating-point
+Arithmetic Package, Release 2a.
+
+Written by John R. Hauser. This work was made possible in part by the
+International Computer Science Institute, located at Suite 600, 1947 Center
+Street, Berkeley, California 94704. Funding was partially provided by the
+National Science Foundation under grant MIP-9311980. The original version
+of this code was written as part of a project to build a fixed-point vector
+processor in collaboration with the University of California at Berkeley,
+overseen by Profs. Nelson Morgan and John Wawrzynek. More information
+is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
+arithmetic/SoftFloat.html'.
+
+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
+has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
+TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
+PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
+AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
+
+Derivative works are acceptable, even for commercial purposes, so long as
+(1) they include prominent notice that the work is derivative, and (2) they
+include prominent notice akin to these four paragraphs for those parts of
+this code that are retained.
+
+===============================================================================
+*/
+
+#ifndef _SOFTFLOAT_HELPERS_H_
+#define _SOFTFLOAT_HELPERS_H_
+
+#include "fpu/softfloat-types.h"
+
+static inline void set_float_detect_tininess(int val, float_status *status)
+{
+ status->float_detect_tininess = val;
+}
+
+static inline void set_float_rounding_mode(int val, float_status *status)
+{
+ status->float_rounding_mode = val;
+}
+
+static inline void set_float_exception_flags(int val, float_status *status)
+{
+ status->float_exception_flags = val;
+}
+
+static inline void set_floatx80_rounding_precision(int val,
+ float_status *status)
+{
+ status->floatx80_rounding_precision = val;
+}
+
+static inline void set_flush_to_zero(flag val, float_status *status)
+{
+ status->flush_to_zero = val;
+}
+
+static inline void set_flush_inputs_to_zero(flag val, float_status *status)
+{
+ status->flush_inputs_to_zero = val;
+}
+
+static inline void set_default_nan_mode(flag val, float_status *status)
+{
+ status->default_nan_mode = val;
+}
+
+static inline void set_snan_bit_is_one(flag val, float_status *status)
+{
+ status->snan_bit_is_one = val;
+}
+
+static inline int get_float_detect_tininess(float_status *status)
+{
+ return status->float_detect_tininess;
+}
+
+static inline int get_float_rounding_mode(float_status *status)
+{
+ return status->float_rounding_mode;
+}
+
+static inline int get_float_exception_flags(float_status *status)
+{
+ return status->float_exception_flags;
+}
+
+static inline int get_floatx80_rounding_precision(float_status *status)
+{
+ return status->floatx80_rounding_precision;
+}
+
+static inline flag get_flush_to_zero(float_status *status)
+{
+ return status->flush_to_zero;
+}
+
+static inline flag get_flush_inputs_to_zero(float_status *status)
+{
+ return status->flush_inputs_to_zero;
+}
+
+static inline flag get_default_nan_mode(float_status *status)
+{
+ return status->default_nan_mode;
+}
+
+#endif /* _SOFTFLOAT_HELPERS_H_ */
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index d9333eb65b8..ecb8ba01149 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -93,68 +93,7 @@ enum {
};
#include "fpu/softfloat-types.h"
-
-static inline void set_float_detect_tininess(int val, float_status *status)
-{
- status->float_detect_tininess = val;
-}
-static inline void set_float_rounding_mode(int val, float_status *status)
-{
- status->float_rounding_mode = val;
-}
-static inline void set_float_exception_flags(int val, float_status *status)
-{
- status->float_exception_flags = val;
-}
-static inline void set_floatx80_rounding_precision(int val,
- float_status *status)
-{
- status->floatx80_rounding_precision = val;
-}
-static inline void set_flush_to_zero(flag val, float_status *status)
-{
- status->flush_to_zero = val;
-}
-static inline void set_flush_inputs_to_zero(flag val, float_status *status)
-{
- status->flush_inputs_to_zero = val;
-}
-static inline void set_default_nan_mode(flag val, float_status *status)
-{
- status->default_nan_mode = val;
-}
-static inline void set_snan_bit_is_one(flag val, float_status *status)
-{
- status->snan_bit_is_one = val;
-}
-static inline int get_float_detect_tininess(float_status *status)
-{
- return status->float_detect_tininess;
-}
-static inline int get_float_rounding_mode(float_status *status)
-{
- return status->float_rounding_mode;
-}
-static inline int get_float_exception_flags(float_status *status)
-{
- return status->float_exception_flags;
-}
-static inline int get_floatx80_rounding_precision(float_status *status)
-{
- return status->floatx80_rounding_precision;
-}
-static inline flag get_flush_to_zero(float_status *status)
-{
- return status->flush_to_zero;
-}
-static inline flag get_flush_inputs_to_zero(float_status *status)
-{
- return status->flush_inputs_to_zero;
-}
-static inline flag get_default_nan_mode(float_status *status)
-{
- return status->default_nan_mode;
-}
+#include "fpu/softfloat-helpers.h"
/*----------------------------------------------------------------------------
| Routine to raise any or all of the software IEC/IEEE floating-point
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Qemu-devel] [PULL 08/12] fpu: make softfloat-macros "self-contained"
2019-08-19 12:16 [Qemu-devel] [PULL 00/12] softfloat header updates Alex Bennée
` (6 preceding siblings ...)
2019-08-19 12:17 ` [Qemu-devel] [PULL 07/12] fpu: move inline helpers into a separate header Alex Bennée
@ 2019-08-19 12:17 ` Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 09/12] fpu: rename softfloat-specialize.h -> .inc.c Alex Bennée
` (4 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Bennée @ 2019-08-19 12:17 UTC (permalink / raw)
To: peter.maydell
Cc: Richard Henderson, Alex Bennée, qemu-devel, Aurelien Jarno,
Philippe Mathieu-Daudé
The macros use the "flags" type and to be consistent if anyone just
needs the macros we should bring in the header we need. There is an
outstanding TODO to audit the use of "flags" and replace with bool at
which point this include could be dropped.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h
index 3a956736742..605c4f4bc62 100644
--- a/include/fpu/softfloat-macros.h
+++ b/include/fpu/softfloat-macros.h
@@ -82,7 +82,7 @@ this code that are retained.
#ifndef FPU_SOFTFLOAT_MACROS_H
#define FPU_SOFTFLOAT_MACROS_H
-#include "fpu/softfloat.h"
+#include "fpu/softfloat-types.h"
/*----------------------------------------------------------------------------
| Shifts `a' right by the number of bits given in `count'. If any nonzero
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Qemu-devel] [PULL 09/12] fpu: rename softfloat-specialize.h -> .inc.c
2019-08-19 12:16 [Qemu-devel] [PULL 00/12] softfloat header updates Alex Bennée
` (7 preceding siblings ...)
2019-08-19 12:17 ` [Qemu-devel] [PULL 08/12] fpu: make softfloat-macros "self-contained" Alex Bennée
@ 2019-08-19 12:17 ` Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 10/12] target/mips: rationalise softfloat includes Alex Bennée
` (3 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Bennée @ 2019-08-19 12:17 UTC (permalink / raw)
To: peter.maydell
Cc: Richard Henderson, Alex Bennée, qemu-devel, Aurelien Jarno,
Philippe Mathieu-Daudé
This is not a normal header and should only be included in the main
softfloat.c file to bring in the various target specific
specialisations. Indeed as it contains non-inlined C functions it is
not even a legal header. Rename it to match our included C convention.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.inc.c
similarity index 100%
rename from fpu/softfloat-specialize.h
rename to fpu/softfloat-specialize.inc.c
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 7ef0638d7e4..0638c9f4e03 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -634,7 +634,7 @@ static inline float64 float64_pack_raw(FloatParts p)
| are propagated from function inputs to output. These details are target-
| specific.
*----------------------------------------------------------------------------*/
-#include "softfloat-specialize.h"
+#include "softfloat-specialize.inc.c"
/* Canonicalize EXP and FRAC, setting CLS. */
static FloatParts sf_canonicalize(FloatParts part, const FloatFmt *parm,
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Qemu-devel] [PULL 10/12] target/mips: rationalise softfloat includes
2019-08-19 12:16 [Qemu-devel] [PULL 00/12] softfloat header updates Alex Bennée
` (8 preceding siblings ...)
2019-08-19 12:17 ` [Qemu-devel] [PULL 09/12] fpu: rename softfloat-specialize.h -> .inc.c Alex Bennée
@ 2019-08-19 12:17 ` Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 11/12] target/riscv: " Alex Bennée
` (2 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Bennée @ 2019-08-19 12:17 UTC (permalink / raw)
To: peter.maydell
Cc: Aleksandar Rikalo, Alex Bennée, Riku Voipio, qemu-devel,
Laurent Vivier, Aleksandar Markovic, Philippe Mathieu-Daudé,
Aurelien Jarno
We should avoid including the whole of softfloat headers in cpu.h and
explicitly include it only where we will be calling softfloat
functions. We can use the -types.h in cpu.h for the few bits that are
global. We also move the restore_snan_bit_mode into internal.h and
include -helpers.h there.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c
index 0ba894fa7aa..39915b3fde2 100644
--- a/linux-user/mips/cpu_loop.c
+++ b/linux-user/mips/cpu_loop.c
@@ -22,6 +22,7 @@
#include "qemu.h"
#include "cpu_loop-common.h"
#include "elf.h"
+#include "internal.h"
# ifdef TARGET_ABI_MIPSO32
# define MIPS_SYS(name, args) args,
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 21c0615e020..d235117dab3 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -5,7 +5,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
-#include "fpu/softfloat.h"
+#include "fpu/softfloat-types.h"
#include "mips-defs.h"
#define TCG_GUEST_DEFAULT_MO (0)
@@ -1195,12 +1195,6 @@ void itc_reconfigure(struct MIPSITUState *tag);
/* helper.c */
target_ulong exception_resume_pc(CPUMIPSState *env);
-static inline void restore_snan_bit_mode(CPUMIPSState *env)
-{
- set_snan_bit_is_one((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) == 0,
- &env->active_fpu.fp_status);
-}
-
static inline void cpu_get_tb_cpu_state(CPUMIPSState *env, target_ulong *pc,
target_ulong *cs_base, uint32_t *flags)
{
diff --git a/target/mips/internal.h b/target/mips/internal.h
index d5aa5490d3c..ae29b578a47 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -7,6 +7,7 @@
#ifndef MIPS_INTERNAL_H
#define MIPS_INTERNAL_H
+#include "fpu/softfloat-helpers.h"
/* MMU types, the first four entries have the same layout as the
CP0C0_MT field. */
@@ -226,6 +227,12 @@ static inline void restore_flush_mode(CPUMIPSState *env)
&env->active_fpu.fp_status);
}
+static inline void restore_snan_bit_mode(CPUMIPSState *env)
+{
+ set_snan_bit_is_one((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) == 0,
+ &env->active_fpu.fp_status);
+}
+
static inline void restore_fp_status(CPUMIPSState *env)
{
restore_rounding_mode(env);
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index a5a86572b4a..f24061e2af7 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -22,6 +22,7 @@
#include "internal.h"
#include "exec/exec-all.h"
#include "exec/helper-proto.h"
+#include "fpu/softfloat.h"
/* Data format min and max values */
#define DF_BITS(df) (1 << ((df) + 3))
diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
index 9e2e02f8586..f88a3ab9043 100644
--- a/target/mips/op_helper.c
+++ b/target/mips/op_helper.c
@@ -25,6 +25,7 @@
#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include "sysemu/kvm.h"
+#include "fpu/softfloat.h"
/*****************************************************************************/
/* Exceptions processing helpers */
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Qemu-devel] [PULL 11/12] target/riscv: rationalise softfloat includes
2019-08-19 12:16 [Qemu-devel] [PULL 00/12] softfloat header updates Alex Bennée
` (9 preceding siblings ...)
2019-08-19 12:17 ` [Qemu-devel] [PULL 10/12] target/mips: rationalise softfloat includes Alex Bennée
@ 2019-08-19 12:17 ` Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 12/12] targets (various): use softfloat-helpers.h where we can Alex Bennée
2019-08-19 15:55 ` [Qemu-devel] [PULL 00/12] softfloat header updates Peter Maydell
12 siblings, 0 replies; 14+ messages in thread
From: Alex Bennée @ 2019-08-19 12:17 UTC (permalink / raw)
To: peter.maydell
Cc: open list:RISC-V TCG CPUs, Sagar Karandikar,
Philippe Mathieu-Daudé,
Palmer Dabbelt, Richard Henderson, qemu-devel, Alistair Francis,
Bastian Koppelmann, Alex Bennée
We should avoid including the whole of softfloat headers in cpu.h and
explicitly include it only where we will be calling softfloat
functions. We can use the -types.h and -helpers.h in cpu.h for the few
bits that are global.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Palmer Dabbelt <palmer@sifive.com>
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index f8d07bd20ad..6d52f97d7c3 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -27,6 +27,7 @@
#include "qemu/error-report.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
+#include "fpu/softfloat-helpers.h"
/* RISC-V CPU definitions */
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 0adb307f329..240b31e2ebb 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -22,7 +22,7 @@
#include "qom/cpu.h"
#include "exec/cpu-defs.h"
-#include "fpu/softfloat.h"
+#include "fpu/softfloat-types.h"
#define TCG_GUEST_DEFAULT_MO 0
diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c
index b4f818a6465..0b79562a690 100644
--- a/target/riscv/fpu_helper.c
+++ b/target/riscv/fpu_helper.c
@@ -21,6 +21,7 @@
#include "qemu/host-utils.h"
#include "exec/exec-all.h"
#include "exec/helper-proto.h"
+#include "fpu/softfloat.h"
target_ulong riscv_cpu_get_fflags(CPURISCVState *env)
{
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Qemu-devel] [PULL 12/12] targets (various): use softfloat-helpers.h where we can
2019-08-19 12:16 [Qemu-devel] [PULL 00/12] softfloat header updates Alex Bennée
` (10 preceding siblings ...)
2019-08-19 12:17 ` [Qemu-devel] [PULL 11/12] target/riscv: " Alex Bennée
@ 2019-08-19 12:17 ` Alex Bennée
2019-08-19 15:55 ` [Qemu-devel] [PULL 00/12] softfloat header updates Peter Maydell
12 siblings, 0 replies; 14+ messages in thread
From: Alex Bennée @ 2019-08-19 12:17 UTC (permalink / raw)
To: peter.maydell
Cc: David Hildenbrand, Alex Bennée, Cornelia Huck,
Richard Henderson, qemu-devel, open list:S390 TCG CPUs,
Bastian Koppelmann, Edgar E. Iglesias, Guan Xuetao,
Philippe Mathieu-Daudé,
Aurelien Jarno, Richard Henderson
Generally the cpu and non-FP helper files just want to manipulate the
softfloat flags. For this they can just use the -helpers.h include
which brings in a minimal number of inline helpers.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
diff --git a/target/alpha/helper.c b/target/alpha/helper.c
index 93b8e788b18..c6998348df4 100644
--- a/target/alpha/helper.c
+++ b/target/alpha/helper.c
@@ -21,7 +21,7 @@
#include "cpu.h"
#include "exec/exec-all.h"
-#include "fpu/softfloat.h"
+#include "fpu/softfloat-types.h"
#include "exec/helper-proto.h"
#include "qemu/qemu-print.h"
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 0bec54b2f8a..9cfd7445e7d 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -28,7 +28,7 @@
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
#include "exec/exec-all.h"
-#include "fpu/softfloat.h"
+#include "fpu/softfloat-helpers.h"
static const struct {
const char *name;
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index 9466cd832d4..3abe7e80fd0 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -42,7 +42,7 @@
#include "sysemu/sysemu.h"
#include "sysemu/tcg.h"
#endif
-#include "fpu/softfloat.h"
+#include "fpu/softfloat-helpers.h"
#define CR0_RESET 0xE0UL
#define CR14_RESET 0xC2000000UL;
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index 816d6d7f311..d0a7707991f 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -25,8 +25,7 @@
#include "cpu.h"
#include "migration/vmstate.h"
#include "exec/exec-all.h"
-#include "fpu/softfloat.h"
-
+#include "fpu/softfloat-helpers.h"
static void superh_cpu_set_pc(CPUState *cs, vaddr value)
{
diff --git a/target/tricore/helper.c b/target/tricore/helper.c
index a6803368506..d5db7b2c03f 100644
--- a/target/tricore/helper.c
+++ b/target/tricore/helper.c
@@ -19,7 +19,7 @@
#include "cpu.h"
#include "exec/exec-all.h"
-#include "fpu/softfloat.h"
+#include "fpu/softfloat-helpers.h"
#include "qemu/qemu-print.h"
enum {
diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c
index 802e2f1eba5..b27fb9689ff 100644
--- a/target/unicore32/cpu.c
+++ b/target/unicore32/cpu.c
@@ -17,7 +17,6 @@
#include "cpu.h"
#include "migration/vmstate.h"
#include "exec/exec-all.h"
-#include "fpu/softfloat.h"
static void uc32_cpu_set_pc(CPUState *cs, vaddr value)
{
--
2.20.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [Qemu-devel] [PULL 00/12] softfloat header updates
2019-08-19 12:16 [Qemu-devel] [PULL 00/12] softfloat header updates Alex Bennée
` (11 preceding siblings ...)
2019-08-19 12:17 ` [Qemu-devel] [PULL 12/12] targets (various): use softfloat-helpers.h where we can Alex Bennée
@ 2019-08-19 15:55 ` Peter Maydell
12 siblings, 0 replies; 14+ messages in thread
From: Peter Maydell @ 2019-08-19 15:55 UTC (permalink / raw)
To: Alex Bennée; +Cc: QEMU Developers
On Mon, 19 Aug 2019 at 13:17, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> The following changes since commit afd760539308a5524accf964107cdb1d54a059e3:
>
> Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190816' into staging (2019-08-16 17:21:40 +0100)
>
> are available in the Git repository at:
>
> https://github.com/stsquad/qemu.git tags/pull-softfloat-headers-190819-1
>
> for you to fetch changes up to 5f8ab0004e878a6cd0f50fa8659df4a4f853eea8:
>
> targets (various): use softfloat-helpers.h where we can (2019-08-19 12:07:13 +0100)
>
> ----------------------------------------------------------------
> Softfloat updates
>
> - minor refactoring of constants
> - drop LIT64 macro
> - re-organise header inclusion
>
> ----------------------------------------------------------------
> Alex Bennée (12):
> fpu: replace LIT64 usage with UINT64_C for specialize constants
> fpu: convert float[16/32/64]_squash_denormal to new modern style
> fpu: use min/max values from stdint.h for integral overflow
> fpu: replace LIT64 with UINT64_C macros
> target/m68k: replace LIT64 with UINT64_C macros
> fpu: remove the LIT64 macro
> fpu: move inline helpers into a separate header
> fpu: make softfloat-macros "self-contained"
> fpu: rename softfloat-specialize.h -> .inc.c
> target/mips: rationalise softfloat includes
> target/riscv: rationalise softfloat includes
> targets (various): use softfloat-helpers.h where we can
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/4.2
for any user-visible changes.
-- PMM
^ permalink raw reply [flat|nested] 14+ messages in thread
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2019-08-19 12:16 [Qemu-devel] [PULL 00/12] softfloat header updates Alex Bennée
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2019-08-19 12:16 ` [Qemu-devel] [PULL 02/12] fpu: convert float[16/32/64]_squash_denormal to new modern style Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 03/12] fpu: use min/max values from stdint.h for integral overflow Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 04/12] fpu: replace LIT64 with UINT64_C macros Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 05/12] target/m68k: " Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 06/12] fpu: remove the LIT64 macro Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 07/12] fpu: move inline helpers into a separate header Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 08/12] fpu: make softfloat-macros "self-contained" Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 09/12] fpu: rename softfloat-specialize.h -> .inc.c Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 10/12] target/mips: rationalise softfloat includes Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 11/12] target/riscv: " Alex Bennée
2019-08-19 12:17 ` [Qemu-devel] [PULL 12/12] targets (various): use softfloat-helpers.h where we can Alex Bennée
2019-08-19 15:55 ` [Qemu-devel] [PULL 00/12] softfloat header updates Peter Maydell
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